NXP Advanced Ultra-low Power (AUP) is the world's lowest power consumption logic family. The family is optimized for low dynamic power consumption with C_PD in the 3 pF range.

The products are fully specified from 0.8V to 3.6V with a maximum supply voltage of 4.6 V. Because of the extremely low C_PD, AUP is the ultimate choice for low power, battery operated products. AUP is designed to meet today's demanding requirements for high performance, low power consumption applications. Using PicoGate and MicroPak XSON packaging, the designer has the lowest power consuming logic in the smallest packages available.

• Very low dynamic power dissipation (C_PD)
• Wide V_CC from 0.8 V to 3.6 V
• Schmitt trigger inputs provide high noise immunity
• Superior ESD protection
• Wide operating temperature of -40 °C to +125 °C
• T_PD of 3.2 ns and I_OL of 2.2 mA at 1.8 V V_CC
• Available initially in single/dual gate functions
• PicoGate and MicroPak packaging

• Mobile phones
• PDAs
• Digital cameras
• Media players
• Portable medical devices
• Other hand-held, power-sensitive applications