The advanced ultra-low power (AUP) logic family provides ultra-low power, small footprint logic solutions for use in 1.8 V and mixed 1.8 V / 3.3 V applications

• Very low dynamic power dissipation (C_PD)
• Wide V_CC from 0.8 V to 3.6 V
• Schmitt trigger action provide high noise immunity
• Superior ESD protection
• Wide operating temperature of -40 °C to +125 °C
• t_PD of 3.2 ns and I_OL of 2.2 mA at 1.8 V V_CC
• PicoGate and MicroPak packaging

• Mobile phones
• PDAs
• Digital cameras
• Media players
• Portable medical devices
• Other hand-held, power-sensitive applications

The AUP family is the industry standard family for portable applications. It is manufactured in a CMOS process resulting in lower static and dynamic power dissipation. It’s 3.6 V tolerance, low-threshold inputs (option) and I_OFF features make it suitable for use in mixed 1.8 V / 3.3 V and partial power-down applications. The family is fully specified from 1.1 V to 3.6 V and guaranteed for industrial and automotive operating temperatures.

The product portfolio includes low pin count single, dual and triple gate functions as well as configurable logic. AUP is available in leaded PicoGate as well as leadless MicroPak packages.