74LVC1G80GS

Single D-type flip-flop; positive-edge trigger


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The 74LVC1G80 provides a single positive-edge triggered D-type flip-flop.

Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The input pin D must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
All information on this product information page is subject to the subsequent disclaimers:
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Parametrics of this product

Type numberPackageNr of pinsPackage nameProduct statustpd(ns)VCC(V)FamilyPower dissipation considerationsLogic switching levelsOutput drive capability(mA)fmax(MHz)DescriptionTamb(Cel)
74LVC1G80GSSOT1202
(XSON6)		6XSON6Production2.41.65 - 5.5LVClowCMOS/LVTTL+/- 32450single D-type flip-flop; positive-edge trigger-40~125

Package

Type numberOrderable part numberOrdering code (12NC)Product statusPackagePackingMarking
74LVC1G80GS74LVC1G80GS,1329352 929 21132Volume productionSOT1202
(XSON6) 		VT

Outline drawing

Package VersionPackage NamePackage DescriptionReference CodesIssue Date
SOT1202XSON6extremely thin small outline package; no leads; 6 terminals2010-04-06

Related documents

Other type

Quality, reliability & chemical content

Type numberOrderable part numberChemical contentRoHSLeadfree conversion dateRHFIFR (FIT)MTBF (hours)MSLMSL LF
74LVC1G80GS74LVC1G80GS,13274LVC1G80GSAlways Pb-free3.872.5839793281653747E811
Quality and reliability disclaimer

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Documentation for this product

File nameTitleTypeFormatDate
74LVC1G80Single D-type flip-flop; positive-edge triggerData sheetpdf2012-07-02
AN10343MicroPak soldering informationApplication notepdf2010-12-30
AN11009Pin FMEA for LVC familyApplication notepdf2011-02-04
AN212Package lead inductance considerations in high-speed applicationsApplication notepdf2013-03-13
AN10156Sorting through the low voltage logic mazeApplication notepdf2013-03-13
lvc1g80lvc1g80 IBIS modelIBIS modelibs2013-04-07
lvclvc Spice modelSPICE modelzip2013-05-07

Ordering & availability

Type numberOrdering code (12NC)Orderable part numberRegionDistributorIn stockOrder quantityInventory dateBuy onlineSamples
74LVC1G80GS9352 929 2113274LVC1G80GS,132       

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