3.3 V octal D-type flip-flop; 3-state
The 74LVT574; 74LVTH574 is a high-performance product designed for VCC operation at 3.3 V.
This device is an 8-bit, edge triggered register coupled to eight 3-state output buffers. The two sections of the device are controlled independently by the clock (pin CP) and output enable (pin OE) control gates. The state of each Dn input (one setup time before the LOW-to-HIGH clock transition) is transferred to the corresponding flip-flops Qn output.
The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS memories, or MOS microprocessors.
The active LOW output enable (pin OE) controls all eight 3-state buffers independent of the clock operation.
When pin OE is LOW, the stored data appears at the outputs. When pin OE is HIGH, the outputs are in the high-impedance OFF-state, which means they will neither drive nor load the bus.
|Type number||Package||Nr of pins||Package name||Product status||tpd(ns)||VCC(V)||Family||Power dissipation considerations||Logic switching levels||Output drive capability(mA)||fmax(MHz)||Description||Tamb(Cel)|
|20||SO20||Production||4.3||2.7 - 3.6||LVT||medium||TTL||-32/+64||150||octal D-type flip-flop; positive-edge trigger (3-state)||-40~85|
|Package Version||Package Name||Package Description||Reference Codes||Issue Date|
|SOT163-1||SO20||plastic small outline package; 20 leads; body width 7.5 mm||MS-013 (JEDEC); 075E04 (IEC);||2003-02-19|
|Type number||Ordering code (12NC)||Orderable part number||Region||Distributor||In stock||Order quantity||Inventory date||Buy online||Samples|
|74LVT574D||9351 707 20112||74LVT574D,112||NA||AVNET EXPRESS AMERICAS||4,310||5/20/2013||not available|
|74LVT574D||9351 707 20118||74LVT574D,118||ASIA||WPI||2,000||2000||05/20/2013||not available|
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