Single 3-input NAND gate
The 74LVC1G10 provides a low-power, low-voltage single 3-input NAND gate.
The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall time.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
|Type number||Product status||VCC (V)||Logic switching levels||Output drive capability (mA)||tpd (ns)||fmax (MHz)||No of bits||Power dissipation considerations||Tamb (Cel)||Rth(j-a) (K/W)||Ψth(j-top) (K/W)||Package name|
|74LVC1G10GS||Production||1.65 - 5.5||CMOS/LVTTL||+/- 32||2.6||175||1||low||-40~125||251||128.0||XSON6|
|Type number||Ordering code (12NC)||Orderable part number||Region||Distributor||In stock||Order quantity||Inventory date||Buy online||Samples|
|74LVC1G10GS||9352 928 98132||74LVC1G10GS,132||not available|
Sample orders normally take 2-4 days for delivery.
If you do not have a direct account with NXP our network of global and regional distributors is available and equipped to support you with NXP samples. As a NXP customer you also have the option to order samples via our sales organisation.