Dual 2-input NAND gate
The 74LVC2G00 provides a 2-input NAND gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
|Type number||Product status||VCC (V)||Logic switching levels||Output drive capability (mA)||tpd (ns)||fmax (MHz)||No of bits||Power dissipation considerations||Tamb (Cel)||Rth(j-a) (K/W)||Ψth(j-top) (K/W)||Rth(j-c) (K/W)||Package name|
|74LVC2G00GS||Production||1.65 - 5.5||CMOS/LVTTL||+/- 32||2.2||175||2||low||-40~125||269||9.7||141||XSON8|
Sample orders normally take 2-4 days for delivery.
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