
74LVC38AD
Quad 2-input NAND gate; open-drain
The 74LVC38A provides four 2-input NAND functions. The outputs are open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
Low-Voltage CMOS (LVC)
Quad 2-input NAND gate; open-drain
| Type number | Package | Nr of pins | Package name | Product status | tpd(ns) | VCC(V) | Family | Nr of bits | Power dissipation considerations | Logic switching levels | Output drive capability(mA) | fmax(MHz) | Description | Tamb(Cel) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC38AD | SOT108-1 (SO14) | 14 | SO14 | Production | 2.2 | 1.2 - 3.6 | LVC | 4 | low | CMOS/LVTTL | 24 | 175 | quad 2-input NAND gate; open-drain | -40~125 |
| Type number | Orderable part number | Ordering code (12NC) | Product status | Package | Packing | Marking |
|---|---|---|---|---|---|---|
| 74LVC38AD | 74LVC38AD,112 | 9352 714 43112 | Volume production | SOT108-1 (SO14) | Tube | 74LVC38AD |
| 74LVC38AD | 74LVC38AD,118 | 9352 714 43118 | Volume production | SOT108-1 (SO14) | Reel Pack, SMD, 13" | 74LVC38AD |
| Package Version | Package Name | Package Description | Reference Codes | Issue Date |
|---|---|---|---|---|
| SOT108-1 | SO14 | plastic small outline package; 14 leads; body width 3.9 mm | MS-012 (JEDEC); 076E06 (IEC); | 2003-02-19 |
| Type number | Orderable part number | Chemical content | RoHS | Leadfree conversion date | RHF | IFR (FIT) | MTBF (hours) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|
| 74LVC38AD | 74LVC38AD,112 | 74LVC38AD | week 32, 2004 | 3.87 | 2.5839793281653747E8 | 1 | 1 | ||
| 74LVC38AD | 74LVC38AD,118 | 74LVC38AD | week 32, 2004 | 3.87 | 2.5839793281653747E8 | 1 | 1 |
| File name | Title | Type | Format | Date |
|---|---|---|---|---|
| 74LVC38A | Quad 2-input NAND gate; open-drain | Data sheet | 2011-11-04 | |
| AN240 | Interfacing 3 Volt and 5 Volt Applications | Application note | 1995-09-15 | |
| AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2002-02-05 | |
| AN11009 | Pin FMEA for LVC family | Application note | 2011-02-04 | |
| AN212 | Package lead inductance considerations in high-speed applications | Application note | 2013-03-13 | |
| AN10156 | Sorting through the low voltage logic maze | Application note | 2013-03-13 | |
| lvc | lvc Spice model | SPICE model | zip | 2013-05-07 |
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