Dual 2-input NOR gate
The 74LVC2G02 provides a 2-input NOR gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
|Type number||Package||Nr of pins||Package name||Product status||tpd(ns)||VCC(V)||Family||Nr of bits||Power dissipation considerations||Logic switching levels||Output drive capability(mA)||fmax(MHz)||Description||Tamb(Cel)|
|8||VSSOP8||Production||2.4||1.65 - 5.5||LVC||2||low||CMOS/LVTTL||+/- 32||150||dual 2-input NOR gate||-40~125|
|Package Version||Package Name||Package Description||Reference Codes||Issue Date|
|SOT765-1||VSSOP8||plastic very thin shrink small outline package; 8 leads; body width 2.3 mm||MO-187 (JEDEC);||2002-06-07|
Sample orders normally take 2-4 days for delivery.
If you do not have a direct account with NXP our network of global and regional distributors is available and equipped to support you with NXP samples. As a NXP customer you also have the option to order samples via our sales organisation.