Dual 2-input NOR gate
The 74LVC2G02 provides a 2-input NOR gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
|Type number||Package||Nr of pins||Package name||Product status||tpd(ns)||VCC(V)||Family||Nr of bits||Power dissipation considerations||Logic switching levels||Output drive capability(mA)||fmax(MHz)||Description||Tamb(Cel)|
|8||XSON8||Production||2.4||1.65 - 5.5||LVC||2||low||CMOS/LVTTL||+/- 32||150||dual 2-input NOR gate||-40~125|
|Package Version||Package Name||Package Description||Reference Codes||Issue Date|
|SOT1203||XSON8||extremely thin small outline package; no leads; 8 terminals||2010-04-06|
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