Low-power dual supply translating buffer
The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track VCC(A). Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y) accepts any supply voltage from 1.1 V to 3.6 V. This feature allows universal low voltage interfacing between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 1.1 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 1.1 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
|Type number||Package||Nr of pins||Package name||Product status||tpd(ns)||Family||Nr of bits||VCC(A)(V)||VCC(B)(V)||Power dissipation considerations||Logic switching levels||Output drive capability(mA)||Description||Tamb(Cel)|
|6||XSON6||Production||15.2||AUP||1||1.1 - 3.6||1.1 - 3.6||ultra low||CMOS||+/- 1.9||single dual supply translating buffer||-40~125|
|Type number||Orderable part number||Ordering code (12NC)||Product status||Package||Packing||Marking|
|74AUP1T34GN||74AUP1T34GN,132||9352 917 52132||Volume production||SOT1115|
|Package Version||Package Name||Package Description||Reference Codes||Issue Date|
|SOT1115||XSON6||extremely thin small outline package; no leads; 6 terminals||2010-04-07|
Sample orders normally take 2-4 days for delivery.
If you do not have a direct account with NXP our network of global and regional distributors is available and equipped to support you with NXP samples. As a NXP customer you also have the option to order samples via our sales organisation.