Parity generators/checkers allow the detection of basic data transmission issues in systems.
Key features and benefits
- Wide supply voltage 2.0 V to 6.0 V
- Expandable word length
- Error detection
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NXP’s parity generators/checkers include options with two parity outputs. Parity outputs will be defined by the number of parallel inputs that are set HIGH. The even parity output is set HIGH when the number of parallel inputs set HIGH is even.
Parity generators/checkers are available in SO packages. NXP’s parity generators/checkers are fully specified from -40 °C to 85 °C and -40 °C to 125 °C.
|Type number||Description||Status||Quick access|
|74F280B||9-bit odd/even parity generator/checker||Download datasheet|
|74HC(T)280||9-bit odd/even parity generator/checker||Download datasheet|
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