A phase locked loop (PLL) is a feedback system that synchronizes an oscillator to the phase and frequency of an incoming signal. The PLL consists of a phase comparator, loop filter and voltage controlled oscillator (VCO).
Key features and benefits
- Wide supply voltage 3.0 to 6.0 V
- Max. frequency up to 17 MHz (typ.)
- Low power consumption
- Excellent VCO frequency linearity
- Choice of phase comparators
- User configurable
- FM modulation and demodulation
- Frequency synthesis and multiplication
- Clock recovery
- Data synchronization and conditioning
- Voltage-to-frequency conversion
- Motor-speed control.interface
Design tools & Assets
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Training & events
NXP’s phase locked loops include three types of phase comparator and a user configurable VCO to maximize design flexibility. External components are used to define the centre frequency and lock range.
Phase locked loops are available in SO and TSSOP packages. NXP’s phase locked loops are fully specified from -40 °C to 85 °C and -40 °C to 125 °C.
|Type number||Description||Status||Quick access|
|74HC(T)4046A||Phase-locked-loop with VCO||Production||Download datasheet|
|74HCT9046A||PLL with band gap controlled VCO||Production||Download datasheet|
|HEF4046B||Phase-locked loop||Production||Download datasheet|
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