Phase-locked-loop with lock detector
The 74HC/HCT7046 are high-speed Si-gate CMOS devices and are specified in compliance with JEDEC standard no. 7.
The 74HC/HCT7046 are phase-locked-loop circuits that comprise a linear voltage-controlled oscillator (VCO) and two different phase comparators (PC1 and PC2) with a common signal input amplifier and a common comparator input.
A lock detector is provided and this gives a HIGH level at pin 1 (LD) when the PLL is locked. The lock detector capacitor must be connected between pin 15 (CLD) and pin 8 (GND). The input signal can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the “7046” forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.
|Type number||Package||Package name||Product status||tpd(ns)||VCC(V)||Family||Power dissipation considerations||Logic switching levels||Output drive capability(mA)||fmax(MHz)||Description|
|DIP16||Production||17||3.0 - 6.0||HC(T)||low||CMOS||+/- 5.2||19||PLL with lock detector|
|Type number||Orderable part number||Ordering code (12NC)||Product status||Package||Packing||Marking|
|74HC7046AN||74HC7046AN,112||9338 274 60112||Volume production||SOT38-4|
|Package Version||Package Name||Package Description||Reference Codes||Issue Date|
|SOT38-4||DIP16||plastic dual in-line package; 16 leads (300 mil)||2003-02-13|
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