LPC54101J256BD64: Low Power 32-bit Microcontroller (MCU) based on ARM® Cortex®-M4 Core

Overview

Outline 3d SOT314-2

Outline 3d SOT314-2

Features

  • ARM Cortex-M4F core
    • ARM Cortex-M4F processor, running at a frequency of up to 100 MHz
    • Floating Point Unit (FPU) and Memory Protection Unit (MPU)
    • ARM Cortex-M4F built-in Nested Vectored Interrupt Controller (NVIC)
    • Non-maskable Interrupt (NMI) input
    • Serial Wire Debug with eight breakpoints and four watch points. Includes serial wire trace output (SWO) for program tracing and boundary scan mode
    • JTAG boundary scan mode (BSDL)
    • ETM with time-stamping
    • System tick timer
  • On-chip memory
    • 256 kB on-chip flash program memory with flash accelerator and 256 byte page erase and write
    • 104 kB SRAM for code and data use
    • ROM with code for flash ISP/IAP, USART and I²C communication, and power control
  • ROM API support
    • Boot loader with boot options from flash or external source via USART
    • Flash In-Application Programming (IAP) and In-System Programming (ISP)
    • USART drivers
    • I²C drivers
    • Power control
  • Clock generation unit
    • 12 MHz internal RC oscillator
    • Internal low-power, watchdog oscillator with a nominal frequency of 500 kHz (WDOSC)
    • 32 kHz low-power RTC oscillator
    • External clock input for clock frequencies of up to 24 MHz
    • System PLL allows CPU operation up to the maximum CPU rate. May be run from the internal RC oscillator, the external clock input CLKIN, or the RTC oscillator
    • Clock output for monitoring internal clocks
    • Separate peripheral clocks for easy frequency scaling
    • Frequency measurement unit
  • Serial interfaces
    • Four USARTs with a shared fractional rate generator, DMA support, FIFO buffer, and synchronous mode
    • Two SPI controllers with multi-protocol and DMA support, four slave selects, and FIFO buffer
    • Three I²C-bus interfaces with DMA support and monitor mode. All I²C-bus interfaces support Fast-mode Plus with data rates of up to 1 Mbit/s and high-speed mode (3.4 Mbit/s) as a slave
  • Digital peripherals
    • Low-power DMA controller can access all memories on the AHB and all DMA-capable slaves.Supports 22 channels and 20 programmable triggers
    • Up to 50 General-Purpose Input/Output (GPIO) pins. Most pins include configurable pull-up/pull-down resistors, programmable open-drain mode, and input/output inverter
    • GPIO registers are located on the AHB for fast access. The DMA supports GPIO ports
    • All GPIO pins can be selected as edge and level sensitive interrupt sources
    • Each GPIO pin supports multiple pin functions
    • Two GPIO group interrupt modules enable an interrupt based on a programmable pattern of input states of a group of GPIO pins
    • GPIO interrupt generation capability with boolean pattern-matching feature on eight external inputs
    • CRC engine
  • Timers
    • Five 32-bit general-purpose timer/counters with capture and match capabilities multiplexed to multiple pins. Each timer supports four capture inputs and four match outputs. Timer matches can be used to create PWM outputs. Each timer block has an external count input. Specific timer events can be selected to generate DMA requests
    • One 16/32-bit, multi-purpose State-Configurable Timer (SCTimer/PWM) on the AHB with configurable PWM capabilities. Supports six inputs and eight outputs that can be routed to external pins or connected internally to other peripherals
    • 32-bit Real-time clock (RTC) with 1 s or 1 ms time resolution running in the always-on power domain. RTC supports an alarm function to wake-up from all low power modes including Deep power-down. The RTC is clocked by the 32 kHz oscillator
    • One 24-bit, four-channel Multi-Rate Timer (MRT) for general CPU timing tasks and autonomous timing
    • Windowed Watchdog Timer (WWDT)
    • Ultra-low power Micro-tick Timer, running from the Watchdog oscillator, that can be used to wake up the device from low power modes
    • Repetitive Interrupt Timer (RIT) for debug time-stamping and general-purpose use
  • Analog peripheral: 12-bit, 12-channel, Analog-to-Digital Converter (ADC) supporting 4.8 Msamples/s. The ADC supports two independent conversion sequences
  • Security
    • Unique ID for each device
  • Power-saving modes and wake-up
    • Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down
    • Wake-up from Deep-sleep and Power-down modes via activity on the USART, SPI, or I²C peripherals
    • Wake-up from Deep-sleep, Power-down, and Deep power-down modes via the RTC alarm interrupts
    • Self-timed wake-up from Deep power-down using the watchdog oscillator while all other on-chip resources are shut down
  • Power supply
    • Single 1.62 V to 3.6 V power supply for the I/O pad ring, the analog peripherals, and the core voltage
  • Power-On Reset (POR)
  • Brown-Out Detect (BOD) with separate thresholds for interrupt and forced reset
  • Operating temperature range -40 °C to 105 °C
  • Available in a LQFP64 package

Target Applications

  • Mobile handsets & tablets
  • Portable fitness & health monitoring
  • Intelligent sensing
  • Home and building automation (HABA)
  • Fleet management & asset tracking
  • Robotics & drones
  • Gaming accessories

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