Layerscape® Architecture

NXP® has developed a revolutionary new networking system architecture for QorIQ® platforms, built with ease-of-use in mind. Next-generation QorIQ LS series processors are built on Layerscape® architecture, which delivers unprecedented efficiency and scale for the smarter, more capable networks of tomorrow.

Layerscape architecture enables next-generation networks with up to 100 Gb/s performance and ground-breaking packet processing technology that allows customers to abstract hardware complexity and focus their resources on innovation at the application level.

The flexible, C-programmable packet processing engine abstracts tasks such as setup, initialization and tear down, allowing users to call resources and accelerators using standard Linux® objects and APIs.

Additionally, a uniform hardware and software model provides the compatibility and scalability required for customers designing end-to-end networking equipment from home-to carrier-class products. The unique, core-agnostic architecture incorporates the optimum core for the given application—ARM cores or Power Architecture cores.

General Purpose Processing

The general-purpose processing domain is composed of highly efficient general-purpose processing nodes, a coherent interconnect and a latency-and bandwidth-tuned memory subsystem. General purpose processing enables intelligent routing of inter-CPU traffic and supports application-aware cache warming.

Advanced Packet Processing

The advanced packet processing domain performs autonomous packet processing or provides offload packet processing functions for general purpose processing. It is also flexible enough to enable customers to program value added capabilities in a traditional sequential, synchronous, run to completion model hiding the hardware microarchitecture through embedded C-based structured programming. Accelerated packet processing consists of:

  • Accelerated packet processor
  • Decompression engine
  • Security engine (SEC)
  • Load balancing engine
  • Pattern matching engine
  • L2-L7 switching
  • Packet buffer

Wire Rate I/O

The wirerate I/O domain facilitates true, deterministic wirerate performance between all network interfaces (up to 100G), supporting L2+ switching capabilities. This layer supports I/O protocol specific capabilities including PCI Express®, Ethernet and Interlaken.

Ease of Use Toolkit

QorIQ processors built on Layerscape architecture feature a comprehensive ecosystem to assure that ease of use is first priority. The complete offering includes:

  • APIs that are compliant with industry-standard consortiums
  • Management software that takes care of setup, initialization and teardown of interfaces, accelerators and networking functions
  • Functional datapath libraries that are performance optimized
  • NXP VoriQa software applications that are bundled for quick networking application deployment
  • Tools (e.g., accelerators, debug) to make sure you spend your time creating value added software
  • Powerful combination of NXP and partner ecosystems for best-in-class support
  • Open-source software, available upstream for all customers to leverage

Featured Products

  • QorIQ LS1 Family: Extensive integration and power efficiency for fanless, small form factor applications
  • QorIQ LS2 Family: Multicore SoCs with next-generation data path optimized for SDN applications