N-channel TrenchMOS logic and standard level FET
Logic and standard level gate drive N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using advanced TrenchMOS technology. This product has been designed and qualified to the appropriate AEC Q101 standard for use in high performance automotive applications.
|VDS||drain-source voltage||Tj ≥ 25 °C; Tj ≤ 175 °C||55||V|
|ID||drain current||Tmb = 25 °C; VGS = 10 V ||100||A|
|Ptot||total power dissipation||Tmb = 25 °C||158||W|
|RDSon||drain-source on-state resistance||VGS = 10 V; ID = 25 A; Tj = 25 °C||5.5||6.5||mΩ|
|QGD||gate-drain charge||ID = 25 A; VDS = 44 V; VGS = 10 V||19||nC|
|EDS(AL)S||non-repetitive drain-source avalanche energy||ID = 100 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped||128||mJ|
|Pin||Symbol||Description||Simplified outline||Graphic symbol|
|mb||D||mounting base; connected to drain|
Sample orders normally take 2-4 days for delivery.
If you do not have a direct account with NXP our network of global and regional distributors is available and equipped to support you with NXP samples. As a NXP customer you also have the option to order samples via our sales organisation.