NXP’s new family of low-voltage (LV) GPIO with Agile I/O expand the two wires of the I2C-bus into eight, 16, or 24 general-purpose I/O pins that can interface to keyboards, switches, LEDs, displays, or even stepping motors – saving valuable pins on the microprocessor or custom ASIC. The family has nine members with Agile I/O and nine members without. The devices that don’t implement Agile I/O are 100% compatible with industry-standard devices, giving users supply alternatives and the advantage of second sources.
Devices in the LV GPIO family are differentiated by the number of I/O pins: eight, 16, or 24. Other differences come from implementing features like RESET and Interrupt. To aid in PCB layout, the device pinouts are similar. This lets the designer select the family and delay feature selection until later in the process.
Low-voltage operation (1.65 to 5.5 V) and low current consumption make these devices ideal for a wide range of applications in portable, industrial, and automotive segments.
Dual power-supply components allow for bidirectional level translation in systems that need to interface with the outside world.
|Features||Industry Standard Device (2.3 to 5.5V)||NXP LV Device (1.65 to 5.5V)||NXP LV Device with Agile I/O (1.65 - 5.5V)||NXP LV device with two VCC for level translation|
|INT & Reset||PCA9538||PCA9538A||PCAL9538A|
|INT & pull-up||PCA9554 |
|INT & Reset||PCA9539||PCA9539A||PCAL9539A|
|INT & pull-up||PCA9555||PCA9555A||PCAL9555A|
|INT & Reset|
|INT & pull-up|
- Brochure: NXP 8/16/24-bit LV GPIO PCA(L)64xx and PCA(L)95xx: “Agile I/O” versions reduce system cost and ease software development