
ADC1212D105HN
Dual 12-bit ADC; 105 Msps;
The ADC1212D105HN is a dual channel 12-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 105 Msps. Pipelined architecture and output error correction ensure the ADC1212D105HN is accurate enough to guarantee zero missing codes over the entire operating range.

ADC1212D105F1ADC1212D105F1 demo board; CMOS version; SPI and CMOS buffer on board
ADC1212D105F2ADC1212D105F2 demo board; LVDS/DDR version
| Symbol | Parameter | Conditions | Min | Typ/Nom | Max | Unit |
|---|---|---|---|---|---|---|
| VDDA | analog supply voltage | 2.85 | 3 | 3.4 | V | |
| VDDO | output supply voltage | CMOS mode | 1.65 | 1.8 | 3.6 | V |
| VDDO | output supply voltage | LVDS DDR mode | 2.85 | 3 | 3.6 | V |
| IDDA | analog supply current | fclk = 125 Msps; fi = 70 MHz | 370 | mA | ||
| IDDO | output supply current | LVDS DDR mode; fclk = 125 Msps; fi = 70 MHz | 90 | mA | ||
| IDDO | output supply current | CMOS mode; fclk = 125 Msps; fi = 70 MHz | 40 | mA | ||
| Tamb | ambient temperature | -40 | 85 | °C | ||
| fs | sampling rate | 105 | Msps | |||
| Nch | number of channels | 2 | ||||
| Nfunc | number of functions | 2 | ||||
| Nres | resolution | 12 | bit | |||
| Tj | junction temperature | 125 | °C | |||
| Tstg | storage temperature | -55 | 125 | °C | ||
| Static characteristics | ||||||
| Ptot | total power dissipation | analog supply only | 975 | mW | ||
| Dynamic characteristics | ||||||
| SFDR | spurious-free dynamic range | fi = 3 MHz | 85 | dBc | ||
| SNR | signal-to-noise ratio | fi = 3 MHz | 69.8 | dBFS | ||
| Type number | Orderable part number | Ordering code (12NC) | Product status | Package | Packing | Marking |
|---|---|---|---|---|---|---|
| ADC1212D105HN/C1 | ADC1212D105HN/C1,5 | 9352 890 94518 | Volume production | SOT804-3 | Reel Dry Pack, SMD, 13" | Standard Marking |
| ADC1212D105HN/C1 | ADC1212D105HN/C1:5 | 9352 890 94551 | Volume production | SOT804-3 | Tray Dry Pack, Bakeable, Single | Standard Marking |
| Type number | Orderable part number | Chemical content | RoHS | Leadfree conversion date | RHF | IFR (FIT) | MTBF (hours) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|
| ADC1212D105HN/C1 | ADC1212D105HN/C1,5 | ADC1212D105HN/C1 | Always Pb-free | 3 | 3 | ||||
| ADC1212D105HN/C1 | ADC1212D105HN/C1:5 | ADC1212D105HN/C1 | Always Pb-free | 3 | 3 |
If you have any questions related to this product please contact our support team via e-mail: dataconverter-support@nxp.com. Thank you for your cooperation.
| Type | Format | Title | Date |
|---|---|---|---|
| Data sheet | Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs (v.2.0) | 2011-03-04 | |
| Brochure | Your partner in Mobile Communication Infrastructure design; High Performance RF for wireless infrastructure (v.1.0) | 2011-05-23 | |
| Leaflet | Single-channel ADC with input buffer (v.1.0) | 2010-09-13 | |
| Other type | Quick Start guide (v.7.0) | 2010-08-06 | |
| Report | Technical analysis of the JEDEC JESD204A data converter interface (v.2.1) | 2011-10-14 | |
| Report | Power consumption benefits of JESD204 serial interface (v.1.0) | 2010-12-23 | |
| Selection guide | NXP high-speed ADC/DAC selection guide (v.1.0) | 2011-12-14 |
Sample orders normally take 2-4 days for delivery.
If you do not have a direct account with NXP our network of global and regional distributors is available and equipped to support you with NXP samples. As a NXP customer you also have the option to order samples via our sales organisation.
ADC1212D105F1 demo board; CMOS version; SPI and CMOS buffer on board
ADC1212D105F2 demo board; LVDS/DDR version
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