41 results shown.
| Typenumber | Package | Category | Propagation delay | Fmax | Description | Voltage | Output drive capability | Power dissipation considerations | Number of pins | Logic switching levels |
|---|---|---|---|---|---|---|---|---|---|---|
| 74AHC1G09GV | SOT753 | AND gates | 3.2@5V | PicoGate 2-Input AND Gate with open-drain output | 2.0-5.5 V | +/- 8 mA | Low Power or Battery Applications | 5 | CMOS | |
| 74AHC1G09GW | SOT353 | AND gates | 3.2@5V | PicoGate 2-Input AND Gate with open-drain output | 2.0-5.5 V | +/- 8 mA | Low Power or Battery Applications | 5 | CMOS | |
| 74HC73D | SOT108-1 | J-K type flip-flops | 16@5V | 77 | Dual J-K Flip-Flop with Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | 14 | CMOS |
| 74HC73DB | SOT337-1 | J-K type flip-flops | 16@5V | 77 | Dual J-K Flip-Flop with Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | 14 | CMOS |
| 74HC73N | SOT27-1 | J-K type flip-flops | 16@5V | 77 | Dual J-K Flip-Flop with Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | 14 | CMOS |
| 74HC73PW | SOT402-1 | J-K type flip-flops | 16@5V | 77 | Dual J-K Flip-Flop with Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | 14 | CMOS |
| 74HC107D | SOT108-1 | J-K type flip-flops | 16@5V | 78 | Dual J-K Flip-Flop with Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | 14 | CMOS |
| 74HC107DB | SOT337-1 | J-K type flip-flops | 16@5V | 78 | Dual J-K Flip-Flop with Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | 14 | CMOS |
| 74HC107N | SOT27-1 | J-K type flip-flops | 16@5V | 78 | Dual J-K Flip-Flop with Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | 14 | CMOS |
| 74HC107PW | SOT402-1 | J-K type flip-flops | 16@5V | 78 | Dual J-K Flip-Flop with Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | 14 | CMOS |
| 74HCT107D | SOT108-1 | J-K type flip-flops | 16 | 73 | Dual J-K Flip-Flop with Reset; Negative-Edge Trigger; TTL Enabled | 4.5-5.5V | +/- 4 mA | Low Power | 14 | TTL |
| 74HCT107N | SOT27-1 | J-K type flip-flops | 16 | 73 | Dual J-K Flip-Flop with Reset; Negative-Edge Trigger; TTL Enabled | 4.5-5.5V | +/- 4 mA | Low Power | 14 | TTL |
| I74F109D | SOT109-1 | J-K type flip-flops | 6.2 | 125 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger | 4.5-5.5 V | -1/+20 mA | 14 | TTL | |
| I74F109N | SOT38-4 | J-K type flip-flops | 6.2 | 125 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger | 4.5-5.5 V | -1/+20 mA | 14 | TTL | |
| N74F109D | SOT109-1 | J-K type flip-flops | 6.2 | 125 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger | 4.5-5.5 V | -1/+20 mA | 14 | TTL | |
| N74F109N | SOT38-4 | J-K type flip-flops | 6.2 | 125 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger | 4.5-5.5 V | -1/+20 mA | 14 | TTL | |
| 74HC109D | SOT109-1 | J-K type flip-flops | 15@5V | 75 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | CMOS | |
| 74HC109DB | SOT338-1 | J-K type flip-flops | 15@5V | 75 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | CMOS | |
| 74HC109N | SOT38-4 | J-K type flip-flops | 15@5V | 75 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | CMOS | |
| 74HCT109D | SOT109-1 | J-K type flip-flops | 17 | 61 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger; TTL Enabled | 4.5-5.5V | +/- 4 mA | Low Power | TTL | |
| 74HCT109DB | SOT338-1 | J-K type flip-flops | 17 | 61 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger; TTL Enabled | 4.5-5.5V | +/- 4 mA | Low Power | TTL | |
| 74HCT109N | SOT38-4 | J-K type flip-flops | 17 | 61 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger; TTL Enabled | 4.5-5.5V | +/- 4 mA | Low Power | TTL | |
| 74HCT109PW | SOT403-1 | J-K type flip-flops | 17 | 61 | Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger; TTL Enabled | 4.5-5.5V | +/- 4 mA | Low Power | TTL | |
| 74LVC109D | SOT109-1 | J-K type flip-flops | 4.0@3.3V | 330 | 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger | 1.2-3.6 | +/- 24 mA | Low Power or Battery Applications | TTL | |
| 74LVC109DB | SOT338-1 | J-K type flip-flops | 4.0@3.3V | 330 | 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger | 1-2-3.6 | +/- 24 mA | Low Power or Battery Applications | TTL | |
| 74LVC109PW | SOT403-1 | J-K type flip-flops | 4.0@3.3V | 330 | 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger | 1.2-3.6 | +/- 24 mA | Low Power or Battery Applications | TTL | |
| I74F112D | SOT109-1 | J-K type flip-flops | 5 | 100 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger | 4.5-5.5 V | -1/+20 mA | 16 | TTL | |
| I74F112N | SOT38-4 | J-K type flip-flops | 5 | 100 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger | 4.5-5.5 V | -1/+20 mA | 16 | TTL | |
| N74F112D | SOT109-1 | J-K type flip-flops | 5 | 100 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger | 4.5-5.5 V | -1/+20 mA | 16 | TTL | |
| N74F112N | SOT38-4 | J-K type flip-flops | 5 | 100 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger | 4.5-5.5 V | -1/+20 mA | 16 | TTL | |
| 74HC112D | SOT109-1 | J-K type flip-flops | 15@5V | 66 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | CMOS | |
| 74HC112DB | SOT338-1 | J-K type flip-flops | 17@5V | 66 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | CMOS | |
| 74HC112N | SOT38-4 | J-K type flip-flops | 17@5V | 66 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | CMOS | |
| 74HC112PW | SOT403-1 | J-K type flip-flops | 17@5V | 66 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger | 2.0-6.0 V | +/- 5.2 mA | Low Power or Battery Applications | CMOS | |
| 74HCT112D | SOT109-1 | J-K type flip-flops | 19 | 70 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger; TTL Enabled | 4.5-5.5V | +/- 4 mA | Low Power | TTL | |
| 74HCT112DB | SOT338-1 | J-K type flip-flops | 19 | 70 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger; TTL Enabled | 4.5-5.5V | +/- 4 mA | Low Power | TTL | |
| 74HCT112N | SOT38-4 | J-K type flip-flops | 19 | 70 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger; TTL Enabled | 4.5-5.5V | +/- 4 mA | Low Power | TTL | |
| 74HCT112PW | SOT403-1 | J-K type flip-flops | 19 | 70 | Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger; TTL Enabled | 4.5-5.5V | +/- 4 mA | Low Power | TTL | |
| HEC4027BT | SOT109-1 | J-K type flip-flops | ||||||||
| HEF4027BP | SOT38-4 | J-K type flip-flops | 30@15V | 30 @ 15 V | Dual JK Flip-Flop | 4.5-15.5 | +/- 2.4 mA @ 15 V | Low Power or Automotive Applications | 16 | CMOS |
| HEF4027BT | SOT109-1 | J-K type flip-flops | 30@15V | 30 @ 15 V | Dual JK Flip-Flop | 4.5-15.5 | +/- 2.4 mA @ 15 V | Low Power or Automotive Applications | 16 | CMOS |