MC9S12XE Memory Paging using Codewarrior Examples  Favorite


This presentation provides an overview of the MC9S12X family memory scheme. It provides a discussion of the memory paging mechanism utilized in many NXP® mcu products. There are hands-on exercises that can be used to support the presentation material. Presentation is best viewed in Slide-Show mode.

File size is 3.0 MBytes

Course Outline

    • Introduction
      • S12X Program Model
      • S12X Memory Resources
    • Understanding Memory Paging
      • Local Memory Map and Paged Memory
        • Lab 1: Accessing Paged Memory
        • Lab 2: Linking Big Objects
      • Global Memory Map
        • Lab 3 Working with Global Addresses
      • -Map Option (using MC9S12XEP100)
        • Lab 4: -map option on XEP100
    • Working with the XGATE Module
      • XINT Module
      • XGATE Module
      • Understanding an XGATE Project

What You'll Learn

    • Understand the memory map for the S12X family
    • Understand the S12X memory paging scheme
    • Review the registers used to page into memory
    • Experience memory paging using provided examples
    • Review XGate information


Customer Notice

Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from NXP for import or sale in the United States prior to September 2010: S12XE in 208 MAPBGA packages .