The NXP® Semiconductors SE97 measures temperature from -40 °C to +125 °C with JEDEC Grade B ±1 °C accuracy between +75 °C and +95 °C and also provide 256 bytes of EEPROM memory communicating via the I²C-bus/SMBus. It is typically mounted on a Dual In-line Memory Module (DIMM) measuring the DRAM temperature in accordance with the new JEDEC (JC-42.4) Mobile Platform Memory Module Temperature Sensor Component specification and also replacing the Serial Presence Detect (SPD) which is used to store memory module and vendor information.
The SE97 thermal sensor operates over the VDD range of 3.0 V to 3.6 V and the EEPROM over the range of 3.0 V to 3.6 V write and 1.7 V to 3.6 V read.
Placing the Temp Sensor (TS) on a DIMM allows accurate monitoring of the DIMM module temperature to better estimate the DRAM case temperature (TCASE) to prevent it from exceeding the maximum operating temperature of 85 °C. The chip set throttles the memory traffic based on the actual temperatures instead of the calculated worst-case temperature or the ambient temperature using a temp sensor mounted on the motherboard. There is up to 30 % improvement in thin and light notebooks that are using one or two 1 GB SO-DIMM modules. The TS is required on DDR3 RDIMM and RDIMM ECC. Future uses of the TS will include more dynamic control over thermal throttling, the ability to use the Alarm Window to create multiple temperature zones for dynamic throttling and to save processor time by scaling the memory refresh rate. The TS consists of a ΔΣ Analog-to-Digital Converter (ADC) that monitors and updates its own temperature readings 10 times per second, converts the reading to a digital data, and latches them into the data temperature register. User-programmable registers, the specification of upper/lower alarm and critical temperature trip points, EVENT output control, and temperature shutdown, provide flexibility for DIMM temperature-sensing applications.
When the temperature changes beyond the specified boundary limits, the SE97 outputs an EVENT signal using an open-drain output that can be pulled up between 0.9 V and 3.6 V. The user has the option of setting the EVENT output signal polarity as either an active LOW or active HIGH comparator output for thermostat operation, or as a temperature event interrupt output for microprocessor-based systems. The EVENT output can even be configured as a critical temperature output.
The EEPROM is designed specifically for DRAM DIMMs SPD. The lower 128 bytes (address 00h to 7Fh) can be Permanent Write Protected (PWP) or Reversible Write Protected (RWP) by software. This allows DRAM vendor and product information to be stored and write protected. The upper 128 bytes (address 80h to FFh) are not write protected and can be used for general purpose data storage.
The SE97 has a single die for both the temp sensor and EEPROM for higher reliability and supports the industry-standard 2-wire I²C-bus/SMBus serial interface. The SMBus TIMEOUT function is supported to prevent system lock-ups. Manufacturer and Device ID registers provide the ability to confirm the identity of the device. Three address pins allow up to eight devices to be controlled on a single bus.