Telematics Box (T-Box)

Product Details

Block Diagram

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T-Box LPC5516

T-Box

T-Box LPC54S016

T-Box

Supported Devices

Interfaces

Secure CAN Transceivers

3.3 V / 5 V IO CAN Transceivers

Signal Conditioners

Wireless Connectivity

Wi-Fi® + Bluetooth® + 802.15.4

Sensors

Accelerometers

Processors and Microcontrollers

LPC5500 Arm Cortex-M33

Peripherals and Logic

Automotive RTCs

Features

Arm® Cortex®-M4 Core

  • Arm Cortex-M4 processor, running at a frequency of up to 180 MHz
  • Floating Point Unit (FPU) and Memory Protection Unit (MPU)
  • Arm Cortex-M4 built-in Nested Vectored Interrupt Controller (NVIC)
  • Non-maskable Interrupt (NMI) input with a selection of sources
  • Serial Wire Debug (SWD) with six instruction breakpoints, two literal comparators, and four watchpoints. Includes Serial Wire Output and ETM Trace for enhanced debug capabilities, and a debug timestamp counter
  • System tick timer

Serial interfaces

  • Flexcomm Interface contains up to 11 serial peripherals. Each Flexcomm Interface (except flexcomm 10, which is dedicated for SPI) can be selected by software to be a USART, SPI, or I2C interface. Two Flexcomm Interfaces also include an I2S interface. Each Flexcomm Interface includes a FIFO that supports USART, SPI, and I2S if supported by that Flexcomm Interface. A variety of clocking options are available to each Flexcomm Interface and include a shared fractional baud-rate generator
  • I2C-bus interfaces support Fast-mode and Fast-mode Plus with data rates of up to 1Mbit/s and with multiple address recognition and monitor mode. Two sets of true I2C pads also support High-Speed Mode (3.4 Mbit/s) as a target
  • Two ISO 7816 Smart Card Interfaces with DMA support
  • USB 2.0 high-speed host/device controller with on-chip high-speed PHY
  • USB 2.0 full-speed host/device controller with on-chip PHY and dedicated DMA controller supporting crystal-less operation in device mode
  • SPIFI with XIP feature uses up to four data lines to access off-chip SPI/DSPI/QSPI flash memory at a much higher rate than standard SPI or SSP interfaces
  • Ethernet MAC with MII/RMII interface with Audio Video Bridging (AVB) support and dedicated DMA controller
  • Two CAN FD modules with dedicated DMA controller

Digital peripherals

  • DMA controller with 32 channels and up to 24 programmable triggers, able to access all memories and DMA-capable peripherals
  • LCD Controller supporting both Super-Twisted Nematic (STN) and Thin-Film Transistor (TFT) displays. It has a dedicated DMA controller, selectable display resolution (up to 1024 x 768 pixels), and support up to 24-bit true-color mode
  • External Memory Controller (EMC) provides support for asynchronous static memory devices such as RAM, ROM and flash, in addition to dynamic memories such as single data rate SDRAM with an SDRAM clock of up to 100 MHz. EMC bus width (bit) on LQFP100 and TFBGA100 packages support up to 8/16 data line wide static memory
  • Secured digital input/output (SD/MMC and SDIO) card interface with DMA support
  • CRC engine block can calculate a CRC on supplied data using one of three standard polynomials with DMA support

Documentation

Quick reference to our documentation types.

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