KIT33905BD3EVBE: Evaluation Kit - 33905D3, SBC Gen2 with CAN and LIN

Overview

This evaluation board allows the user to implement the functionality of the 33905BD3 and 33904B3 System Basis Chips (SBC), which are the second generation family of System Basis Chips, which combine several features and enhance present module designs. The devices work as an advanced power management unit for the MCU and additional integrated circuits such as sensors, CAN transceivers. They have a built-in enhanced high speed CAN interface (ISO 11898-2 and -5), with local and bus failure diagnostics, protection, and fail-safe operation mode. The SBCs may include one or two LIN 2.0 interfaces with LIN output pin switches. The 33904/5 include 2 or 3 wake-up input pins than can also be configured as output drivers for flexibility.

This Evaluation kit may be used with the KITUSBSPIDGLEVME.

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Target Applications

Automotive Radar Systems

NXP<sup>®</sup> KIT33905DxEKEVBE Evaluation Kit Product Image

Specifications

Supported Devices

Power Management

CAN/LIN SBCs

MC33904 : System Basis Chip Gen2 with High Speed CAN

Interfaces

Automotive LIN Solutions

MC33905 : SBC Gen2 with High-Speed CAN and LIN

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Technical and Functional Specifications

Connectivity	Multiple CAN Bus termination options supported via socket Two high/low side I/Os (SPI configurable) accessible through test points 100 mil 2 x 8 pin standard header connector for SPI communication 100 mil 16-pin standard header connector for custom MCU board connections
Power Management	Nominal operating supply voltage range of 5.5 V to 27 V Individually routed power supply inputs for VSUP1 and VSUP2 5.0/3.3 V regulator for MCU with an external PNP ballast transistor to increase current capability MUX output voltage accessible through a test point and external resistor selectable through jumper 3.3 V or 5.0 V output voltage test point VAUX (SPI configurable)
Debug	Debug mode/watchdog configuration via jumper settings
General Specifications	Status of I/O-0 and I/O-1 indicated by an LED (dependent on jumper configuration) I/O-0, I/O-1, VAUX, 5 V_CAN, SAFE, and VDD status indicated by LED
Test Points	I_WAKE_I test point to enable a FET and load VDD with current to wake up the SBC LIN1_T and LIN2_T test points to monitor I/O voltages (SPI configurable)

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KIT33905BD3EVBE ^Active
Evaluation Kit - MC33905D3, System Basis Chip Gen2 with High Speed CAN and LIN Interface
- KIT33814AEEVBE Hardware
- Quick Reference Guide

KIT33905BD3EVBE
1 @ US
$85.00

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Upon selection of a preferred distributor, you will be directed to their web site to place and service your order. Please be aware that distributors are independent businesses and set their own prices, terms and conditions of sale. NXP makes no representations or warranties, express or implied, about distributors, or the prices, terms and conditions of sale agreed upon by you and any distributor.

Design Resources

Get Started

Get Started with the KIT33905BD3EVBE

User Guide

Everything you need to get started with the KIT33905BD3EVBE

KIT33905D5EKEVBE, KIT33905BD3EVBE, Evaluation Boards - User Guide^{(REV
2.0
)}
- 4.0 MB
- KT33905UG
- [ English ]

Documents

Data Sheet ( 1 )

MC33903-MC33904-MC33905, System Basis Chip Gen2 with High Speed CAN and LIN Interface - Data Sheet^{(REV
14.0
)}

The 33903/4/5 is the second generation family of the System Basis Chip (SBC).
- PDF
- 2.9 MB
- 01 Feb 2018
- MC33903-MC33904-MC33905
- [ English ]

Users Guide ( 1 )

KIT33905D5EKEVBE, KIT33905BD3EVBE, Evaluation Boards - User Guide^{(REV
2.0
)}

This evaluation board allows the user to implement the functionality of the MC33905 product System Basis Chip (SBC).
- PDF
- 4.0 MB
- 19 Sep 2011
- KT33905UG
- [ English ]

Errata ( 1 )

MC33903, MC33904, and MC33905, Mask M87W, Rev. 3.2 Errata^{(REV
1.0
)}

In some instances, the SPI write command is not properly interpreted by the device. This results in either a “non received SPI command” or a “corrupted SPI command”, caused by the synchronization between internal and external (oscillator and Chip Select) signals.
- PDF
- 280.5 kB
- 12 Sep 2011
- MC33903_4_5ER
- [ English ]

Design Resources

Design Tools & Files ( 1 )

Printed Circuit Boards and Schematics ( 1 )

KIT33905D5EKEVBEGRBR Gerber files to build PCB^{(REV
1.0
)}
- ZIP
- 821.8 kB
- 2010-03-09 00:00:00
- KIT33905D5EKEVBEGRBR
Download

Software

Development Software ( 1 )

Components and Modules ( 1 )

KIT33903_5 SPIGEN Configuration File^{(REV
1
)}
- SPI
- 6.2 kB
- 2013-05-06 00:00:00
- KIT33903_5SW
Download

KIT33905BD3EVBE: Evaluation Kit - 33905D3, SBC Gen2 with CAN and LIN

Overview

Target Applications

Specifications

Supported Devices

Power Management

Interfaces

Technical and Functional Specifications

Buy

KIT33905BD3EVBE Active

Related Products

Design Resources

Get Started

User Guide

Documents ( 3 )

Design Resources ( 1 )

Software ( 1 )

Documents

Data Sheet ( 1 )

MC33903-MC33904-MC33905, System Basis Chip Gen2 with High Speed CAN and LIN Interface - Data Sheet (REV 14.0 )

Users Guide ( 1 )

KIT33905D5EKEVBE, KIT33905BD3EVBE, Evaluation Boards - User Guide (REV 2.0 )

Errata ( 1 )

MC33903, MC33904, and MC33905, Mask M87W, Rev. 3.2 Errata (REV 1.0 )

Design Resources

Design Tools & Files ( 1 )

Printed Circuit Boards and Schematics ( 1 )

KIT33905D5EKEVBEGRBR Gerber files to build PCB (REV 1.0 )

Software

Development Software ( 1 )

Components and Modules ( 1 )

KIT33903_5 SPIGEN Configuration File (REV 1 )

KIT33905BD3EVBE ^Active

MC33903-MC33904-MC33905, System Basis Chip Gen2 with High Speed CAN and LIN Interface - Data Sheet^{(REV
14.0
)}

KIT33905D5EKEVBE, KIT33905BD3EVBE, Evaluation Boards - User Guide^{(REV
2.0
)}

MC33903, MC33904, and MC33905, Mask M87W, Rev. 3.2 Errata^{(REV
1.0
)}

KIT33905D5EKEVBEGRBR Gerber files to build PCB^{(REV
1.0
)}

KIT33903_5 SPIGEN Configuration File^{(REV
1
)}