/*
 * Copyright (c) 2010-2016, Freescale Semiconductor, Inc.
 * Copyright (c) 2016-2021, NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
#ifndef __APPCONFIG_H
#define __APPCONFIG_H

#define LPTMR_INTERRUPT_PRIORITY        0
#define AFE0_INTERRUPT_PRIORITY         1
#define AFE1_INTERRUPT_PRIORITY         1
#define AFE2_INTERRUPT_PRIORITY         1
#define AFE3_INTERRUPT_PRIORITY         1
#define ADC_INTERRUPT_PRIORITY          1
#define IRTC_INTERRUPT_PRIORITY         3
#define I2C_INTERRUPT_PRIORITY          2
#define UART_INTERRUPT_PRIORITY         2
#define TMR1_INTERRUPT_PRIORITY         2
#define TMR0_INTERRUPT_PRIORITY         2
#define TMR2_INTERRUPT_PRIORITY         2
#define TMR3_INTERRUPT_PRIORITY         2
#define CMP1_INTERRUPT_PRIOITY          3


#define PMC_MODULE_PRIORITY               1

#endif /* __APPCONFIG_ */
