/** ###################################################################
**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : Vectors.C
**     Project   : Led_Blink
**     Processor : MC9S08QE128CLH
**     Version   : Bean 01.001, Driver 01.27, CPU db: 3.00.001
**     Compiler  : CodeWarrior HCS08 C Compiler
**     Date/Time : 14/5/2007, 15:09
**     Abstract  :
**         This bean "MC9S08QE128_64" contains initialization of the
**         CPU and provides basic methods and events for CPU core
**         settings.
**     Settings  :
**
**
**     (c) Copyright UNIS, spol. s r.o. 1997-2006
**     UNIS, spol. s r.o.
**     Jundrovska 33
**     624 00 Brno
**     Czech Republic
**     http      : www.processorexpert.com
**     mail      : info@processorexpert.com
** ###################################################################*/


#include "Cpu.h"
#include "TI1.h"
#include "Bit1.h"
extern near void _EntryPoint(void);

void (* near const _vect[])() @0xFFC0 = { /* Interrupt vector table */
         Cpu_Interrupt,                /* Int.no.  0 Vtpm3ovf (at FFC0)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  1 Vtpm3ch5 (at FFC2)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  2 Vtpm3ch4 (at FFC4)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  3 Vtpm3ch3 (at FFC6)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  4 Vtpm3ch2 (at FFC8)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  5 Vtpm3ch1 (at FFCA)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  6 Vtpm3ch0 (at FFCC)              Unassigned */
         TI1_Interrupt,                /* Int.no.  7 Vrtc (at FFCE)                  Used */
         Cpu_Interrupt,                /* Int.no.  8 Vsci2tx (at FFD0)               Unassigned */
         Cpu_Interrupt,                /* Int.no.  9 Vsci2rx (at FFD2)               Unassigned */
         Cpu_Interrupt,                /* Int.no. 10 Vsci2err (at FFD4)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 11 Vacmpx (at FFD6)                Unassigned */
         Cpu_Interrupt,                /* Int.no. 12 Vadc (at FFD8)                  Unassigned */
         Cpu_Interrupt,                /* Int.no. 13 Vkeyboard (at FFDA)             Unassigned */
         Cpu_Interrupt,                /* Int.no. 14 Viicx (at FFDC)                 Unassigned */
         Cpu_Interrupt,                /* Int.no. 15 Vsci1tx (at FFDE)               Unassigned */
         Cpu_Interrupt,                /* Int.no. 16 Vsci1rx (at FFE0)               Unassigned */
         Cpu_Interrupt,                /* Int.no. 17 Vsci1err (at FFE2)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 18 Vspi1 (at FFE4)                 Unassigned */
         Cpu_Interrupt,                /* Int.no. 19 Vspi2 (at FFE6)                 Unassigned */
         Cpu_Interrupt,                /* Int.no. 20 Vtpm2ovf (at FFE8)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 21 Vtpm2ch2 (at FFEA)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 22 Vtpm2ch1 (at FFEC)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 23 Vtpm2ch0 (at FFEE)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 24 Vtpm1ovf (at FFF0)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 25 Vtpm1ch2 (at FFF2)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 26 Vtpm1ch1 (at FFF4)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 27 Vtpm1ch0 (at FFF6)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 28 Vlvd (at FFF8)                  Unassigned */
         Cpu_Interrupt,                /* Int.no. 29 Virq (at FFFA)                  Unassigned */
         Cpu_Interrupt,                /* Int.no. 30 Vswi (at FFFC)                  Unassigned */
         _EntryPoint                   /* Int.no. 31 Vreset (at FFFE)                Reset vector */
 };
/*
** ###################################################################
**
**     This file was created by UNIS Processor Expert 3.00 [03.89]
**     for the Freescale HCS08 series of microcontrollers.
**
** ###################################################################
*/
