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etpu_tg.c

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00001 /*******************************************************************************
00002 *
00003 * Freescale Semiconductor Inc.
00004 * (c) Copyright 2004-2014 Freescale Semiconductor, Inc.
00005 * ALL RIGHTS RESERVED.
00006 *
00007 ****************************************************************************//*!
00008 *
00009 * @file    etpu_tg.c
00010 *
00011 * @author  Milan Brejl [r54529]
00012 *
00013 * @version 1.0
00014 *
00015 * @date    17-Mar-2014
00016 *
00017 * @brief   This file contains API for using the eTPU function
00018 *          Tooth Generator (TG).
00019 *
00020 ****************************************************************************//*!
00021 *
00022 * @mainpage
00023 *
00024 * The eTPU TG APIs @ref etpu_tg.c/.h includes API functions for eTPU
00025 * function Tooth Generator, used to generate Crank & Cam patterns.
00026 *
00027 * Each instance of the TG eTPU function controls two eTPU channels.
00028 *
00029 * Features:
00030 * - Selectable polarity of the output signals.
00031 * - The crank tooth pattern is defined by
00032 *   - number of teeth between two gaps (@ref teeth_till_gap),
00033 *   - number of missing teeth in one gap (@ref teeth_in_gap) and
00034 *   - number of teeth per one engine cycle (@ref teeth_per_cycle).
00035 * - The crank tooth pattern including an additional tooth is not supported.
00036 * - The cam pattern is defined by the initial cam signal polarity and an array
00037 *   of cam transitions. The position of each transition is defined by the 
00038 *   corresponding crank tooth number.
00039 * - The engine speed is defined by tooth_period_target and an exponential
00040 *   acceleration/deceleration speed profile given by accel_ratio.
00041 * - The crank signal generation can be disabled/enabled at any time.
00042 * - The TG operation can be monitored using TG state variables
00043 *   tooth_counter_cycle and tooth_period_actual.
00044 * - No channel interrupt is generated by TG.
00045 *
00046 *******************************************************************************/
00047 /*******************************************************************************
00048 * Includes
00049 *******************************************************************************/
00050 #include "etpu_tg.h"     /* private header file */
00051 #include "etpu_util.h"    /* utility routines for working with the eTPU */
00052 
00053 /*******************************************************************************
00054 * Global variables
00055 *******************************************************************************/
00056 extern uint32_t fs_etpu_data_ram_start;
00057 extern uint32_t fs_etpu_data_ram_ext;
00058 
00059 /*******************************************************************************
00060 * FUNCTION: fs_etpu_tg_init
00061 ****************************************************************************//*!
00062 * @brief   This function initializes eTPU channels to run TG function.
00063 *
00064 * @note    The following actions are performed in order:
00065 *          -# Use user-defined CPBA or allocate new eTPU DATA RAM
00066 *          -# Write chan config registers and FM bits
00067 *          -# Write channel parameters
00068 *          -# Write HSR
00069 *          -# Set channel priority
00070 *
00071 * @param   *p_tg_instance - This is a pointer to the instance structure
00072 *            @ref tg_instance_t.
00073 * @param   *p_tg_config - This is a pointer to the structure of configuration
00074 *            parameters @ref tg_config_t.
00075 *
00076 * @return  Error codes that can be returned are:
00077 *          - @ref FS_ETPU_ERROR_MALLOC - eTPU DATA RAM memory allocation error
00078 *          - @ref FS_ETPU_ERROR_NONE - No error
00079 *
00080 * @warning This function does not configure the pins, only the eTPU channels.
00081 *******************************************************************************/
00082 uint32_t fs_etpu_tg_init(
00083   struct tg_instance_t *p_tg_instance,
00084   struct tg_config_t   *p_tg_config)
00085 {
00086   uint8_t  chan_num_crank;
00087   uint8_t  chan_num_cam;
00088   uint8_t  priority;
00089   uint8_t  cam_edge_count;
00090   uint8_t  *p_cam_edge_tooth;
00091   uint32_t *cpba;
00092   uint8_t  *cpba8_cam_edge_tooth;
00093   uint8_t  i;
00094 
00095   chan_num_crank   = p_tg_instance->chan_num_crank;
00096   chan_num_cam     = p_tg_instance->chan_num_cam;
00097   priority         = p_tg_instance->priority;
00098   cam_edge_count   = p_tg_instance->cam_edge_count;
00099   p_cam_edge_tooth = (uint8_t*)p_tg_instance->p_cam_edge_tooth;
00100   cpba             = p_tg_instance->cpba;
00101   cpba8_cam_edge_tooth = p_tg_instance->cpba8_cam_edge_tooth;
00102 
00103   /* Use user-defined CPBA or allocate new eTPU DATA RAM */
00104   if(cpba == 0)
00105   {
00106     cpba = fs_etpu_malloc(FS_ETPU_TG_NUM_PARMS);
00107     if(cpba == 0)
00108     {
00109       return(FS_ETPU_ERROR_MALLOC);
00110     }
00111     else
00112     {
00113       p_tg_instance->cpba = cpba;
00114     }
00115   }
00116 
00117   /* Use user-defined Cam-edge-tooth array or allocate new eTPU DATA RAM */
00118   if(cpba8_cam_edge_tooth == 0)
00119   {
00120     cpba8_cam_edge_tooth = (uint8_t*)fs_etpu_malloc(cam_edge_count);
00121     if(cpba8_cam_edge_tooth == 0)
00122     {
00123       return(FS_ETPU_ERROR_MALLOC);
00124     }
00125     else
00126     {
00127       p_tg_instance->cpba8_cam_edge_tooth = cpba8_cam_edge_tooth;
00128     }
00129   }
00130 
00131   /* Write chan config registers and FM bits */
00132   eTPU->CHAN[chan_num_crank].CR.R =
00133        (FS_ETPU_TG_TABLE_SELECT << 24) +
00134        (FS_ETPU_TG_FUNCTION_NUMBER << 16) +
00135        (((uint32_t)cpba - fs_etpu_data_ram_start) >> 3);
00136   eTPU->CHAN[chan_num_cam].CR.R = eTPU->CHAN[chan_num_crank].CR.R;
00137   eTPU->CHAN[chan_num_crank].SCR.R =
00138        (uint32_t)p_tg_instance->polarity_crank + FS_ETPU_TG_FM1_CRANK;
00139   eTPU->CHAN[chan_num_cam].SCR.R =
00140        (uint32_t)p_tg_instance->polarity_cam + FS_ETPU_TG_FM1_CAM;
00141 
00142   /* Write channel parameters */
00143   /* 24-bit */
00144   *(cpba + ((FS_ETPU_TG_OFFSET_TOOTH_TCR1_TIME     - 1)>>2)) = 0;
00145   *(cpba + ((FS_ETPU_TG_OFFSET_TOOTH_PERIOD_ACTUAL - 1)>>2)) = p_tg_config->tooth_period_target;
00146   *(cpba + ((FS_ETPU_TG_OFFSET_TOOTH_PERIOD_TARGET - 1)>>2)) = p_tg_config->tooth_period_target;
00147   *(cpba + ((FS_ETPU_TG_OFFSET_ACCEL_RATIO         - 1)>>2)) = p_tg_config->accel_ratio;
00148   *(cpba + ((FS_ETPU_TG_OFFSET_P_CAM_TOOTH_FIRST   - 1)>>2)) = (uint32_t)cpba8_cam_edge_tooth - fs_etpu_data_ram_start;
00149   *(cpba + ((FS_ETPU_TG_OFFSET_P_CAM_TOOTH         - 1)>>2)) = 0;
00150   /* 8-bit */
00151   *((uint8_t*)cpba + FS_ETPU_TG_OFFSET_TEETH_TILL_GAP     ) = p_tg_instance->teeth_till_gap;
00152   *((uint8_t*)cpba + FS_ETPU_TG_OFFSET_TEETH_IN_GAP       ) = p_tg_instance->teeth_in_gap;
00153   *((uint8_t*)cpba + FS_ETPU_TG_OFFSET_TEETH_PER_CYCLE    ) = p_tg_instance->teeth_per_cycle;
00154   *((uint8_t*)cpba + FS_ETPU_TG_OFFSET_TOOTH_COUNTER_GAP  ) = 0;
00155   *((uint8_t*)cpba + FS_ETPU_TG_OFFSET_TOOTH_COUNTER_CYCLE) = 0;
00156   *((uint8_t*)cpba + FS_ETPU_TG_OFFSET_CAM_CHAN           ) = chan_num_cam;
00157   *((uint8_t*)cpba + FS_ETPU_TG_OFFSET_GENERATION_DISABLE ) = p_tg_config->generation_disable;
00158 
00159   /* Write array of Cam-edge teeth */
00160   for(i=0; i<cam_edge_count; i++)
00161   {
00162     *cpba8_cam_edge_tooth++ = *p_cam_edge_tooth++;
00163   }
00164 
00165   /* Write HSR */
00166   eTPU->CHAN[chan_num_crank].HSRR.R = FS_ETPU_TG_HSR_INIT;
00167   eTPU->CHAN[chan_num_cam].HSRR.R   = FS_ETPU_TG_HSR_INIT;
00168 
00169   /* Set channel priority */
00170   fs_etpu_enable(chan_num_crank, priority);
00171   fs_etpu_enable(chan_num_cam, priority);
00172 
00173   return(FS_ETPU_ERROR_NONE);
00174 }
00175 
00176 /*******************************************************************************
00177 * FUNCTION: fs_etpu_tg_config
00178 ****************************************************************************//*!
00179 * @brief   This function changes the TG configuration.
00180 *
00181 * @note    The following actions are performed in order:
00182 *          -# Write FM bits
00183 *
00184 * @param   *p_tg_instance - This is a pointer to the instance structure
00185 *            @ref tg_instance_t.
00186 * @param   *p_tg_config - This is a pointer to the structure of configuration
00187 *            parameters @ref tg_config_t.
00188 *
00189 * @return  Error codes that can be returned are:
00190 *          - @ref FS_ETPU_ERROR_NONE - No error
00191 *
00192 *******************************************************************************/
00193 uint32_t fs_etpu_tg_config(
00194   struct tg_instance_t *p_tg_instance,
00195   struct tg_config_t   *p_tg_config)
00196 {
00197   uint32_t *cpba;
00198   uint32_t *cpbae;
00199 
00200   cpba = p_tg_instance->cpba;
00201   cpbae = cpba + (0x4000 >> 2); /* sign-extended memory area */
00202 
00203   /* Write channel parameters */
00204   /* 24-bit - use cpbae to prevent from overwriting bits 31:24 */
00205   *(cpbae + ((FS_ETPU_TG_OFFSET_TOOTH_PERIOD_TARGET - 1)>>2)) = p_tg_config->tooth_period_target;
00206   *(cpbae + ((FS_ETPU_TG_OFFSET_ACCEL_RATIO         - 1)>>2)) = p_tg_config->accel_ratio;
00207   /* 8-bit */
00208   *((uint8_t*)cpba + FS_ETPU_TG_OFFSET_GENERATION_DISABLE   ) = p_tg_config->generation_disable;
00209 
00210   return(FS_ETPU_ERROR_NONE);
00211 }
00212 
00213 /*******************************************************************************
00214 * FUNCTION: fs_etpu_tg_get_states
00215 ****************************************************************************//*!
00216 * @brief   This function reads state parameter values of the TG function.
00217 *
00218 * @note    The following actions are performed in order:
00219 *          -# Read output parameter values from eTPU DATA RAM
00220 *          -# Clear TG error flags in eTPU DATA RAM
00221 *
00222 * @param   *p_tg_instance - This is a pointer to the instance structure
00223 *            @ref tg_instance_t.
00224 * @param   *p_tg_states - This is a pointer to the structure of states
00225 *            @ref tg_states_t.
00226 *
00227 * @return  Error codes that can be returned are:
00228 *          - @ref FS_ETPU_ERROR_NONE - No error
00229 *
00230 *******************************************************************************/
00231 uint32_t fs_etpu_tg_get_states(
00232   struct tg_instance_t *p_tg_instance,
00233   struct tg_states_t   *p_tg_states)
00234 {
00235   uint32_t *cpba;
00236   uint32_t *cpbae;
00237 
00238   cpba = p_tg_instance->cpba;
00239   cpbae = cpba + (0x4000 >> 2); /* sign-extended memory area */
00240 
00241   /* Read channel parameters */
00242   p_tg_states->tooth_counter_cycle =
00243       *((uint8_t*)cpba + FS_ETPU_TG_OFFSET_TOOTH_COUNTER_CYCLE);
00244 
00245   p_tg_states->tooth_period_actual =
00246       *(cpbae + ((FS_ETPU_TG_OFFSET_TOOTH_PERIOD_ACTUAL - 1)>>2));
00247 
00248   return(FS_ETPU_ERROR_NONE);
00249 }
00250 
00251 
00252 
00253 /*******************************************************************************
00254  *
00255  * Copyright:
00256  *  Freescale Semiconductor, INC. All Rights Reserved.
00257  *  You are hereby granted a copyright license to use, modify, and
00258  *  distribute the SOFTWARE so long as this entire notice is
00259  *  retained without alteration in any modified and/or redistributed
00260  *  versions, and that such modified versions are clearly identified
00261  *  as such. No licenses are granted by implication, estoppel or
00262  *  otherwise under any patents or trademarks of Freescale
00263  *  Semiconductor, Inc. This software is provided on an "AS IS"
00264  *  basis and without warranty.
00265  *
00266  *  To the maximum extent permitted by applicable law, Freescale
00267  *  Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
00268  *  INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
00269  *  PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH
00270  *  REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
00271  *  AND ANY ACCOMPANYING WRITTEN MATERIALS.
00272  *
00273  *  To the maximum extent permitted by applicable law, IN NO EVENT
00274  *  SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER
00275  *  (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
00276  *  BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER
00277  *  PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
00278  *
00279  *  Freescale Semiconductor assumes no responsibility for the
00280  *  maintenance and support of this software
00281  ******************************************************************************/
00282 /*******************************************************************************
00283  *
00284  * REVISION HISTORY:
00285  *
00286  * FILE OWNER: Milan Brejl [r54529]
00287  *
00288  * Revision 1.0  2014/03/17  r54529
00289  * Minor comment and formating improvements.
00290  * Ready for eTPU Engine Control Library release 1.0.
00291  *
00292  * Revision 0.4  2013/10/22  r54529
00293  * generation_disable switch added.
00294  *
00295  * Revision 0.3  2013/07/24  r54529
00296  * Separate initial polarity for Crank and Cam.
00297  *
00298  * Revision 0.2  2013/06/20  r54529
00299  * Acceleration/deceleration added.
00300  *
00301  * Revision 0.1  2012/11/28  r54529
00302  * Initial version of file.
00303  ******************************************************************************/