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00001 /******************************************************************************* 00002 * 00003 * Freescale Semiconductor Inc. 00004 * (c) Copyright 2004-2014 Freescale Semiconductor, Inc. 00005 * ALL RIGHTS RESERVED. 00006 * 00007 ****************************************************************************//*! 00008 * 00009 * @file etpu_crank_emul.c 00010 * 00011 * @author Milan Brejl [r54529] 00012 * 00013 * @version 1.0 00014 * 00015 * @date 16-Mar-2014 00016 * 00017 * @brief This file contains API for using the eTPU function 00018 * Crank Emulator (CRANK_EMUL). 00019 * 00020 ****************************************************************************//*! 00021 * 00022 * @mainpage 00023 * 00024 * The eTPU CRANK_EMUL APIs @ref etpu_crank_emul.c/.h includes API functions for 00025 * eTPU function Crank Emulator. 00026 * The CRANK_EMUL eTPU function uses eTPU channel 0 (on eTPU2 optionally 00027 * channel 1 or 2) to generate internal TCR2 angle-base without processing any 00028 * input crank signal. 00029 * For testing porpuses in conditions when the crank signal is not available 00030 * the CRANK_EMUL eTPU function can be used to replace the CRANK function. 00031 * Crank Emulator drives the internal angle-base at a given speed and 00032 * consequently enables the injection, ignition and other output functions 00033 * to generate outputs. 00034 * 00035 * The API function prototypes and data structures are similar to the CRANK API, 00036 * so that the CRANK API can be easily replaced by CRANK_EMUL API 00037 * in an application just by replacing the header file inclusion. 00038 * 00039 *******************************************************************************/ 00040 /******************************************************************************* 00041 * Includes 00042 *******************************************************************************/ 00043 #include "etpu_crank_emul.h" /* private header file */ 00044 #include "etpu_util.h" /* utility routines for working with the eTPU */ 00045 00046 /******************************************************************************* 00047 * Global variables 00048 *******************************************************************************/ 00049 extern uint32_t fs_etpu_data_ram_start; 00050 extern uint32_t fs_etpu_data_ram_ext; 00051 00052 /******************************************************************************* 00053 * FUNCTION: fs_etpu_crank_init 00054 ****************************************************************************//*! 00055 * @brief This function initializes eTPU channels to run CRANK_EMUL function. 00056 * 00057 * @note The following actions are performed in order: 00058 * -# Use user-defined CPBA or allocate new eTPU DATA RAM 00059 * -# Write chan config registers and FM bits 00060 * -# Write channel and global parameters 00061 * -# Write HSR 00062 * -# Set channel priority 00063 * 00064 * @param *p_crank_instance - This is a pointer to the instance structure 00065 * @ref crank_instance_t. 00066 * @param *p_crank_config - This is a pointer to the structure of configuration 00067 * parameters @ref crank_config_t. 00068 * 00069 * @return Error codes that can be returned are: 00070 * - @ref FS_ETPU_ERROR_MALLOC - eTPU DATA RAM memory allocation error 00071 * - @ref FS_ETPU_ERROR_NONE - No error 00072 * 00073 * @warning This function does not configure the pins, only the eTPU channels. 00074 *******************************************************************************/ 00075 uint32_t fs_etpu_crank_init( 00076 struct crank_instance_t *p_crank_instance, 00077 struct crank_config_t *p_crank_config) 00078 { 00079 uint8_t chan_num; 00080 uint8_t priority; 00081 uint32_t *cpba_log; 00082 uint32_t *cpba; 00083 00084 chan_num = p_crank_instance->chan_num; 00085 priority = p_crank_instance->priority; 00086 cpba_log = p_crank_instance->cpba_tooth_period_log; 00087 cpba = p_crank_instance->cpba; 00088 00089 /* Use user-defined CPBA or allocate new eTPU DATA RAM */ 00090 if(cpba == 0) 00091 { 00092 cpba = fs_etpu_malloc(FS_ETPU_CRANK_EMUL_NUM_PARMS); 00093 if(cpba == 0) 00094 { 00095 return(FS_ETPU_ERROR_MALLOC); 00096 } 00097 else 00098 { 00099 p_crank_instance->cpba = cpba; 00100 } 00101 } 00102 00103 /* Use user-defined log or allocate new eTPU DATA RAM */ 00104 if(cpba_log == 0 00105 && p_crank_instance->log_tooth_periods == 00106 FS_ETPU_CRANK_FM1_TOOTH_PERIODS_LOG_ON) 00107 { 00108 cpba_log = fs_etpu_malloc(p_crank_instance->teeth_per_cycle<<2); 00109 if(cpba_log == 0) 00110 { 00111 return(FS_ETPU_ERROR_MALLOC); 00112 } 00113 else 00114 { 00115 p_crank_instance->cpba_tooth_period_log = cpba_log; 00116 } 00117 } 00118 00119 /* Write chan config registers and FM bits */ 00120 eTPU->CHAN[chan_num].CR.R = 00121 (FS_ETPU_CRANK_EMUL_TABLE_SELECT << 24) + 00122 (FS_ETPU_CRANK_EMUL_FUNCTION_NUMBER << 16) + 00123 (((uint32_t)cpba - fs_etpu_data_ram_start) >> 3); 00124 eTPU->CHAN[chan_num].SCR.R = (uint32_t)p_crank_instance->polarity 00125 + (uint32_t)p_crank_instance->log_tooth_periods; 00126 00127 /* Write channel parameters */ 00128 /* 24-bit */ 00129 *(cpba + ((FS_ETPU_CRANK_OFFSET_BLANK_TIME - 1)>>2)) = p_crank_config->blank_time; 00130 *(cpba + ((FS_ETPU_CRANK_OFFSET_TCR2_TICKS_PER_TOOTH - 1)>>2)) = p_crank_instance->tcr2_ticks_per_tooth; 00131 *(cpba + ((FS_ETPU_CRANK_OFFSET_LAST_TOOTH_TCR1_TIME - 1)>>2)) = 0; 00132 *(cpba + ((FS_ETPU_CRANK_OFFSET_LAST_TOOTH_PERIOD - 1)>>2)) = 0; 00133 *(cpba + ((FS_ETPU_CRANK_OFFSET_TCR2_ADJUSTMENT - 1)>>2)) = 0; 00134 *(cpba + ((FS_ETPU_CRANK_OFFSET_GAP_RATIO - 1)>>2)) = p_crank_config->gap_ratio; 00135 *(cpba + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_NORMAL - 1)>>2)) = p_crank_config->win_ratio_normal; 00136 *(cpba + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_ACROSS_GAP - 1)>>2)) = p_crank_config->win_ratio_across_gap; 00137 *(cpba + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_AFTER_GAP - 1)>>2)) = p_crank_config->win_ratio_after_gap; 00138 *(cpba + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_AFTER_TIMEOUT - 1)>>2)) = p_crank_config->win_ratio_after_timeout; 00139 *(cpba + ((FS_ETPU_CRANK_OFFSET_FIRST_TOOTH_TIMEOUT - 1)>>2)) = p_crank_config->first_tooth_timeout; 00140 *(cpba + ((FS_ETPU_CRANK_OFFSET_TOOTH_PERIOD_LOG - 1)>>2)) = (uint32_t)cpba_log - fs_etpu_data_ram_start; 00141 /* 8-bit */ 00142 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TEETH_TILL_GAP ) = p_crank_instance->teeth_till_gap; 00143 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TEETH_IN_GAP ) = p_crank_instance->teeth_in_gap; 00144 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TEETH_PER_CYCLE ) = p_crank_instance->teeth_per_cycle; 00145 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TEETH_PER_SYNC ) = p_crank_config->teeth_per_sync; 00146 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TOOTH_COUNTER_GAP ) = 0; 00147 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TOOTH_COUNTER_CYCLE) = 0; 00148 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_BLANK_TEETH ) = p_crank_config->blank_teeth; 00149 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_STATE ) = FS_ETPU_CRANK_SEEK; 00150 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_ERROR ) = FS_ETPU_CRANK_ERR_NO_ERROR; 00151 /* 32-bit */ 00152 *(cpba + (FS_ETPU_CRANK_OFFSET_LINK_CAM >>2)) = p_crank_instance->link_cam; 00153 *(cpba + (FS_ETPU_CRANK_OFFSET_LINK_1 >>2)) = p_crank_instance->link_1; 00154 *(cpba + (FS_ETPU_CRANK_OFFSET_LINK_2 >>2)) = p_crank_instance->link_2; 00155 *(cpba + (FS_ETPU_CRANK_OFFSET_LINK_3 >>2)) = p_crank_instance->link_3; 00156 *(cpba + (FS_ETPU_CRANK_OFFSET_LINK_4 >>2)) = p_crank_instance->link_4; 00157 00158 /* Write global parameters */ 00159 *((uint32_t*)fs_etpu_data_ram_start + ((FS_ETPU_OFFSET_ENG_CYCLE_TCR2_TICKS -1)>>2)) = 00160 p_crank_instance->tcr2_ticks_per_tooth * p_crank_instance->teeth_per_cycle; 00161 *((uint32_t*)fs_etpu_data_ram_start + ((FS_ETPU_OFFSET_ENG_CYCLE_TCR2_START -1)>>2)) = 0; 00162 *((uint8_t*)fs_etpu_data_ram_start + FS_ETPU_OFFSET_ENG_POS_STATE) = FS_ETPU_ENG_POS_SEEK; 00163 00164 /* Write HSR */ 00165 eTPU->CHAN[chan_num].HSRR.R = FS_ETPU_CRANK_HSR_INIT; 00166 00167 /* Set channel priority */ 00168 fs_etpu_enable(chan_num, priority); 00169 00170 return(FS_ETPU_ERROR_NONE); 00171 } 00172 00173 /******************************************************************************* 00174 * FUNCTION: fs_etpu_crank_config 00175 ****************************************************************************//*! 00176 * @brief This function changes the CRANK configuration. 00177 * In EMUL version, this has no effect! 00178 * 00179 * @note The following actions are performed in order: 00180 * -# Write configuration parameter values to eTPU DATA RAM 00181 * 00182 * @param *p_crank_instance - This is a pointer to the instance structure 00183 * @ref crank_instance_t. 00184 * @param *p_crank_config - This is a pointer to the structure of configuration 00185 * parameters @ref crank_config_t. 00186 * 00187 * @return Error codes that can be returned are: 00188 * - @ref FS_ETPU_ERROR_NONE - No error 00189 * 00190 *******************************************************************************/ 00191 uint32_t fs_etpu_crank_config( 00192 struct crank_instance_t *p_crank_instance, 00193 struct crank_config_t *p_crank_config) 00194 { 00195 uint32_t *cpba; 00196 uint32_t *cpbae; 00197 00198 cpba = p_crank_instance->cpba; 00199 cpbae = cpba + (0x4000 >> 2); /* sign-extended memory area */ 00200 00201 /* Write channel parameters */ 00202 /* 24-bit - use cpbae to prevent from overwriting bits 31:24 */ 00203 *(cpbae + ((FS_ETPU_CRANK_OFFSET_BLANK_TIME - 1)>>2)) = p_crank_config->blank_time; 00204 *(cpbae + ((FS_ETPU_CRANK_OFFSET_GAP_RATIO - 1)>>2)) = p_crank_config->gap_ratio; 00205 *(cpbae + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_NORMAL - 1)>>2)) = p_crank_config->win_ratio_normal; 00206 *(cpbae + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_ACROSS_GAP - 1)>>2)) = p_crank_config->win_ratio_across_gap; 00207 *(cpbae + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_AFTER_GAP - 1)>>2)) = p_crank_config->win_ratio_after_gap; 00208 *(cpbae + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_AFTER_TIMEOUT - 1)>>2)) = p_crank_config->win_ratio_after_timeout; 00209 *(cpbae + ((FS_ETPU_CRANK_OFFSET_FIRST_TOOTH_TIMEOUT - 1)>>2)) = p_crank_config->first_tooth_timeout; 00210 /* 8-bit */ 00211 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TEETH_PER_SYNC) = p_crank_config->teeth_per_sync; 00212 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_BLANK_TEETH ) = p_crank_config->blank_teeth; 00213 00214 return(FS_ETPU_ERROR_NONE); 00215 } 00216 00217 /******************************************************************************* 00218 * FUNCTION: fs_etpu_crank_get_states 00219 ****************************************************************************//*! 00220 * @brief This function reads state parameter values of the CRANK function. 00221 * 00222 * @note The following actions are performed in order: 00223 * -# Read parameter values from eTPU DATA RAM 00224 * -# Clear Crank error 00225 * 00226 * @param *p_crank_instance - This is a pointer to the instance structure 00227 * @ref crank_instance_t. 00228 * @param *p_crank_states - This is a pointer to the structure of states 00229 * @ref crank_states_t which is updated. 00230 * 00231 * @return Error codes that can be returned are: 00232 * - @ref FS_ETPU_ERROR_NONE - No error 00233 * 00234 *******************************************************************************/ 00235 uint32_t fs_etpu_crank_get_states( 00236 struct crank_instance_t *p_crank_instance, 00237 struct crank_states_t *p_crank_states) 00238 { 00239 uint32_t *cpba; 00240 uint32_t *cpbae; 00241 00242 cpba = p_crank_instance->cpba; 00243 cpbae = cpba + (0x4000 >> 2); /* sign-extended memory area */ 00244 00245 /* Read channel and global parameters */ 00246 p_crank_states->state = *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_STATE); 00247 p_crank_states->eng_pos_state = *((uint8_t*)fs_etpu_data_ram_start + FS_ETPU_OFFSET_ENG_POS_STATE); 00248 p_crank_states->tooth_counter_gap = *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TOOTH_COUNTER_GAP); 00249 p_crank_states->tooth_counter_cycle = *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TOOTH_COUNTER_CYCLE); 00250 p_crank_states->last_tooth_period = *(cpbae + ((FS_ETPU_CRANK_OFFSET_LAST_TOOTH_PERIOD - 1)>>2)); 00251 p_crank_states->error = *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_ERROR); 00252 /* Clear Crank error */ 00253 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_ERROR) = 0; 00254 00255 return(FS_ETPU_ERROR_NONE); 00256 } 00257 00258 00259 /******************************************************************************* 00260 * FUNCTION: fs_etpu_crank_set_sync 00261 ****************************************************************************//*! 00262 * @brief In EMUL version, this function adjusts the TCR2 angle counter. 00263 * 00264 * @note The following actions are performed in order: 00265 * -# Write channel parameter tcr2_adjustment 00266 * -# Write HSR FS_ETPU_CRANK_HSR_SET_SYNC 00267 * 00268 * @param *p_crank_instance - This is a pointer to the instance structure 00269 * @ref crank_instance_t. 00270 * @param tcr2_adjustment - This is the TCR2 angle value corresponding to the 00271 * fisrt tooth after the gap at which the recognized Cam log ends. 00272 * 00273 * @return Error codes that can be returned are: 00274 * - @ref FS_ETPU_ERROR_NONE - No error 00275 * 00276 *******************************************************************************/ 00277 uint32_t fs_etpu_crank_set_sync( 00278 struct crank_instance_t *p_crank_instance, 00279 uint24_t tcr2_adjustment) 00280 { 00281 uint32_t *cpba; 00282 uint32_t *cpbae; 00283 00284 cpba = p_crank_instance->cpba; 00285 cpbae = cpba + (0x4000 >> 2); /* sign-extended memory area */ 00286 00287 /* Write channel parameter - use cpbae to prevent from overwriting bits 31:24 */ 00288 *(cpbae + ((FS_ETPU_CRANK_OFFSET_TCR2_ADJUSTMENT - 1)>>2)) = tcr2_adjustment; 00289 00290 /* Write HSR */ 00291 eTPU->CHAN[p_crank_instance->chan_num].HSRR.R = FS_ETPU_CRANK_HSR_SET_SYNC; 00292 00293 return(FS_ETPU_ERROR_NONE); 00294 } 00295 00296 00297 /******************************************************************************* 00298 * FUNCTION: fs_etpu_crank_set_speed - EMUL version only 00299 ****************************************************************************//*! 00300 * @brief This function sets the CRANK tooth_period and starts the CRANK angle 00301 * counter if not started yet. 00302 * 00303 * @note The following actions are performed in order: 00304 * -# Write channel parameter last_tooth_period 00305 * -# Write HSR FS_ETPU_CRANK_HSR_SET_SPEED 00306 * 00307 * @param *p_crank_instance - This is a pointer to the instance structure 00308 * @ref crank_instance_t. 00309 * @param tooth_period - This is the TCR1 time value of a single tooth period. 00310 * 00311 * @return Error codes that can be returned are: 00312 * - @ref FS_ETPU_ERROR_NONE - No error 00313 * 00314 *******************************************************************************/ 00315 uint32_t fs_etpu_crank_set_speed( 00316 struct crank_instance_t *p_crank_instance, 00317 uint24_t tooth_period) 00318 { 00319 uint32_t *cpba; 00320 uint32_t *cpbae; 00321 00322 cpba = p_crank_instance->cpba; 00323 cpbae = cpba + (0x4000 >> 2); /* sign-extended memory area */ 00324 00325 /* Write channel parameter - use cpbae to prevent from overwriting bits 31:24 */ 00326 *(cpbae + ((FS_ETPU_CRANK_OFFSET_LAST_TOOTH_PERIOD - 1)>>2)) = tooth_period; 00327 00328 /* Write HSR */ 00329 eTPU->CHAN[p_crank_instance->chan_num].HSRR.R = FS_ETPU_CRANK_HSR_SET_SPEED; 00330 00331 return(FS_ETPU_ERROR_NONE); 00332 } 00333 00334 00335 /******************************************************************************* 00336 * FUNCTION: fs_etpu_crank_copy_tooth_period_log 00337 ****************************************************************************//*! 00338 * @brief This function copies the CRANK tooth_period_log into another array 00339 * in RAM. 00340 * 00341 * @param *p_crank_instance - This is a pointer to the instance structure 00342 * @ref crank_instance_t. 00343 * @param *p_tooth_period_log - This is a pointer where the CRANK 00344 * tooth_period_log will be copied to. The amount of data copied 00345 * in bytes is 4 * p_crank_instance->teeth_per_cycle. 00346 * 00347 * @return A pointer to a memory location just after the copied data. 00348 * 00349 *******************************************************************************/ 00350 uint24_t *fs_etpu_crank_copy_tooth_period_log( 00351 struct crank_instance_t *p_crank_instance, 00352 uint24_t *p_tooth_period_log) 00353 { 00354 uint24_t *dest; 00355 uint24_t *source; 00356 uint8_t size; 00357 00358 dest = p_tooth_period_log; 00359 source = p_crank_instance->cpba_tooth_period_log; 00360 size = p_crank_instance->teeth_per_cycle; 00361 00362 while(size--) 00363 { 00364 *dest++ = *source++; 00365 } 00366 00367 return(dest); 00368 } 00369 00370 00371 00372 /******************************************************************************* 00373 * 00374 * Copyright: 00375 * Freescale Semiconductor, INC. All Rights Reserved. 00376 * You are hereby granted a copyright license to use, modify, and 00377 * distribute the SOFTWARE so long as this entire notice is 00378 * retained without alteration in any modified and/or redistributed 00379 * versions, and that such modified versions are clearly identified 00380 * as such. No licenses are granted by implication, estoppel or 00381 * otherwise under any patents or trademarks of Freescale 00382 * Semiconductor, Inc. This software is provided on an "AS IS" 00383 * basis and without warranty. 00384 * 00385 * To the maximum extent permitted by applicable law, Freescale 00386 * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 00387 * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A 00388 * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH 00389 * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) 00390 * AND ANY ACCOMPANYING WRITTEN MATERIALS. 00391 * 00392 * To the maximum extent permitted by applicable law, IN NO EVENT 00393 * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER 00394 * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 00395 * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER 00396 * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 00397 * 00398 * Freescale Semiconductor assumes no responsibility for the 00399 * maintenance and support of this software 00400 ******************************************************************************/ 00401 /******************************************************************************* 00402 * 00403 * REVISION HISTORY: 00404 * 00405 * FILE OWNER: Milan Brejl [r54529] 00406 * 00407 * Revision 1.0 2014/03/16 r54529 00408 * Minor comment and formating improvements. 00409 * Ready for eTPU Engine Control Library release 1.0. 00410 * 00411 * Revision 0.2 2014/01/15 r54529 00412 * Improvment of DoxyGen comments. 00413 * 00414 * Revision 0.1 2013/03/29 r54529 00415 * Initial version based on standard etpu_crank.c v0.2. 00416 ******************************************************************************/
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