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00001 /******************************************************************************* 00002 * 00003 * Freescale Semiconductor Inc. 00004 * (c) Copyright 2004-2012 Freescale Semiconductor, Inc. 00005 * ALL RIGHTS RESERVED. 00006 * 00007 ****************************************************************************//*! 00008 * 00009 * @file etpu_util.c 00010 * 00011 * @author Milan Brejl [r54529] 00012 * 00013 * @version 3.2 00014 * 00015 * @date 21-Mar-2014 00016 * 00017 * @brief This file contains useful functions for using the eTPU and eTPU2. 00018 * 00019 ****************************************************************************//*! 00020 * 00021 * @mainpage 00022 * 00023 * The eTPU Utilities @ref etpu_util.c/.h includes low-level functions for 00024 * using the eTPU and eTPU2 module. The upper software levels should prevent 00025 * from direct access to eTPU registers by using these utilities. 00026 * 00027 * The included routines can be divided into several groups by application usage: 00028 * -# eTPU Module Initialization 00029 * - @ref fs_etpu_init 00030 * - @ref fs_etpu2_init (eTPU2-only) 00031 * -# eTPU Channel Initialization 00032 * - @ref fs_etpu_chan_init 00033 * - @ref fs_etpu_malloc 00034 * - @ref fs_etpu_malloc2 00035 * -# Run-Time eTPU Module Control 00036 * - @ref fs_timer_start 00037 * - @ref fs_etpu_get_global_exceptions, @ref fs_etpu_clear_global_exceptions 00038 * - @ref fs_etpu_get_global_error 00039 * - @ref fs_etpu_set_interrupt_mask_a, @ref fs_etpu_set_interrupt_mask_b 00040 * - @ref fs_etpu_set_dma_mask_a, @ref fs_etpu_set_dma_mask_b 00041 * - @ref fs_etpu_set_output_disable_mask_a, @ref fs_etpu_set_output_disable_mask_b 00042 * -# Run-Time eTPU Channel Control 00043 * - @ref fs_etpu_get_hsr, @ref fs_etpu_set_hsr 00044 * - @ref fs_etpu_enable, @ref fs_etpu_disable 00045 * - @ref fs_etpu_interrupt_enable, @ref fs_etpu_interrupt_disable 00046 * - @ref fs_etpu_get_chan_interrupt_flag, @ref fs_etpu_clear_chan_interrupt_flag 00047 * - @ref fs_etpu_dma_enable, @ref fs_etpu_dma_disable 00048 * - @ref fs_etpu_get_chan_dma_flag, @ref fs_etpu_clear_chan_dma_flag 00049 * -# eTPU DATA RAM Access 00050 * - @ref fs_etpu_data_ram 00051 * - @ref fs_etpu_get_chan_local_32, @ref fs_etpu_get_chan_local_24, @ref fs_etpu_get_chan_local_24s, @ref fs_etpu_get_chan_local_16, @ref fs_etpu_get_chan_local_8 00052 * - @ref fs_etpu_set_chan_local_32, @ref fs_etpu_set_chan_local_24, @ref fs_etpu_set_chan_local_16, @ref fs_etpu_set_chan_local_8 00053 * - @ref fs_etpu_get_global_32, @ref fs_etpu_get_global_24, @ref fs_etpu_get_global_24s, @ref fs_etpu_get_global_16, @ref fs_etpu_get_global_8 00054 * - @ref fs_etpu_set_global_32, @ref fs_etpu_set_global_24, @ref fs_etpu_set_global_16, @ref fs_etpu_set_global_8 00055 * - @ref fs_etpu_coherent_read_32, @ref fs_etpu_coherent_read_24 00056 * - @ref fs_etpu_coherent_write_32, @ref fs_etpu_coherent_write_24 00057 * -# eTPU Load Evaluation 00058 * - @ref fs_etpu_get_idle_cnt_a, @ref fs_etpu_clear_idle_cnt_a (eTPU2-only) 00059 * - @ref fs_etpu_get_idle_cnt_b, @ref fs_etpu_clear_idle_cnt_b (eTPU2-only) 00060 * -# Others 00061 * - @ref fs_memcpy32, @ref fs_memset32 00062 * 00063 *******************************************************************************/ 00064 /******************************************************************************* 00065 * Includes 00066 *******************************************************************************/ 00067 #include "etpu_util.h" /* prototypes and useful defines */ 00068 00069 /******************************************************************************* 00070 * Global variables 00071 *******************************************************************************/ 00072 extern uint32_t fs_etpu_code_start; 00073 extern uint32_t fs_etpu_data_ram_start; 00074 extern uint32_t fs_etpu_data_ram_end; 00075 extern uint32_t fs_etpu_data_ram_ext; 00076 00077 /******************************************************************************* 00078 * FUNCTION: fs_etpu_init 00079 ****************************************************************************//*! 00080 * @brief This function initializes the eTPU module. 00081 * 00082 * @note The following actions are performed in order: 00083 * -# Load eTPU code into code RAM 00084 * -# Initialize global registers: 00085 * - Module Control Register 00086 * - MISC value 00087 * - Engine Control Registers 00088 * - TCR pre-scalers 00089 * -# Copy initial values of global variables to data RAM 00090 * 00091 * @param p_etpu_config - This is the structure used to initialize the eTPU 00092 * @param *code - This is a pointer to an image of the eTPU code. 00093 * @param code_size - This is the size of the eTPU code in bytes. 00094 * @param *globals - This is a pointer to the global eTPU data that needs 00095 * to be initialized. 00096 * @param globals_size - This is the size of the global data in bytes. 00097 * 00098 * @return Zero or an error code. Error codes that can be returned are: 00099 * - @ref FS_ETPU_ERROR_CODESIZE - When the code is too big for the 00100 * available memory 00101 * - @ref FS_ETPU_ERROR_VIS_BIT_NOT_SET - When the SCM Visibility cannot 00102 * be set and SCM cannot be written. 00103 * 00104 * @warning This function does not configure the pins, only the eTPU. 00105 *******************************************************************************/ 00106 uint32_t fs_etpu_init( 00107 struct etpu_config_t p_etpu_config, 00108 uint32_t *code, 00109 uint32_t code_size, 00110 uint32_t *globals, 00111 uint32_t globals_size) 00112 { 00113 uint32_t *code_end; 00114 int32_t unused_code_ram; 00115 int8_t x; 00116 00117 unused_code_ram = ((eTPU->MCR.B.SCMSIZE + 1 ) * 2048) - code_size; 00118 if(unused_code_ram < 0) return((uint32_t)FS_ETPU_ERROR_CODESIZE); 00119 00120 /* 1. Load microcode */ 00121 /* In order for the MISC function to work with code that is small than 00122 * the code memory any unused locations must be set to zero. */ 00123 eTPU->ECR_A.B.MDIS = 1; /* stop eTPU_A */ 00124 eTPU->ECR_B.B.MDIS = 1; /* stop eTPU_B */ 00125 eTPU->MCR.B.VIS = 1; /* enable CPU writes to eTPU code memory */ 00126 00127 x = 0; 00128 while(x < 5) 00129 { 00130 if(eTPU->MCR.B.VIS == 1) break; 00131 x++; 00132 } 00133 00134 if(x > 4) return (FS_ETPU_ERROR_VIS_BIT_NOT_SET); 00135 00136 /* Copy microcode */ 00137 code_end = fs_memcpy32((uint32_t*)fs_etpu_code_start, code, code_size); 00138 00139 /* Clear rest of program memory */ 00140 fs_memset32(code_end, 0, unused_code_ram); 00141 00142 eTPU->MCR.B.VIS = 0; /* disable CPU writes to eTPU code memory */ 00143 00144 /* Configure MISC */ 00145 eTPU->MISCCMPR.R = p_etpu_config.misc; /*write MISC value before enabled in MCR */ 00146 eTPU->MCR.R = p_etpu_config.mcr; 00147 00148 /* Configure Engine 1 */ 00149 eTPU->ECR_A.R = p_etpu_config.ecr_a; 00150 if(eTPU->ECR_A.B.MDIS == 0) 00151 { 00152 eTPU->TBCR_A.R = p_etpu_config.tbcr_a; 00153 eTPU->REDCR_A.R = p_etpu_config.stacr_a; 00154 } 00155 00156 /* Configure Engine 2 */ 00157 /* Not all parts have a second eTPU engine, if yes, these write are ignored. */ 00158 eTPU->ECR_B.R = p_etpu_config.ecr_b; 00159 if(eTPU->ECR_B.B.MDIS == 0) 00160 { 00161 eTPU->TBCR_B.R = p_etpu_config.tbcr_b; 00162 eTPU->REDCR_B.R = p_etpu_config.stacr_b; 00163 } 00164 00165 /* 3. Copy initial global values to parameter RAM. */ 00166 fs_free_param = fs_memcpy32((uint32_t*)fs_etpu_data_ram_start, globals, globals_size); 00167 fs_free_param = (uint32_t*)((((uint32_t)fs_free_param + 7) >> 3) << 3); /* round up to 8s */ 00168 00169 return(0); 00170 } 00171 00172 /******************************************************************************* 00173 * FUNCTION: fs_etpu2_init 00174 ****************************************************************************//*! 00175 * @brief This function initializes the eTPU2-only setting of an eTPU2 module. 00176 * 00177 * @note For eTPU2, this function should be called after fs_etpu_init(...). 00178 * The following actions are performed in order: 00179 * -# Initialize Watchdog Timer 00180 * -# Allocate engine-relative data memory for each engine 00181 * 00182 * @param p_etpu_config - This is the structure used to initialize the eTPU2 00183 * watchdog timer on both engines. 00184 * @param engine_mem_size - This is the size of the engine relative data 00185 * in bytes. 00186 * 00187 * @return Zero or an error code. Error code that can be returned is: 00188 * - @ref FS_ETPU_ERROR_MALLOC - When the available free eTPU DATA RAM 00189 * is not big enough for the engine-relative data. 00190 * 00191 * @warning This function is applicable to eTPU2 only. 00192 *******************************************************************************/ 00193 uint32_t fs_etpu2_init( 00194 struct etpu_config_t p_etpu_config, 00195 uint32_t engine_mem_size) 00196 { 00197 /* 1. Initialize Watchdog Timer. */ 00198 /* Engine A Watchdog */ 00199 eTPU->WDTR_A.R = 0; /* disable first before a new mode is configured */ 00200 eTPU->WDTR_A.R = p_etpu_config.wdtr_a; 00201 00202 /* Engine B Watchdog */ 00203 /* Not all parts have a second eTPU engine, if don't these writes are ignored. */ 00204 eTPU->WDTR_B.R = 0; /* disable first before a new mode is configured */ 00205 eTPU->WDTR_B.R = p_etpu_config.wdtr_b; 00206 00207 /* 2. Allocate engine-relative data memory space for each engine. */ 00208 if(engine_mem_size > 0) 00209 { 00210 /* Engine A */ 00211 if(eTPU->ECR_A.B.MDIS == 0) 00212 { 00213 fs_free_param = (uint32_t*)((((uint32_t)fs_free_param+511)>>9)<<9); /* round up to 512s */ 00214 eTPU->ECR_A.B.ERBA = ((uint32_t)fs_free_param) >> 9; 00215 fs_memset32(fs_free_param, 0, engine_mem_size); 00216 fs_free_param = (uint32_t*)((uint32_t)fs_free_param + engine_mem_size); 00217 } 00218 /* Engine B */ 00219 if(eTPU->ECR_B.B.MDIS == 0) 00220 { 00221 fs_free_param = (uint32_t*)((((uint32_t)fs_free_param+511)>>9)<<9); /* round up to 512s */ 00222 eTPU->ECR_B.B.ERBA = ((uint32_t)fs_free_param) >> 9; 00223 fs_memset32(fs_free_param, 0, engine_mem_size); 00224 fs_free_param = (uint32_t*)((uint32_t)fs_free_param + engine_mem_size); 00225 } 00226 } 00227 fs_free_param = (uint32_t*)((((uint32_t)fs_free_param + 7) >> 3) << 3); /* round up to 8s */ 00228 00229 if ((uint32_t)fs_free_param > fs_etpu_data_ram_end) 00230 return(FS_ETPU_ERROR_MALLOC); 00231 else 00232 return(0); 00233 } 00234 00235 /******************************************************************************* 00236 * FUNCTION: fs_etpu_chan_init 00237 ****************************************************************************//*! 00238 * @brief This function initializes an eTPU channel. 00239 * 00240 * @param channel - The eTPU channel number 00241 * @param functions - The eTPU function number 00242 * @param mode - The eTPU function mode (FM bits) 00243 * @param hsr - The eTPU function initialization Host Service Request 00244 * @param num_param - The number of 32-bit eTPU function parameters 00245 * @param config - The eTPU function configuration register settings, e.g. 00246 * - @ref FS_ETPU_ENTRY_TABLE_STANDARD (default) or 00247 * - @ref FS_ETPU_ENTRY_TABLE_ALTERNATE 00248 * - @ref FS_ETPU_ENTRY_TABLE_PIN_INPUT (default) or 00249 * - @ref FS_ETPU_ENTRY_TABLE_PIN_OUTPUT (N/A on MCF523x and MPC5554) 00250 * @param *func_frame - The base address of the allocated eTPU channel DATA RAM. 00251 * If assigned by 0, the DATA RAM of num_param size is allocated. 00252 * 00253 * @return A pointer to the start of the eTPU DATA RAM allocated for the channel 00254 * or an error code. Error code that can be returned is: 00255 * - @ref FS_ETPU_ERROR_MALLOC - When the available DATA RAM 00256 * is not big enough for the channel data. 00257 *******************************************************************************/ 00258 uint32_t *fs_etpu_chan_init( 00259 uint8_t channel, 00260 uint8_t function, 00261 uint8_t mode, 00262 uint8_t hsr, 00263 uint8_t num_param, 00264 uint32_t config, 00265 uint32_t *func_frame) 00266 { 00267 if (func_frame == 0) { 00268 func_frame = fs_etpu_malloc((uint16_t)(num_param << 2)); 00269 if (func_frame == 0) return((uint32_t *)FS_ETPU_ERROR_MALLOC); 00270 } 00271 00272 eTPU->CHAN[channel].CR.R = config + (function<<16) + (((uint32_t)func_frame - fs_etpu_data_ram_start)>>3); 00273 eTPU->CHAN[channel].SCR.R = mode; 00274 eTPU->CHAN[channel].HSRR.R = hsr; 00275 00276 return(func_frame); 00277 } 00278 00279 /******************************************************************************* 00280 * FUNCTION: fs_etpu_data_ram 00281 ****************************************************************************//*! 00282 * @brief This function returns a pointer to the start of the data RAM for 00283 * the specified channel. 00284 * 00285 * @param channel - The eTPU channel number 00286 * 00287 * @return A pointer to the start of the eTPU DATA RAM allocated for the channel 00288 * 00289 * @warning This function does no error checking. If the channel has not been 00290 * initialized then an undefined value will be returned (normally 0). 00291 ******************************************************************************/ 00292 uint32_t *fs_etpu_data_ram( 00293 uint8_t channel) 00294 { 00295 return((uint32_t*)((uint8_t*)fs_etpu_data_ram_start + (eTPU->CHAN[channel].CR.B.CPBA << 3))); 00296 } 00297 00298 /******************************************************************************* 00299 * FUNCTION: fs_etpu_set_hsr 00300 ****************************************************************************//*! 00301 * @brief This function sets the Host Service Request (HSR) register of the 00302 * specified eTPU channel. 00303 * 00304 * @param channel - The eTPU channel number 00305 * @param hsr - The HSR value to send to the channel 00306 * 00307 * @warning The application should check that the HSR field is 0 before calling 00308 * this routine. If the HSR field is not 0 then the 2 values will be 00309 * ORed together. 00310 *******************************************************************************/ 00311 void fs_etpu_set_hsr( 00312 uint8_t channel, 00313 uint8_t hsr) 00314 { 00315 eTPU->CHAN[channel].HSRR.R = hsr; 00316 } 00317 00318 /******************************************************************************* 00319 * FUNCTION: fs_etpu_get_hsr 00320 ****************************************************************************//*! 00321 * @brief This function returns the current value of the Host Service Request 00322 * (HSR) register of the specified eTPU channel. 00323 * 00324 * @param channel - The eTPU channel number 00325 * 00326 * @return The value of HSR register 00327 *******************************************************************************/ 00328 uint8_t fs_etpu_get_hsr( 00329 uint8_t channel) 00330 { 00331 return((uint8_t)eTPU->CHAN[channel].HSRR.R); 00332 } 00333 00334 /******************************************************************************* 00335 * FUNCTION: fs_etpu_enable 00336 ****************************************************************************//*! 00337 * @brief This function enables or changes the priority of an eTPU channel. 00338 * 00339 * @param channel - The eTPU channel number 00340 * @param priority - The priority to be assigned to the channel. This should 00341 * be assigned a value of 00342 * - @ref FS_ETPU_PRIORITY_HIGH, 00343 * - @ref FS_ETPU_PRIORITY_MIDDLE, or 00344 * - @ref FS_ETPU_PRIORITY_LOW 00345 *******************************************************************************/ 00346 void fs_etpu_enable( 00347 uint8_t channel, 00348 uint8_t priority) 00349 { 00350 eTPU->CHAN[channel].CR.B.CPR = priority; 00351 } 00352 00353 /******************************************************************************* 00354 * FUNCTION: fs_etpu_disable 00355 ****************************************************************************//*! 00356 * @brief This function disables an eTPU channel. 00357 * 00358 * @param channel - The eTPU channel number 00359 * 00360 * @warning If the channel is currently being serviced then the service will 00361 * complete. 00362 *******************************************************************************/ 00363 void fs_etpu_disable( 00364 uint8_t channel) 00365 { 00366 eTPU->CHAN[channel].CR.B.CPR = FS_ETPU_PRIORITY_DISABLE; 00367 } 00368 00369 /******************************************************************************* 00370 * FUNCTION: fs_etpu_interrupt_enable 00371 ****************************************************************************//*! 00372 * @brief This function enables an eTPU channel to generate interrupts. 00373 * 00374 * @param channel - The eTPU channel number 00375 * 00376 * @warning This enables the eTPU to send interrupts to an interrupt 00377 * controller. Additional configuration may be required for 00378 * the CPU to receive the interrupts. 00379 *******************************************************************************/ 00380 void fs_etpu_interrupt_enable( 00381 uint8_t channel) 00382 { 00383 eTPU->CHAN[channel].CR.B.CIE = TRUE; 00384 } 00385 00386 /******************************************************************************* 00387 * FUNCTION: fs_etpu_interrupt_disable 00388 ****************************************************************************//*! 00389 * @brief This function disables an eTPU channel from generating interrupts. 00390 * 00391 * @param channel - The eTPU channel number 00392 * 00393 * @warning When interrupts are disabled the eTPU interrupt status bits are 00394 * still set and can be used to poll the interrupt status. 00395 *******************************************************************************/ 00396 void fs_etpu_interrupt_disable( 00397 uint8_t channel) 00398 { 00399 eTPU->CHAN[channel].CR.B.CIE = FALSE; 00400 } 00401 00402 /******************************************************************************* 00403 * FUNCTION: fs_etpu_dma_enable 00404 ****************************************************************************//*! 00405 * @brief This function enables an eTPU channel to request DMA service. 00406 * 00407 * @param channel - The eTPU channel number 00408 * 00409 * @warning In a given device not all of the DMA requests may be connected 00410 * to DMA channels. 00411 *******************************************************************************/ 00412 void fs_etpu_dma_enable( 00413 uint8_t channel) 00414 { 00415 eTPU->CHAN[channel].CR.B.DTRE = TRUE; 00416 } 00417 00418 /******************************************************************************* 00419 * FUNCTION: fs_etpu_dma_disable 00420 ****************************************************************************//*! 00421 * @brief This function disables an eTPU channel from generating DMA requests. 00422 * 00423 * @param channel - The eTPU channel number 00424 * 00425 * @warning When DMA requests are disabled the eTPU DMA request status bits are 00426 * still set and can be used to poll the DMA request status. 00427 *******************************************************************************/ 00428 void fs_etpu_dma_disable( 00429 uint8_t channel) 00430 { 00431 eTPU->CHAN[channel].CR.B.DTRE = FALSE; 00432 } 00433 00434 /******************************************************************************* 00435 * FUNCTION: fs_timer_start 00436 ****************************************************************************//*! 00437 * @brief This function starts the timebases. 00438 * 00439 * @note This functions synchronously starts the timebases of all timer 00440 * modules on a device. 00441 * 00442 * @param channel - The eTPU channel number 00443 *******************************************************************************/ 00444 void fs_timer_start(void) 00445 { 00446 eTPU->MCR.B.GTBE = TRUE; 00447 } 00448 00449 /******************************************************************************* 00450 * FUNCTION: fs_etpu_malloc 00451 ****************************************************************************//*! 00452 * @brief This function allocates DATA RAM (parameter RAM) for a channel. 00453 * 00454 * @param num_bytes - this is the number of bytes that is required to 00455 * allocate in DATA RAM. 00456 * 00457 * @return A pointer to allocated DATA RAM. If the requested amount of memory 00458 * is larger than the available amount of memory then 0 is returned. 00459 * 00460 * @warning This function is non-reentrant and uses the @ref fs_free_param global. 00461 * The granularity of eTPU DATA RAM allocation for channel parameters 00462 * is 8 bytes. The requested size is enlarged to a multiple of 8 bytes. 00463 *******************************************************************************/ 00464 uint32_t *fs_etpu_malloc( 00465 uint16_t num_bytes) 00466 { 00467 uint32_t *pba; 00468 00469 pba = fs_free_param; 00470 fs_free_param += (((num_bytes+7)>>3)<<1); 00471 00472 if(fs_free_param > (uint32_t *)fs_etpu_data_ram_end) 00473 return(0); 00474 else 00475 return(pba); 00476 } 00477 00478 /******************************************************************************* 00479 * FUNCTION: fs_etpu_malloc2 00480 ****************************************************************************//*! 00481 * @brief This function allocates DATA RAM for a channel if it has not been 00482 * allocated before. 00483 * 00484 * @note This function is similar to fs_etpu_malloc. The difference is 00485 * that this function first checks to see if the CPBA is not zero. 00486 * If it is not zero then it assumes the channel has already been 00487 * initialized and does not allocate more data RAM to the channel. 00488 * 00489 * @param channel - The eTPU channel number 00490 * @param num_bytes - this is the number of bytes that is required to 00491 * allocate in DATA RAM. 00492 * 00493 * @return A pointer to allocated DATA RAM. If the requested amount of memory 00494 * is larger than the available amount of memory then 0 is returned. 00495 * 00496 * @warning The granularity of eTPU DATA RAM allocation for channel parameters 00497 * is 8 bytes. The requested size is enlarged to a multiple of 8 bytes. 00498 *******************************************************************************/ 00499 uint32_t *fs_etpu_malloc2( 00500 uint8_t channel, 00501 uint16_t num_bytes) 00502 { 00503 uint32_t *pba; 00504 00505 if(eTPU->CHAN[channel].CR.B.CPBA == 0) 00506 { 00507 pba = fs_free_param; 00508 fs_free_param += (((num_bytes+7)>>3)<<1); 00509 00510 if(fs_free_param > (uint32_t *)fs_etpu_data_ram_end) 00511 return(0); 00512 else 00513 return(pba); 00514 } 00515 else 00516 { 00517 return(fs_etpu_data_ram(channel)); 00518 } 00519 } 00520 00521 /* set local variables */ 00522 /******************************************************************************* 00523 * FUNCTION: fs_etpu_set_chan_local_32 00524 ****************************************************************************//*! 00525 * @brief This function sets a 32-bit parameter for an eTPU channel. 00526 * 00527 * @param channel - The eTPU channel number 00528 * @param offset - The byte offset to the parameter. This must be a 32-bit 00529 * aligned value. This value is normally provided by the eTPU compiler. 00530 * @param value - The value to write to the parameter 00531 *******************************************************************************/ 00532 void fs_etpu_set_chan_local_32( 00533 uint8_t channel, 00534 uint32_t offset, 00535 uint32_t value) 00536 { 00537 *(uint32_t *)((uint32_t)fs_etpu_data_ram_start + (eTPU->CHAN[channel].CR.B.CPBA<<3) + offset) = value; 00538 } 00539 00540 /******************************************************************************* 00541 * FUNCTION: fs_etpu_set_chan_local_24 00542 ****************************************************************************//*! 00543 * @brief This function sets a 24-bit parameter for an eTPU channel. 00544 * 00545 * @note This function uses the sign extended location of the data memory 00546 * to write only 24 bits to the data memory. This 24 bit write is 00547 * an atomic operation and does not effect the upper 8 bits of the 00548 * 32 bit value associated with the 24 bits 00549 * 00550 * @param channel - The eTPU channel number 00551 * @param offset - The byte offset to the parameter. This must be a 24-bit 00552 * aligned value. This value is normally provided by the eTPU compiler. 00553 * @param value - The value to write to the parameter 00554 *******************************************************************************/ 00555 void fs_etpu_set_chan_local_24( 00556 uint8_t channel, 00557 uint32_t offset, 00558 uint24_t value) 00559 { 00560 *(uint32_t *)((uint32_t)fs_etpu_data_ram_ext + (eTPU->CHAN[channel].CR.B.CPBA<<3) + offset-1) = value; 00561 } 00562 00563 /******************************************************************************* 00564 * FUNCTION: fs_etpu_set_chan_local_16 00565 ****************************************************************************//*! 00566 * @brief This function sets a 16-bit parameter for an eTPU channel. 00567 * 00568 * @param channel - The eTPU channel number 00569 * @param offset - The byte offset to the parameter. This must be a 16-bit 00570 * aligned value. This value is normally provided by the eTPU compiler. 00571 * @param value - The value to write to the parameter 00572 *******************************************************************************/ 00573 void fs_etpu_set_chan_local_16( 00574 uint8_t channel, 00575 uint32_t offset, 00576 uint16_t value) 00577 { 00578 *(uint16_t *)((uint32_t)fs_etpu_data_ram_start + (eTPU->CHAN[channel].CR.B.CPBA<<3) + offset) = value; 00579 } 00580 00581 /******************************************************************************* 00582 * FUNCTION: fs_etpu_set_chan_local_8 00583 ****************************************************************************//*! 00584 * @brief This function sets an 8-bit parameter for an eTPU channel. 00585 * 00586 * @param channel - The eTPU channel number 00587 * @param offset - The byte offset to the parameter. This value is normally 00588 * provided by the eTPU compiler. 00589 * @param value - The value to write to the parameter 00590 *******************************************************************************/ 00591 void fs_etpu_set_chan_local_8( 00592 uint8_t channel, 00593 uint32_t offset, 00594 uint8_t value) 00595 { 00596 *(uint8_t *)((uint32_t)fs_etpu_data_ram_start + (eTPU->CHAN[channel].CR.B.CPBA<<3) + offset) = value; 00597 } 00598 00599 /* get local variables */ 00600 /******************************************************************************* 00601 * FUNCTION: fs_etpu_get_chan_local_32 00602 ****************************************************************************//*! 00603 * @brief This function reads a 32-bit parameter from an eTPU channel.. 00604 * 00605 * @param channel - The eTPU channel number 00606 * @param offset - The byte offset to the parameter. This must be a 32-bit 00607 * aligned value. This value is normally provided by the eTPU compiler. 00608 * 00609 * @return The 32-bit value of the parameter. 00610 *******************************************************************************/ 00611 uint32_t fs_etpu_get_chan_local_32( 00612 uint8_t channel, 00613 uint32_t offset) 00614 { 00615 return(*(uint32_t *)((uint32_t)fs_etpu_data_ram_start + (eTPU->CHAN[channel].CR.B.CPBA<<3) + offset)); 00616 } 00617 00618 /******************************************************************************* 00619 * FUNCTION: fs_etpu_get_chan_local_24s 00620 ****************************************************************************//*! 00621 * @brief This function reads a signed 24-bit parameter from an eTPU channel. 00622 * 00623 * @note This function uses the sign extended area of the DATA RAM. 00624 * 00625 * @param channel - The eTPU channel number 00626 * @param offset - The byte offset to the parameter. This must be a 24-bit 00627 * aligned value. This value is normally provided by the eTPU compiler. 00628 * 00629 * @return The signed 24-bit value of the parameter. 00630 *******************************************************************************/ 00631 int24_t fs_etpu_get_chan_local_24s( 00632 uint8_t channel, 00633 uint32_t offset) 00634 { 00635 return(*(int32_t *)((uint32_t)fs_etpu_data_ram_ext + (eTPU->CHAN[channel].CR.B.CPBA<<3) + offset-1)); 00636 } 00637 00638 /******************************************************************************* 00639 * FUNCTION: fs_etpu_get_chan_local_24 00640 ****************************************************************************//*! 00641 * @brief This function reads a unsigned 24-bit parameter from an eTPU channel. 00642 * 00643 * @param channel - The eTPU channel number 00644 * @param offset - The byte offset to the parameter. This must be a 24-bit 00645 * aligned value. This value is normally provided by the eTPU compiler. 00646 * 00647 * @return The unsigned 24-bit value of the parameter. 00648 *******************************************************************************/ 00649 uint24_t fs_etpu_get_chan_local_24( 00650 uint8_t channel, 00651 uint32_t offset) 00652 { 00653 return(0x00FFFFFF & (*(uint32_t *)((uint32_t)fs_etpu_data_ram_start + (eTPU->CHAN[channel].CR.B.CPBA<<3) + offset-1))); 00654 } 00655 00656 /******************************************************************************* 00657 * FUNCTION: fs_etpu_get_chan_local_16 00658 ****************************************************************************//*! 00659 * @brief This function reads a 16-bit parameter from an eTPU channel. 00660 * 00661 * @param channel - The eTPU channel number 00662 * @param offset - The byte offset to the parameter. This must be a 16-bit 00663 * aligned value. This value is normally provided by the eTPU compiler. 00664 * 00665 * @return The 16-bit value of the parameter. 00666 *******************************************************************************/ 00667 uint16_t fs_etpu_get_chan_local_16( 00668 uint8_t channel, 00669 uint32_t offset) 00670 { 00671 return(*(uint16_t *)((uint32_t)fs_etpu_data_ram_start + (eTPU->CHAN[channel].CR.B.CPBA<<3) + offset)); 00672 } 00673 00674 /******************************************************************************* 00675 * FUNCTION: fs_etpu_get_chan_local_8 00676 ****************************************************************************//*! 00677 * @brief This function reads an 8-bit parameter from an eTPU channel. 00678 * 00679 * @param channel - The eTPU channel number 00680 * @param offset - The byte offset to the parameter. This value is normally 00681 * provided by the eTPU compiler. 00682 * 00683 * @return The 8-bit value of the parameter. 00684 *******************************************************************************/ 00685 uint8_t fs_etpu_get_chan_local_8( 00686 uint8_t channel, 00687 uint32_t offset) 00688 { 00689 return(*(uint8_t *)((uint32_t)fs_etpu_data_ram_start + (eTPU->CHAN[channel].CR.B.CPBA<<3) + offset)); 00690 } 00691 00692 /* set global variables */ 00693 /******************************************************************************* 00694 * FUNCTION: fs_etpu_set_global_32 00695 ****************************************************************************//*! 00696 * @brief This function writes to a 32-bit global variable. 00697 * 00698 * @param offset - The byte offset to the variable. This must be a 32-bit 00699 * aligned value. This value is normally provided by the eTPU compiler. 00700 * @param value - The value to write to the parameter 00701 *******************************************************************************/ 00702 void fs_etpu_set_global_32( 00703 uint32_t offset, 00704 uint32_t value) 00705 { 00706 *(uint32_t *)((uint32_t)fs_etpu_data_ram_start + offset) = value; 00707 } 00708 00709 /******************************************************************************* 00710 * FUNCTION: fs_etpu_set_global_24 00711 ****************************************************************************//*! 00712 * @brief This function writes to a 24-bit global variable. 00713 * 00714 * @param offset - The byte offset to the variable. This must be a 24-bit 00715 * aligned value. This value is normally provided by the eTPU compiler. 00716 * @param value - The value to write to the parameter 00717 *******************************************************************************/ 00718 void fs_etpu_set_global_24( 00719 uint32_t offset, 00720 uint24_t value) 00721 { 00722 *(uint32_t *)((uint32_t)fs_etpu_data_ram_ext + offset-1) = value; 00723 } 00724 00725 /******************************************************************************* 00726 * FUNCTION: fs_etpu_set_global_16 00727 ****************************************************************************//*! 00728 * @brief This function writes to a 16-bit global variable. 00729 * 00730 * @param offset - The byte offset to the variable. This must be a 16-bit 00731 * aligned value. This value is normally provided by the eTPU compiler. 00732 * @param value - The value to write to the parameter 00733 *******************************************************************************/ 00734 void fs_etpu_set_global_16( 00735 uint32_t offset, 00736 uint16_t value) 00737 { 00738 *(uint16_t *)((uint32_t)fs_etpu_data_ram_start + offset) = value; 00739 } 00740 00741 /******************************************************************************* 00742 * FUNCTION: fs_etpu_set_global_8 00743 ****************************************************************************//*! 00744 * @brief This function writes to an 8-bit global variable. 00745 * 00746 * @param offset - The byte offset to the variable. This value is normally 00747 * provided by the eTPU compiler. 00748 * @param value - The value to write to the parameter 00749 *******************************************************************************/ 00750 void fs_etpu_set_global_8( 00751 uint32_t offset, 00752 uint8_t value) 00753 { 00754 *(uint8_t *)((uint32_t)fs_etpu_data_ram_start + offset) = value; 00755 } 00756 00757 /* get global variables */ 00758 /******************************************************************************* 00759 * FUNCTION: fs_etpu_get_global_32 00760 ****************************************************************************//*! 00761 * @brief This function reads a 32-bit global variable. 00762 * 00763 * @param offset - The byte offset to the variable. This must be a 32-bit 00764 * aligned value. This value is normally provided by the eTPU compiler. 00765 * 00766 * @return The 32-bit value of the variable. 00767 *******************************************************************************/ 00768 uint32_t fs_etpu_get_global_32( 00769 uint32_t offset) 00770 { 00771 return(*(uint32_t *)((uint32_t)fs_etpu_data_ram_start + offset)); 00772 } 00773 00774 /******************************************************************************* 00775 * FUNCTION: fs_etpu_get_global_24s 00776 ****************************************************************************//*! 00777 * @brief This function reads a signed 24-bit global variable. 00778 * 00779 * @note This function uses the sign extended area of the DATA RAM. 00780 * 00781 * @param offset - The byte offset to the variable. This must be a 24-bit 00782 * aligned value. This value is normally provided by the eTPU compiler. 00783 * 00784 * @return The signed 24-bit value of the variable. 00785 *******************************************************************************/ 00786 int24_t fs_etpu_get_global_24s( 00787 uint32_t offset) 00788 { 00789 return(*(int32_t *)((uint32_t)fs_etpu_data_ram_ext + offset-1)); 00790 } 00791 00792 /******************************************************************************* 00793 * FUNCTION: fs_etpu_get_global_24 00794 ****************************************************************************//*! 00795 * @brief This function reads an unsigned 24-bit global variable. 00796 * 00797 * @param offset - The byte offset to the variable. This must be a 24-bit 00798 * aligned value. This value is normally provided by the eTPU compiler. 00799 * 00800 * @return The unsigned 24-bit value of the variable. 00801 *******************************************************************************/ 00802 uint24_t fs_etpu_get_global_24( 00803 uint32_t offset) 00804 { 00805 return(0x00FFFFFF & (*(uint32_t *)((uint32_t)fs_etpu_data_ram_start + offset-1))); 00806 } 00807 00808 /******************************************************************************* 00809 * FUNCTION: fs_etpu_get_global_16 00810 ****************************************************************************//*! 00811 * @brief This function reads a 16-bit global variable. 00812 * 00813 * @param offset - The byte offset to the variable. This must be a 16-bit 00814 * aligned value. This value is normally provided by the eTPU compiler. 00815 * 00816 * @return The 16-bit value of the variable. 00817 *******************************************************************************/ 00818 uint16_t fs_etpu_get_global_16( 00819 uint32_t offset) 00820 { 00821 return(*(uint16_t *)((uint32_t)fs_etpu_data_ram_start + offset)); 00822 } 00823 00824 /******************************************************************************* 00825 * FUNCTION: fs_etpu_get_global_8 00826 ****************************************************************************//*! 00827 * @brief This function reads an 8-bit global variable. 00828 * 00829 * @param offset - The byte offset to the variable. This value is normally 00830 * provided by the eTPU compiler. 00831 * 00832 * @return The 8-bit value of the variable. 00833 *******************************************************************************/ 00834 uint8_t fs_etpu_get_global_8( 00835 uint32_t offset) 00836 { 00837 return(*(uint8_t *)((uint32_t)fs_etpu_data_ram_start + offset)); 00838 } 00839 00840 /******************************************************************************* 00841 * FUNCTION: fs_memcpy32 00842 ****************************************************************************//*! 00843 * @brief This function is similar to the standard C memset() function 00844 * however it sets 32-bit words rather than bytes. 00845 * 00846 * @param *dest - The pointer to the destination location 00847 * @param *source - The pointer to the source location 00848 * @param size - The size of the data to copy in bytes 00849 * 00850 * @return A pointer to the end of the copied data. 00851 * 00852 * @warning The *dest and *source pointers should be aligned to a 32-bit 00853 * address. If they are not it may cause memory exceptions. Moving 00854 * data to the eTPU code memory that is not 32-bit aligned is 00855 * undefined. The size should be a multiple of 4. If it is not 00856 * it is rounded down. 00857 *******************************************************************************/ 00858 uint32_t *fs_memcpy32( 00859 uint32_t *dest, 00860 uint32_t *source, 00861 uint32_t size) 00862 { 00863 uint32_t *p = dest; 00864 uint32_t *q = source; 00865 00866 size = size >> 2; 00867 00868 while(size--) 00869 { 00870 *p++ = *q++; 00871 } 00872 00873 return (p); 00874 } 00875 00876 /******************************************************************************* 00877 * FUNCTION: fs_memset32 00878 ****************************************************************************//*! 00879 * @brief This function is similar to the standard C memcpy() function 00880 * however it copies 32-bit words rather than bytes. 00881 * 00882 * @param *start - The pointer to the start location 00883 * @param *value - The value to write to memory 00884 * @param size - The size of the data to set in bytes 00885 * 00886 * @warning The *start pointers should be aligned to a 32-bit address. 00887 * If it is not it may cause memory exceptions. Writing 00888 * data to the eTPU code memory that is not 32-bit aligned is 00889 * undefined. The size should be a multiple of 4. If it is not 00890 * it is rounded down. 00891 *******************************************************************************/ 00892 void fs_memset32( 00893 uint32_t *start, 00894 uint32_t value, 00895 int32_t size) 00896 { 00897 uint32_t *p = start; 00898 00899 size = size >> 2; 00900 00901 while(size--) 00902 { 00903 *p++ = value; 00904 } 00905 } 00906 00907 /******************************************************************************* 00908 * FUNCTION: fs_etpu_set_interrupt_mask_a 00909 ****************************************************************************//*! 00910 * @brief This function enables or disables channel interrupt for each engine A 00911 * channel according to the given mask. 00912 * 00913 * @param mask - The interrupt enable mask. A value of: 00914 * - 0x00000001 enables interrupt on channel 0 only, 00915 * - 0x80000000 enables interrupt on channel 31 only 00916 *******************************************************************************/ 00917 void fs_etpu_set_interrupt_mask_a( 00918 uint32_t mask) 00919 { 00920 eTPU->CIER_A.R = mask; 00921 } 00922 00923 /******************************************************************************* 00924 * FUNCTION: fs_etpu_set_interrupt_mask_b 00925 ****************************************************************************//*! 00926 * @brief This function enables or disables channel interrupt for each engine B 00927 * channel according to the given mask. 00928 * 00929 * @param mask - The interrupt enable mask. A value of: 00930 * - 0x00000001 enables interrupt on channel 64 only, 00931 * - 0x80000000 enables interrupt on channel 95 only 00932 *******************************************************************************/ 00933 void fs_etpu_set_interrupt_mask_b( 00934 uint32_t mask) 00935 { 00936 eTPU->CIER_B.R = mask; 00937 } 00938 00939 /******************************************************************************* 00940 * FUNCTION: fs_etpu_set_dma_mask_a 00941 ****************************************************************************//*! 00942 * @brief This function enables or disables channel DMA request for each engine 00943 * A channel according to the given mask. 00944 * 00945 * @param mask - The DMA enable mask. A value of: 00946 * - 0x00000001 enables DMA requests on channel 0 only, 00947 * - 0x80000000 enables DMA requests on channel 31 only 00948 *******************************************************************************/ 00949 void fs_etpu_set_dma_mask_a( 00950 uint32_t mask) 00951 { 00952 eTPU->CDTRER_A.R = mask; 00953 } 00954 00955 /******************************************************************************* 00956 * FUNCTION: fs_etpu_set_dma_mask_b 00957 ****************************************************************************//*! 00958 * @brief This function enables or disables channel DMA request for each engine 00959 * B channel according to the given mask. 00960 * 00961 * @param mask - The DMA enable mask. A value of: 00962 * - 0x00000001 enables DMA requests on channel 64 only, 00963 * - 0x80000000 enables DMA requests on channel 95 only 00964 *******************************************************************************/ 00965 void fs_etpu_set_dma_mask_b( 00966 uint32_t mask) 00967 { 00968 eTPU->CDTRER_B.R = mask; 00969 } 00970 00971 /******************************************************************************* 00972 * FUNCTION: fs_etpu_set_output_disable_mask_a 00973 ****************************************************************************//*! 00974 * @brief This function enables or disables the channel "output disable" 00975 * feature for each engine A channel according to the given mask and 00976 * polarity. 00977 * 00978 * @param mask - The "output disable" enable mask. A value of: 00979 * - 0x00000001 enables the "output disable" feature on channel 0 only, 00980 * - 0x80000000 enables the "output disable" feature on channel 31 only 00981 * @param polarity - The "output disable" polarity mask. A value of: 00982 * - 0x00000001 sets the high polarity of disabled output on channel 0 00983 * and low polarity of disabled output on all other channels 00984 *******************************************************************************/ 00985 void fs_etpu_set_output_disable_mask_a( 00986 uint32_t mask, 00987 uint32_t polarity) 00988 { 00989 uint8_t i; 00990 00991 for(i=0; i<32; i++) 00992 { 00993 eTPU->CHAN[i].CR.B.ODIS = mask & 0x00000001; 00994 eTPU->CHAN[i].CR.B.OPOL = polarity & 0x00000001; 00995 mask >>= 1; 00996 polarity >>= 1; 00997 } 00998 } 00999 01000 /******************************************************************************* 01001 * FUNCTION: fs_etpu_set_output_disable_mask_b 01002 ****************************************************************************//*! 01003 * @brief This function enables or disables the channel "output disable" 01004 * feature for each engine B channel according to the given mask and 01005 * polarity. 01006 * 01007 * @param mask - The "output disable" enable mask. A value of: 01008 * - 0x00000001 enables the "output disable" feature on channel 64 only, 01009 * - 0x80000000 enables the "output disable" feature on channel 95 only 01010 * @param polarity - The "output disable" polarity mask. A value of: 01011 * - 0x00000001 sets the high polarity of disabled output on channel 64 01012 * and low polarity of disabled output on all other channels 01013 *******************************************************************************/ 01014 void fs_etpu_set_output_disable_mask_b( 01015 uint32_t mask, 01016 uint32_t polarity) 01017 { 01018 uint8_t i; 01019 01020 for(i=64; i<96; i++) 01021 { 01022 eTPU->CHAN[i].CR.B.ODIS = mask & 0x00000001; 01023 eTPU->CHAN[i].CR.B.OPOL = polarity & 0x00000001; 01024 mask >>= 1; 01025 polarity >>= 1; 01026 } 01027 } 01028 01029 /******************************************************************************* 01030 * FUNCTION: fs_etpu_get_chan_interrupt_flag 01031 ****************************************************************************//*! 01032 * @brief This function returns the current value of the Channel Interrupt 01033 * Status bit of the specified eTPU channel. 01034 * 01035 * @param channel - The eTPU channel number 01036 * 01037 * @return Value of CIS bit of the specified channel SCR register. 01038 *******************************************************************************/ 01039 uint8_t fs_etpu_get_chan_interrupt_flag( 01040 uint8_t channel) 01041 { 01042 return((uint8_t)eTPU->CHAN[channel].SCR.B.CIS); 01043 } 01044 01045 /******************************************************************************* 01046 * FUNCTION: fs_etpu_clear_chan_interrupt_flag 01047 ****************************************************************************//*! 01048 * @brief This function clears the channel interrupt flag. 01049 * 01050 * @param channel - The eTPU channel number 01051 *******************************************************************************/ 01052 void fs_etpu_clear_chan_interrupt_flag( 01053 uint8_t channel) 01054 { 01055 if(channel < 32) 01056 { 01057 eTPU->CISR_A.R = 1<<channel; 01058 } 01059 else 01060 { 01061 eTPU->CISR_B.R = 1<<(channel-64); 01062 } 01063 } 01064 01065 /******************************************************************************* 01066 * FUNCTION: fs_etpu_get_chan_interrupt_oveflow_flag 01067 ****************************************************************************//*! 01068 * @brief This function returns the current value of the Channel Interrupt 01069 * Overflow Status bit of the specified eTPU channel. 01070 * 01071 * @param channel - The eTPU channel number 01072 * 01073 * @return Value of CIOS bit of the specified channel SCR register. 01074 *******************************************************************************/ 01075 uint8_t fs_etpu_get_chan_interrupt_oveflow_flag( 01076 uint8_t channel) 01077 { 01078 return((uint8_t)eTPU->CHAN[channel].SCR.B.CIOS); 01079 } 01080 01081 /******************************************************************************* 01082 * FUNCTION: fs_etpu_clear_chan_interrupt_overflow_flag 01083 ****************************************************************************//*! 01084 * @brief This function clears the channel interrupt oveflow flag. 01085 * 01086 * @param channel - The eTPU channel number 01087 *******************************************************************************/ 01088 void fs_etpu_clear_chan_interrupt_overflow_flag( 01089 uint8_t channel) 01090 { 01091 if(channel < 32) 01092 { 01093 eTPU->CIOSR_A.R = 1<<channel; 01094 } 01095 else 01096 { 01097 eTPU->CIOSR_B.R = 1<<(channel-64); 01098 } 01099 } 01100 01101 /******************************************************************************* 01102 * FUNCTION: fs_etpu_get_chan_dma_flag 01103 ****************************************************************************//*! 01104 * @brief This function returns the current value of the Data Transfer Request 01105 * Status bit of the specified eTPU channel. 01106 * 01107 * @param channel - The eTPU channel number 01108 * 01109 * @return Value of DTRS bit of the specified channel SCR register. 01110 *******************************************************************************/ 01111 uint8_t fs_etpu_get_chan_dma_flag( 01112 uint8_t channel) 01113 { 01114 return((uint8_t)eTPU->CHAN[channel].SCR.B.DTRS); 01115 } 01116 01117 /******************************************************************************* 01118 * FUNCTION: fs_etpu_clear_chan_dma_flag 01119 ****************************************************************************//*! 01120 * @brief This function clears the channel data transfer request flag. 01121 * 01122 * @param channel - The eTPU channel number 01123 *******************************************************************************/ 01124 void fs_etpu_clear_chan_dma_flag( 01125 uint8_t channel) 01126 { 01127 if(channel < 32) 01128 { 01129 eTPU->CDTRSR_A.R = 1<<channel; 01130 } 01131 else 01132 { 01133 eTPU->CDTRSR_B.R = 1<<(channel-64); 01134 } 01135 } 01136 01137 /******************************************************************************* 01138 * FUNCTION: fs_etpu_get_chan_dma_oveflow_flag 01139 ****************************************************************************//*! 01140 * @brief This function returns the current value of the Data Transfer Request 01141 * Oveflow Status bit of the specified eTPU channel. 01142 * 01143 * @param channel - The eTPU channel number 01144 * 01145 * @return Value of DTROS bit of the specified channel SCR register. 01146 *******************************************************************************/ 01147 uint8_t fs_etpu_get_chan_dma_oveflow_flag( 01148 uint8_t channel) 01149 { 01150 return((uint8_t)eTPU->CHAN[channel].SCR.B.DTROS); 01151 } 01152 01153 /******************************************************************************* 01154 * FUNCTION: fs_etpu_clear_chan_dma_oveflow_flag 01155 ****************************************************************************//*! 01156 * @brief This function clears the channel data transfer request oveflow flag. 01157 * 01158 * @param channel - The eTPU channel number 01159 *******************************************************************************/ 01160 void fs_etpu_clear_chan_dma_oveflow_flag( 01161 uint8_t channel) 01162 { 01163 if(channel < 32) 01164 { 01165 eTPU->CDTROSR_A.R = 1<<channel; 01166 } 01167 else 01168 { 01169 eTPU->CDTROSR_B.R = 1<<(channel-64); 01170 } 01171 } 01172 01173 /******************************************************************************* 01174 * FUNCTION: fs_etpu_get_global_exceptions 01175 ****************************************************************************//*! 01176 * @brief This function returns the global exception flags. 01177 * 01178 * @note This function can be used after eTPU global exception interrupt. 01179 * This function enables to decode the source of the global exception. 01180 * 01181 * @param channel - The eTPU channel number 01182 * 01183 * @return The returned value can include the following exception bits: 01184 * - @ref FS_ETPU_SDM_READ_ERROR 01185 * - @ref FS_ETPU_WATCHDOG_TIMEOUT_A 01186 * - @ref FS_ETPU_WATCHDOG_TIMEOUT_B 01187 * - @ref FS_ETPU_MICROCODE_GLOBAL_EX_A 01188 * - @ref FS_ETPU_MICROCODE_GLOBAL_EX_B 01189 * - @ref FS_ETPU_ILLEGAL_INSTRUCTION_A 01190 * - @ref FS_ETPU_ILLEGAL_INSTRUCTION_B 01191 * - @ref FS_ETPU_SHARED_SUBSYS_ACC_ERR 01192 * - @ref FS_ETPU_SCM_MISC_FLAG 01193 * - @ref FS_ETPU_SCM_READ_ERROR 01194 *******************************************************************************/ 01195 uint32_t fs_etpu_get_global_exceptions(void) 01196 { 01197 return(eTPU->MCR.R & (FS_ETPU_SDM_READ_ERROR 01198 | FS_ETPU_WATCHDOG_TIMEOUT_A 01199 | FS_ETPU_WATCHDOG_TIMEOUT_B 01200 | FS_ETPU_MICROCODE_GLOBAL_EX_A 01201 | FS_ETPU_MICROCODE_GLOBAL_EX_B 01202 | FS_ETPU_ILLEGAL_INSTRUCTION_A 01203 | FS_ETPU_ILLEGAL_INSTRUCTION_B 01204 | FS_ETPU_SHARED_SUBSYS_ACC_ERR 01205 | FS_ETPU_SCM_MISC_FLAG 01206 | FS_ETPU_SCM_READ_ERROR)); 01207 } 01208 01209 /******************************************************************************* 01210 * FUNCTION: fs_etpu_clear_global_exceptions 01211 ****************************************************************************//*! 01212 * @brief This function clears all eTPU global exceptions. 01213 *******************************************************************************/ 01214 void fs_etpu_clear_global_exceptions(void) 01215 { 01216 eTPU->MCR.B.GEC = 1; 01217 } 01218 01219 /******************************************************************************* 01220 * FUNCTION: fs_etpu_get_global_error 01221 ****************************************************************************//*! 01222 * @brief This function reads the Global Error value from eTPU DATA RAM, 01223 * which is used by Freescale eTPU functions to reports unhandled 01224 * events. 01225 * 01226 * @return The 32-bit value of the Global Error is returned. 01227 * The Global Error value includes 2 fields. 01228 * Under @ref FS_ETPU_GLOBAL_ERROR_CHANNEL_MASK there is the channel 01229 * number of the channel where the unhandled event occurred. 01230 * Under FS_ETPU_GLOBAL_ERROR_EVENT_MASK there is the event condition 01231 * which may include one or more the following bits: 01232 * - @ref FS_ETPU_GLOBAL_ERROR_EVENT_LSR 01233 * - @ref FS_ETPU_GLOBAL_ERROR_EVENT_MRLA 01234 * - @ref FS_ETPU_GLOBAL_ERROR_EVENT_MRLB 01235 * - @ref FS_ETPU_GLOBAL_ERROR_EVENT_TDLA 01236 * - @ref FS_ETPU_GLOBAL_ERROR_EVENT_TDLB 01237 * - @ref FS_ETPU_GLOBAL_ERROR_EVENT_PSS 01238 * - @ref and for eTPU2 only also 01239 * - @ref FS_ETPU_GLOBAL_ERROR_EVENT_FLAG0 01240 * - @ref FS_ETPU_GLOBAL_ERROR_EVENT_FLAG1 01241 *******************************************************************************/ 01242 uint32_t fs_etpu_get_global_error(void) 01243 { 01244 #ifdef FS_ETPU_OFFSET_GLOBAL_ERROR 01245 return(*(uint32_t *)((uint32_t)fs_etpu_data_ram_start + FS_ETPU_OFFSET_GLOBAL_ERROR)); 01246 #else /* presume the Global Error is at address 0, which is the case of all set1-set4 */ 01247 return(*(uint32_t *)((uint32_t)fs_etpu_data_ram_start)); 01248 #endif 01249 } 01250 01251 /******************************************************************************* 01252 * FUNCTION: fs_etpu_get_idle_cnt_a 01253 ****************************************************************************//*! 01254 * @brief This function returns the current value of engine A Idle Count 01255 * Register. 01256 * 01257 * @return The 32-bit number of the idle microinstruction cycles is returned. 01258 * 01259 * @warning This function is applicable to eTPU2 only. 01260 *******************************************************************************/ 01261 uint24_t fs_etpu_get_idle_cnt_a(void) 01262 { 01263 return( eTPU->IDLE_A.R ); 01264 } 01265 01266 /******************************************************************************* 01267 * FUNCTION: fs_etpu_get_idle_cnt_b 01268 ****************************************************************************//*! 01269 * @brief This function returns the current value of engine B Idle Count 01270 * Register. 01271 * 01272 * @return The 32-bit number of the idle microinstruction cycles is returned. 01273 * 01274 * @warning This function is applicable to eTPU2 only. 01275 *******************************************************************************/ 01276 uint24_t fs_etpu_get_idle_cnt_b(void) 01277 { 01278 return( eTPU->IDLE_B.R ); 01279 } 01280 01281 /******************************************************************************* 01282 * FUNCTION: fs_etpu_clear_idle_cnt_a 01283 ****************************************************************************//*! 01284 * @brief This function clears the engine A Idle Count Register. 01285 * 01286 * @warning This function is applicable to eTPU2 only. 01287 *******************************************************************************/ 01288 void fs_etpu_clear_idle_cnt_a(void) 01289 { 01290 eTPU->IDLE_A.B.ICLR = 1; 01291 } 01292 01293 /******************************************************************************* 01294 * FUNCTION: fs_etpu_clear_idle_cnt_b 01295 ****************************************************************************//*! 01296 * @brief This function clears the engine B Idle Count Register. 01297 * 01298 * @warning This function is applicable to eTPU2 only. 01299 *******************************************************************************/ 01300 void fs_etpu_clear_idle_cnt_b(void) 01301 { 01302 eTPU->IDLE_B.B.ICLR = 1; 01303 } 01304 01305 /******************************************************************************* 01306 * FUNCTION: fs_etpu_coherent_read_24 01307 ****************************************************************************//*! 01308 * @brief This function coherently reads two 24-bit variables from the eTPU 01309 * DATA RAM, using the Coherent Dual-Parameter Controller (CDC). 01310 * 01311 * @param channel - The eTPU channel number 01312 * @param offset1 - The offset to the first 24-bit variable to be read 01313 * @param offset2 - The offset to the second 24-bit variable to be read 01314 * @param *value1 - A pointer to where the first variable value will be stored 01315 * @param *value2 - A pointer to where the second variable value will be stored 01316 * 01317 * @return Zero or an error code. Error codes that can be returned are: 01318 * - @ref FS_ETPU_ERROR_MALLOC - When there is not enough available 01319 * memory for the temporally buffer in eTPU DATA RAM 01320 * - @ref FS_ETPU_ERROR_ADDRESS - When the variable offsets do not allow 01321 * the CDC operation. 01322 *******************************************************************************/ 01323 uint32_t fs_etpu_coherent_read_24( 01324 uint8_t channel, 01325 uint32_t offset1, 01326 uint32_t offset2, 01327 int32_t *value1, 01328 int32_t *value2) 01329 { 01330 uint32_t addr1, addr2, ctbase1, ctbase2; 01331 uint32_t addr_b; 01332 uint32_t err_code = 0; 01333 01334 /* check there is a DATA RAM space for the temporally buffer */ 01335 if ((uint32_t)fs_free_param + 8 > fs_etpu_data_ram_end) 01336 { 01337 err_code = FS_ETPU_ERROR_MALLOC; 01338 } 01339 else 01340 { 01341 /* SDM-relative word addresses of parameters (4 byte granularity) */ 01342 addr1 = ((eTPU->CHAN[channel].CR.B.CPBA << 3) + offset1 - 1) >> 2; 01343 addr2 = ((eTPU->CHAN[channel].CR.B.CPBA << 3) + offset2 - 1) >> 2; 01344 ctbase1 = addr1 >> 7; 01345 ctbase2 = addr2 >> 7; 01346 01347 if(ctbase1 != ctbase2) 01348 { 01349 err_code = FS_ETPU_ERROR_ADDRESS; 01350 } 01351 else 01352 { 01353 /* SDM-relative doubleword address of buffer (8 byte granularity) */ 01354 addr_b = ((uint32_t)fs_free_param - fs_etpu_data_ram_start) >> 3; 01355 01356 /* CDC Register - configure and start the coherent transfer 01357 CTBASE = ctbase1; 01358 PARAM0 = addr1 & 0x7F; 01359 PARAM1 = addr2 & 0x7F; 01360 PBASE = addr_b; 01361 WR = 0; - read 01362 PWIDTH = 0; - 24-bit 01363 STS = 1; - start */ 01364 eTPU->CDCR.R = (1<<31) + (ctbase1<<26) + (addr_b<<16) 01365 + ((addr1 & 0x7F)<<8) + (addr2 & 0x7F); 01366 01367 /* now host receives wait states untill the transfer is done */ 01368 01369 /* read values from temporary buffer */ 01370 *value1 = ((*(fs_free_param))<<8)>>8; 01371 *value2 = ((*(fs_free_param + 1))<<8)>>8; 01372 } 01373 } 01374 return(err_code); 01375 } 01376 01377 /******************************************************************************* 01378 * FUNCTION: fs_etpu_coherent_read_32 01379 ****************************************************************************//*! 01380 * @brief This function coherently reads two 32-bit variables from the eTPU 01381 * DATA RAM, using the Coherent Dual-Parameter Controller (CDC). 01382 * 01383 * @param channel - The eTPU channel number 01384 * @param offset1 - The offset to the first 32-bit variable to be read 01385 * @param offset2 - The offset to the second 32-bit variable to be read 01386 * @param *value1 - A pointer to where the first variable value will be stored 01387 * @param *value2 - A pointer to where the second variable value will be stored 01388 * 01389 * @return Zero or an error code. Error codes that can be returned are: 01390 * - @ref FS_ETPU_ERROR_MALLOC - When there is not enough available 01391 * memory for the temporally buffer in eTPU DATA RAM 01392 * - @ref FS_ETPU_ERROR_ADDRESS - When the variable offsets do not allow 01393 * the CDC operation. 01394 *******************************************************************************/ 01395 uint32_t fs_etpu_coherent_read_32( 01396 uint8_t channel, 01397 uint32_t offset1, 01398 uint32_t offset2, 01399 uint32_t *value1, 01400 uint32_t *value2) 01401 { 01402 uint32_t addr1, addr2, ctbase1, ctbase2; 01403 uint32_t addr_b; 01404 uint32_t err_code = 0; 01405 01406 /* check there is a DATA RAM space for the temporally buffer */ 01407 if ((uint32_t)fs_free_param + 8 > fs_etpu_data_ram_end) 01408 { 01409 err_code = FS_ETPU_ERROR_MALLOC; 01410 } 01411 else 01412 { 01413 /* SDM-relative word addresses of parameters (4 byte granularity) */ 01414 addr1 = ((eTPU->CHAN[channel].CR.B.CPBA << 3) + offset1) >> 2; 01415 addr2 = ((eTPU->CHAN[channel].CR.B.CPBA << 3) + offset2) >> 2; 01416 ctbase1 = addr1 >> 7; 01417 ctbase2 = addr2 >> 7; 01418 01419 if(ctbase1 != ctbase2) 01420 { 01421 err_code = FS_ETPU_ERROR_ADDRESS; 01422 } 01423 else 01424 { 01425 /* SDM-relative doubleword address of buffer (8 byte granularity) */ 01426 addr_b = ((uint32_t)fs_free_param - fs_etpu_data_ram_start) >> 3; 01427 01428 /* CDC Register - configure and start the coherent transfer 01429 CTBASE = ctbase1; 01430 PARAM0 = addr1 & 0x7F; 01431 PARAM1 = addr2 & 0x7F; 01432 PBASE = addr_b; 01433 WR = 0; - read 01434 PWIDTH = 1; - 32-bit 01435 STS = 1; - start */ 01436 eTPU->CDCR.R = (1<<31) + (ctbase1<<26) + (addr_b<<16) + (1<<15) 01437 + ((addr1 & 0x7F)<<8) + (addr2 & 0x7F); 01438 01439 /* now host receives wait states untill the transfer is done */ 01440 01441 /* read values from temporary buffer */ 01442 *value1 = *(fs_free_param); 01443 *value2 = *(fs_free_param + 1); 01444 } 01445 } 01446 return(err_code); 01447 } 01448 01449 /******************************************************************************* 01450 * FUNCTION: fs_etpu_coherent_write_24 01451 ****************************************************************************//*! 01452 * @brief This function coherently writes two 24-bit variables into the eTPU 01453 * DATA RAM, using the Coherent Dual-Parameter Controller (CDC). 01454 * 01455 * @param channel - The eTPU channel number 01456 * @param offset1 - The offset to the first 24-bit variable to be written 01457 * @param offset2 - The offset to the second 24-bit variable to be written 01458 * @param value1 - The first variable value 01459 * @param value2 - The second variable value 01460 * 01461 * @return Zero or an error code. Error codes that can be returned are: 01462 * - @ref FS_ETPU_ERROR_MALLOC - When there is not enough available 01463 * memory for the temporally buffer in eTPU DATA RAM 01464 * - @ref FS_ETPU_ERROR_ADDRESS - When the variable offsets do not allow 01465 * the CDC operation. 01466 *******************************************************************************/ 01467 uint32_t fs_etpu_coherent_write_24( 01468 uint8_t channel, 01469 uint32_t offset1, 01470 uint32_t offset2, 01471 int32_t value1, 01472 int32_t value2) 01473 { 01474 uint32_t addr1, addr2, ctbase1, ctbase2; 01475 uint32_t addr_b; 01476 uint32_t err_code = 0; 01477 01478 /* check there is a DATA RAM space for the temporally buffer */ 01479 if ((uint32_t)fs_free_param + 8 > fs_etpu_data_ram_end) 01480 { 01481 err_code = FS_ETPU_ERROR_MALLOC; 01482 } 01483 else 01484 { 01485 /* write values to the temporary buffer */ 01486 *(fs_free_param) = value1; 01487 *(fs_free_param + 1) = value2; 01488 01489 /* SDM-relative word addresses of parameters (4 byte granularity) */ 01490 addr1 = ((eTPU->CHAN[channel].CR.B.CPBA << 3) + offset1 - 1) >> 2; 01491 addr2 = ((eTPU->CHAN[channel].CR.B.CPBA << 3) + offset2 - 1) >> 2; 01492 ctbase1 = addr1 >> 7; 01493 ctbase2 = addr2 >> 7; 01494 01495 if(ctbase1 != ctbase2) 01496 { 01497 err_code = FS_ETPU_ERROR_ADDRESS; 01498 } 01499 else 01500 { 01501 /* SDM-relative doubleword address of buffer (8 byte granularity) */ 01502 addr_b = ((uint32_t)fs_free_param - fs_etpu_data_ram_start) >> 3; 01503 01504 /* CDC Register - configure and start the coherent transfer 01505 CTBASE = ctbase1; 01506 PARAM0 = addr1 & 0x7F; 01507 PARAM1 = addr2 & 0x7F; 01508 PBASE = addr_b; 01509 WR = 1; - read 01510 PWIDTH = 0; - 24-bit 01511 STS = 1; - start */ 01512 eTPU->CDCR.R = (1<<31) + (ctbase1<<26) + (addr_b<<16) + (1<<7) 01513 + ((addr1 & 0x7F)<<8) + (addr2 & 0x7F); 01514 01515 /* now host receives wait states untill the transfer is done */ 01516 01517 } 01518 } 01519 return(err_code); 01520 } 01521 01522 /******************************************************************************* 01523 * FUNCTION: fs_etpu_coherent_write_32 01524 ****************************************************************************//*! 01525 * @brief This function coherently writes two 32-bit variables into the eTPU 01526 * DATA RAM, using the Coherent Dual-Parameter Controller (CDC). 01527 * 01528 * @param channel - The eTPU channel number 01529 * @param offset1 - The offset to the first 32-bit variable to be written 01530 * @param offset2 - The offset to the second 32-bit variable to be written 01531 * @param value1 - The first variable value 01532 * @param value2 - The second variable value 01533 * 01534 * @return Zero or an error code. Error codes that can be returned are: 01535 * - @ref FS_ETPU_ERROR_MALLOC - When there is not enough available 01536 * memory for the temporally buffer in eTPU DATA RAM 01537 * - @ref FS_ETPU_ERROR_ADDRESS - When the variable offsets do not allow 01538 * the CDC operation. 01539 *******************************************************************************/ 01540 uint32_t fs_etpu_coherent_write_32( 01541 uint8_t channel, 01542 uint32_t offset1, 01543 uint32_t offset2, 01544 uint32_t value1, 01545 uint32_t value2) 01546 { 01547 uint32_t addr1, addr2, ctbase1, ctbase2; 01548 uint32_t addr_b; 01549 uint32_t err_code = 0; 01550 01551 /* check there is a DATA RAM space for the temporally buffer */ 01552 if ((uint32_t)fs_free_param + 8 > fs_etpu_data_ram_end) 01553 { 01554 err_code = FS_ETPU_ERROR_MALLOC; 01555 } 01556 else 01557 { 01558 /* write values to the temporary buffer */ 01559 *(fs_free_param) = value1; 01560 *(fs_free_param + 1) = value2; 01561 01562 /* SDM-relative word addresses of parameters (4 byte granularity) */ 01563 addr1 = ((eTPU->CHAN[channel].CR.B.CPBA << 3) + offset1) >> 2; 01564 addr2 = ((eTPU->CHAN[channel].CR.B.CPBA << 3) + offset2) >> 2; 01565 ctbase1 = addr1 >> 7; 01566 ctbase2 = addr2 >> 7; 01567 01568 if(ctbase1 != ctbase2) 01569 { 01570 err_code = FS_ETPU_ERROR_ADDRESS; 01571 } 01572 else 01573 { 01574 /* SDM-relative doubleword address of buffer (8 byte granularity) */ 01575 addr_b = ((uint32_t)fs_free_param - fs_etpu_data_ram_start) >> 3; 01576 01577 /* CDC Register - configure and start the coherent transfer 01578 CTBASE = ctbase1; 01579 PARAM0 = addr1 & 0x7F; 01580 PARAM1 = addr2 & 0x7F; 01581 PBASE = addr_b; 01582 WR = 1; - read 01583 PWIDTH = 1; - 32-bit 01584 STS = 1; - start */ 01585 eTPU->CDCR.R = (1<<31) + (ctbase1<<26) + (addr_b<<16) + (1<<15) + (1<<7) 01586 + ((addr1 & 0x7F)<<8) + (addr2 & 0x7F); 01587 01588 /* now host receives wait states untill the transfer is done */ 01589 01590 } 01591 } 01592 return(err_code); 01593 } 01594 01595 /******************************************************************************* 01596 * 01597 * Copyright: 01598 * Freescale Semiconductor, INC. All Rights Reserved. 01599 * You are hereby granted a copyright license to use, modify, and 01600 * distribute the SOFTWARE so long as this entire notice is 01601 * retained without alteration in any modified and/or redistributed 01602 * versions, and that such modified versions are clearly identified 01603 * as such. No licenses are granted by implication, estoppel or 01604 * otherwise under any patents or trademarks of Freescale 01605 * Semiconductor, Inc. This software is provided on an "AS IS" 01606 * basis and without warranty. 01607 * 01608 * To the maximum extent permitted by applicable law, Freescale 01609 * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 01610 * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A 01611 * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH 01612 * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) 01613 * AND ANY ACCOMPANYING WRITTEN MATERIALS. 01614 * 01615 * To the maximum extent permitted by applicable law, IN NO EVENT 01616 * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER 01617 * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 01618 * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER 01619 * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 01620 * 01621 * Freescale Semiconductor assumes no responsibility for the 01622 * maintenance and support of this software 01623 ******************************************************************************/ 01624 /******************************************************************************* 01625 * 01626 * REVISION HISTORY: 01627 * 01628 * FILE OWNER: Milan Brejl [r54529] 01629 * 01630 * Revision 3.2 2014/03/21 r54529 01631 * fs_etpu_clear_chan_interrupt_flag and fs_etpu_clear_chan_dma_flag bug fix 01632 * - the overflow flag was cleared as well. 01633 * fs_etpu_get/clear_chan_interrupt_oveflow_flag and 01634 * fs_etpu_get/clear_chan_dma_overflow_flag added. 01635 * 01636 * Revision 3.1 2013/07/16 r54529 01637 * fs_etpu_coherent_read/write_32 bug (offset - 1) fixed (offset) . 01638 * 01639 * Revision 3.0 2012/05/17 r54529 01640 * fs_etpu2_init bug fix - engine-relative memory granularity is 512 bytes. 01641 * 01642 * Revision 2.9 2012/05/12 r54529 01643 * fs_etpu2_init bug fix 01644 * 01645 * Revision 2.8 2012/04/10 r54529 01646 * fs_etpu2_init reworked - engine memory allocated but not initialized, becuase 01647 * the compiler never generated staticly allocated engine variables. 01648 * 01649 * Revision 2.7 2012/03/13 r54529 01650 * Usage of new macros FS_ETPU_ENTRY_TABLE_PIN_INPUT/OUTPUT added to 01651 * fs_etpu_chan_init() comment. 01652 * 01653 * Revision 2.6 2012/02/21 r54529 01654 * New functions added: 01655 * - fs_etpu_set_interrupt_mask_a/b 01656 * - fs_etpu_set_dma_mask_a/b 01657 * - fs_etpu_set_output_disable_mask_a/b 01658 * 01659 * Revision 2.5 2012/02/10 13:52:15 r54529 01660 * Spelling and format edits. 01661 * 01662 * Revision 2.4 2012/02/10 08:27:49 r54529 01663 * New functions added: 01664 * - get_global_error 01665 * - fs_etpu_get/clear_idle_count_a/b 01666 * Modified (optimized) functions: 01667 * - fs_etpu_coherent_read/write_24/32 01668 * Code formating cleared. 01669 * All code comments reformated for DoxyGen support. 01670 * 01671 * Revision 2.3 2011/07/11 13:22:15 r54529 01672 * New functions added: 01673 * - fs_etpu_get/clear_chan_interrupt_flag 01674 * - fs_etpu_get/clear_chan_dma_flag 01675 * - fs_etpu_get/clear_global_exceptions 01676 * - fs_etpu_coherent_read/write_24/32 01677 * Engine TBCR registers written only when ECR.MDIS = 0. 01678 * The eTPU2 supported by adding etpu watchdog initialization into etpu_config_t structure, fs_etpu2_init function and definitions of new eTPU2 register bits. 01679 * 01680 * Revision 2.2 2009/12/17 20:31:07 r54529 01681 * function fs_etpu_chan_init added (restored) - because used by eTPU GCT 01682 * 01683 * Revision 2.1 2009/10/28 14:46:51 r47354 01684 * Added code to make sure VIS bit is set before writing SCM. 01685 * 01686 * Revision 2.0 2004/11/30 16:10:32 r12110 01687 * -Updated functions to remove requirement for etpu_config.h file. 01688 * -Added new memset32 function to clear eTPU code memory. 01689 * 01690 * Revision 1.1 2004/11/12 10:39:23 r12110 01691 * Initial version checked into CVS. 01692 *.............................................................................. 01693 * 0.01 J. Loeliger 13/Jun/03 Initial version of file. 01694 * 0.02 J. Loeliger 19/Mar/04 Change function prefix to fs_ for 01695 * Freescale semiconductor. 01696 * 0.03 J. Loeliger 26/Mar/04 Updated after debug. 01697 * 0.04 J. Loeliger 26/May/04 Updated comments. 01698 * M. Brejl Fixed problem with *fs_etpu_data_ram. 01699 * M.Princ Renamed fs_mpc5500_timer_start to 01700 * fs_timer_start. 01701 * Added new functions to access parameter 01702 * Ram using different data sizes. 01703 * 0.05 J. Loeliger 16/Jul/04 Updated to match new mpc5554 header files 01704 * 0.06 J. Loeliger 16/Aug/04 Updated malloc to round correctly. 01705 * 0.1 J. Loeliger 01/Sep/04 Added fs_etpu_malloc2 function. 01706 ******************************************************************************/
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