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00001 /******************************************************************************* 00002 * 00003 * Freescale Semiconductor Inc. 00004 * (c) Copyright 2004-2012 Freescale Semiconductor, Inc. 00005 * ALL RIGHTS RESERVED. 00006 * 00007 ****************************************************************************//*! 00008 * 00009 * @file etpu_as.h 00010 * 00011 * @author Milan Brejl [r54529] 00012 * 00013 * @version 1.0 00014 * 00015 * @date 17-May-2012 00016 * 00017 * @brief This file contains useful macros and prototypes for AS API. 00018 * 00019 *******************************************************************************/ 00020 #ifndef _ETPU_AS_H_ 00021 #define _ETPU_AS_H_ 00022 00023 /******************************************************************************* 00024 * Includes 00025 *******************************************************************************/ 00026 #include "etpu_util.h" /* 24-bit types */ 00027 #include "etpu_as_auto.h" /* auto generated header file */ 00028 #include "etpu_pwmm.h" /* struct pwmm_instance_t definition */ 00029 00030 /******************************************************************************* 00031 * Definitions 00032 *******************************************************************************/ 00033 /** AS Mode */ 00034 #define FS_ETPU_AS_MODE_MASTER FS_ETPU_AS_HSR_INIT_MODE_PERIODIC 00035 #define FS_ETPU_AS_MODE_PWMM_SLAVE FS_ETPU_AS_HSR_INIT_MODE_SYNC 00036 00037 /******************************************************************************* 00038 * Type Definitions 00039 *******************************************************************************/ 00040 /** A structure to represent an instance of AS. 00041 * It includes static AS initialization items. */ 00042 struct as_instance_t 00043 { 00044 const uint8_t chan_num; /**< Channel number of the AS channel. */ 00045 const uint8_t priority; /**< Channel priority for the AS channel. */ 00046 const uint8_t mode; /**< AS mode. 00047 It can be any of: 00048 - @ref FS_ETPU_AS_HSR_INIT_MODE_PERIODIC - AS signal generation is based on 00049 start_offset and period parameters 00050 - @ref FS_ETPU_AS_HSR_INIT_MODE_SYNC - AS signal generation is based on 00051 PWMM frame_time and center_time */ 00052 const uint8_t polarity; /**< AS output signal polarity. 00053 It can be any of: 00054 - @ref FS_ETPU_AS_POLARITY_PULSE_HIGH 00055 - @ref FS_ETPU_AS_POLARITY_PULSE_LOW */ 00056 const uint8_t signal_count; /**< Count of AS signals processed. It can be 00057 1 to FS_ETPU_AS_SIGNALS_MAX. */ 00058 uint32_t *cpba; /**< Channel parameter base address. 00059 Set cpba = 0 to use automatic allocation of eTPU DATA RAM for AS channel 00060 parameters using the eTPU utility function fs_etpu_malloc (recommanded), 00061 or assign the cpba manually by an address where the AS channel parameter 00062 space will start from, e.g. 0xC3FC8100. */ 00063 uint32_t *cpba_signals; /**< Channel parameter base address. 00064 Set cpba_signals = 0 to use automatic allocation of eTPU DATA RAM for AS 00065 signal parameter array (recommanded), or assign the cpba_signals manually 00066 by an address where the array will start. */ 00067 }; 00068 00069 /** A structure to represent a single AS signal processing configuration. 00070 * It includes both static and dynamic values. */ 00071 struct as_signal_config_t 00072 { 00073 const uint8_t queue_offset; /**< This is a byte offset of the ADC result 00074 in the eQADC result queue. Together with as_config.result_queue, it 00075 defines where the input of AS signal processing is read. */ 00076 int24_t gain; /**< This is an integer gain to apply to the 00077 ADC result. The ADC result is a (max) 16-bit number and the gain is used 00078 to align it to a 24-bit number. Additionally, a gain correction can be 00079 applied using this gain. */ 00080 int24_t dc_offset; /**< This 24-bit DC-offset is applied after 00081 the gain. */ 00082 fract24_t forget_factor; /**< This 24-bit fractional value defines 00083 a first-order low-pass IIR filter called Exponentioally Weighted Moving 00084 Average (EWMA). 00085 - forget_factor = 0x000000 results in no averaging 00086 - forget_factor = 0x7FFFFF results in maximum averaging */ 00087 }; 00088 00089 /** A structure to represent a configuration of AS. 00090 * It includes AS configuration items which can mostly be changed in 00091 * run-time. */ 00092 struct as_config_t 00093 { 00094 const uint24_t start_offset; /**< This parameter is used to synchronize 00095 various eTPU functions that generate a signal. For AS: the first period 00096 frame is scheduled start_offset TCR1 cycles after initialization. */ 00097 uint24_t period; /**< AS period as a number of TCR1 cycles. */ 00098 uint24_t pulse_width; /**< AS pulse-width as a number of TCR1 cycles.*/ 00099 uint8_t pulse_selection;/**< selection of pulse generation. 00100 Use none, one or both of: 00101 - @ref FS_ETPU_AS_FM0_FRAME_PULSE_ON 00102 - @ref FS_ETPU_AS_FM1_CENTER_PULSE_ON */ 00103 int24_t pulse_adjustment_frame; /**< frame pulse position adjustment 00104 as a positive or negative number of TCR1 cycles.*/ 00105 int24_t pulse_adjustment_center; /**< center pulse position adjustment 00106 as a positive or negative number of TCR1 cycles.*/ 00107 uint8_t irq_dma_options; /**< selection of IRQ&DMA generation. 00108 Use none, one or more of: 00109 - @ref FS_ETPU_AS_IRQ_FRAME_PULSE_START 00110 - @ref FS_ETPU_AS_IRQ_FRAME_PULSE_END 00111 - @ref FS_ETPU_AS_IRQ_CENTER_PULSE_START 00112 - @ref FS_ETPU_AS_IRQ_CENTER_PULSE_END */ 00113 uint8_t link_options; /**< selection of link generation. 00114 Use none, one or more of: 00115 - @ref FS_ETPU_AS_LINK_FRAME_PULSE_START 00116 - @ref FS_ETPU_AS_LINK_FRAME_PULSE_END 00117 - @ref FS_ETPU_AS_LINK_CENTER_PULSE_START 00118 - @ref FS_ETPU_AS_LINK_CENTER_PULSE_END */ 00119 uint32_t link_chans_frame_start; /**< up to 4 link numbers packed to 00120 a single 32-bit word. These links are sent at the frame pulse start. Use 00121 FS_ETPU_CHANNEL_TO_LINK() to convert a channel number to a link number. */ 00122 uint32_t link_chans_frame_end; /**< up to 4 link numbers packed to 00123 a single 32-bit word. These links are sent at the frame pulse end. Use 00124 FS_ETPU_CHANNEL_TO_LINK() to convert a channel number to a link number. */ 00125 uint32_t link_chans_center_start; /**< up to 4 link numbers packed to 00126 a single 32-bit word. These links are sent at the center pulse start. Use 00127 FS_ETPU_CHANNEL_TO_LINK() to convert a channel number to a link number. */ 00128 uint32_t link_chans_center_end; /**< up to 4 link numbers packed to 00129 a single 32-bit word. These links are sent at the center pulse end. Use 00130 FS_ETPU_CHANNEL_TO_LINK() to convert a channel number to a link number. */ 00131 const uint32_t *p_result_queue; /**< Pointer to eQADC results array 00132 in the eTPU DATA RAM */ 00133 struct as_signal_config_t signal_config[FS_ETPU_AS_SIGNALS_MAX]; /**< Array of 00134 of individual signal processing configurations. */ 00135 uint8_t signal_mask_frame; /**< this mask defines which signals are 00136 processed on the frame pulse end. Bit 0 (LSB) corresponds to signal[0]. 00137 This parameter is used only if FS_ETPU_AS_FM0_FRAME_PULSE_ON is set. */ 00138 uint8_t signal_mask_center; /**< this mask defines which signals are 00139 processed on the center pulse end. Bit 0 (LSB) corresponds to signal[0]. 00140 This parameter is used only if FS_ETPU_AS_FM1_CENTER_PULSE_ON is set. */ 00141 uint8_t phase_current_processing; /**< 3-phase current processing. 00142 This switch turns on a calculation the 3rd phase current from the other 2. 00143 Which phase current is calculated is based on actual motor position in one 00144 of 6 sectors. See also phase_current_idx_a/b/c and pwmm_chan_num. 00145 Use one of: 00146 - @ref FS_ETPU_AS_PHASE_CURRENTS_ON 00147 - @ref FS_ETPU_AS_PHASE_CURRENTS_OFF */ 00148 const uint8_t phase_current_idx_a; /**< index of the phase A current 00149 in the signal array. Used only when FS_ETPU_AS_PHASE_CURRENTS_ON is set. */ 00150 const uint8_t phase_current_idx_b; /**< index of the phase B current 00151 in the signal array. Used only when FS_ETPU_AS_PHASE_CURRENTS_ON is set. */ 00152 const uint8_t phase_current_idx_c; /**< index of the phase C current 00153 in the signal array. Used only when FS_ETPU_AS_PHASE_CURRENTS_ON is set. */ 00154 const uint8_t cfifo_update; /**< update of eQADC command FIFO. 00155 This enables 2 selected phase current to be sampled in parallel. 00156 Which phase currents are selected is based on actual motor position in one 00157 of 6 sectors. See also *command_queue, cmd_ia/b/c_adc_0/1 and pwmm_chan_num. 00158 Use none, one or more of: 00159 - @ref AS_CFIFO_FRAME_PULSE_START - modify eQADC Command FIFO at the start 00160 of the frame pulse. Applies only if FS_ETPU_AS_FM0_FRAME_PULSE_ON is set. 00161 - @ref AS_CFIFO_FRAME_PULSE_END - modify eQADC Command FIFO at the end 00162 of the frame pulse. 00163 - @ref AS_CFIFO_CENTER_PULSE_START - modify eQADC Command FIFO at the start 00164 of the center pulse. Applies only if FS_ETPU_AS_FM0_CENTER_PULSE_ON is set 00165 - @ref AS_CFIFO_CENTER_PULSE_END - modify eQADC Command FIFO at the end 00166 of the center pulse. */ 00167 const uint32_t *p_cfifo; /**< Pointer to eQADC command queue in eTPU DATA RAM. 00168 Used only when any of the AS_CFIFO_FRAME/CENTER_PULSE_START/END is set. */ 00169 const uint32_t cmd_ia_adc_0; /**< eQADC command to sample 00170 phase A current on ADC0. 00171 Used only when any of the AS_CFIFO_FRAME/CENTER_PULSE_START/END is set. */ 00172 const uint32_t cmd_ia_adc_1; /**< eQADC command to sample 00173 phase A current on ADC1. 00174 Used only when any of the AS_CFIFO_FRAME/CENTER_PULSE_START/END is set. */ 00175 const uint32_t cmd_ib_adc_0; /**< eQADC command to sample 00176 phase B current on ADC0. 00177 Used only when any of the AS_CFIFO_FRAME/CENTER_PULSE_START/END is set. */ 00178 const uint32_t cmd_ib_adc_1; /**< eQADC command to sample 00179 phase B current on ADC1. 00180 Used only when any of the AS_CFIFO_FRAME/CENTER_PULSE_START/END is set. */ 00181 const uint32_t cmd_ic_adc_0; /**< eQADC command to sample 00182 phase C current on ADC0. 00183 Used only when any of the AS_CFIFO_FRAME/CENTER_PULSE_START/END is set. */ 00184 const uint32_t cmd_ic_adc_1; /**< eQADC command to sample 00185 phase C current on ADC1. 00186 Used only when any of the AS_CFIFO_FRAME/CENTER_PULSE_START/END is set. */ 00187 }; 00188 00189 /** A structure to represent outputs of AS processig. */ 00190 struct as_outputs_t 00191 { 00192 int24_t signal_value[FS_ETPU_AS_SIGNALS_MAX]; /**< This is the output 00193 of the signal processing - the current signal value as a 24-bit integer.*/ 00194 }; 00195 00196 00197 /******************************************************************************* 00198 * Function prototypes 00199 *******************************************************************************/ 00200 /* Initialize */ 00201 uint32_t fs_etpu_as_init( 00202 struct as_instance_t *p_as_instance, 00203 struct pwmm_instance_t *p_pwmm_instance, 00204 struct as_config_t *p_as_config); 00205 00206 /* Change configuration */ 00207 uint32_t fs_etpu_as_config( 00208 struct as_instance_t *p_as_instance, 00209 struct as_config_t *p_as_config); 00210 00211 /* Get outputs */ 00212 uint32_t fs_etpu_as_get_outputs( 00213 struct as_instance_t *p_as_instance, 00214 struct as_outputs_t *p_as_outputs); 00215 00216 /* Measure DC-offsets */ 00217 uint32_t fs_etpu_as_measure_dc_offsets( 00218 struct as_instance_t *p_as_instance, 00219 struct as_config_t *p_as_config, 00220 uint8_t signal_mask); 00221 00222 00223 #endif /* _ETPU_AS_H_ */ 00224 /******************************************************************************* 00225 * 00226 * Copyright: 00227 * Freescale Semiconductor, INC. All Rights Reserved. 00228 * You are hereby granted a copyright license to use, modify, and 00229 * distribute the SOFTWARE so long as this entire notice is 00230 * retained without alteration in any modified and/or redistributed 00231 * versions, and that such modified versions are clearly identified 00232 * as such. No licenses are granted by implication, estoppel or 00233 * otherwise under any patents or trademarks of Freescale 00234 * Semiconductor, Inc. This software is provided on an "AS IS" 00235 * basis and without warranty. 00236 * 00237 * To the maximum extent permitted by applicable law, Freescale 00238 * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 00239 * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A 00240 * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH 00241 * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) 00242 * AND ANY ACCOMPANYING WRITTEN MATERIALS. 00243 * 00244 * To the maximum extent permitted by applicable law, IN NO EVENT 00245 * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER 00246 * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 00247 * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER 00248 * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 00249 * 00250 * Freescale Semiconductor assumes no responsibility for the 00251 * maintenance and support of this software 00252 ******************************************************************************/ 00253 /******************************************************************************* 00254 * 00255 * REVISION HISTORY: 00256 * 00257 * FILE OWNER: Milan Brejl [r54529] 00258 * 00259 * Revision 1.0 2012/05/17 r54529 00260 * Initial version of file. 00261 ******************************************************************************/
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