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00001 /******************************************************************************* 00002 * 00003 * Freescale Semiconductor Inc. 00004 * (c) Copyright 2004-2014 Freescale Semiconductor, Inc. 00005 * ALL RIGHTS RESERVED. 00006 * 00007 ****************************************************************************//*! 00008 * 00009 * @file etpu_knock.c 00010 * 00011 * @author Milan Brejl [r54529] 00012 * 00013 * @version 1.0 00014 * 00015 * @date 17-Mar-2014 00016 * 00017 * @brief This file contains API for using the eTPU function 00018 * Knock (KNOCK). 00019 * 00020 ****************************************************************************//*! 00021 * 00022 * @mainpage 00023 * 00024 * The eTPU KNOCK APIs @ref etpu_knock.c/.h includes API functions for eTPU 00025 * function Knock. 00026 * 00027 * Each instance of the KNOCK eTPU function controls a single KNOCK channel. 00028 * 00029 * This eTPU function is intended to support ADC sampling of a knock signal 00030 * in an engine control system. 00031 * The function has 2 modes: 00032 * - Gate Mode 00033 * - Trigger Mode 00034 * 00035 * In the Gate Mode a simple angle-based pulses are generated. The output 00036 * signal can be used to gate the ADC running in continues mode. 00037 * In the Trigger Mode a 50% duty-cycle PWM signal is generated within 00038 * the angle-based window. The output signal can be used to trigger the ADC. 00039 * 00040 * There is an KNOCK parameter tdc_angle, relative to which all windows are 00041 * defined. Positive angles precede the tdc_angle, negative angles come after. 00042 * 00043 * The number of angle-based windows is configurable. The windows are 00044 * defined by an array of window structures, consisting of TDC-relative 00045 * window start angle and angular windows width. 00046 * 00047 * The KNOCK function enables to selectively generate channel interrupts 00048 * and/or DMA requests at: 00049 * - window start 00050 * - window end 00051 * - every trigger pulse (Trigger mode only) 00052 * 00053 *******************************************************************************/ 00054 /******************************************************************************* 00055 * Includes 00056 *******************************************************************************/ 00057 #include "etpu_knock.h" /* private header file */ 00058 #include "etpu_util.h" /* utility routines for working with the eTPU */ 00059 00060 /******************************************************************************* 00061 * Global variables 00062 *******************************************************************************/ 00063 extern uint32_t fs_etpu_data_ram_start; 00064 extern uint32_t fs_etpu_data_ram_ext; 00065 00066 /******************************************************************************* 00067 * FUNCTION: fs_etpu_knock_init 00068 ****************************************************************************//*! 00069 * @brief This function initializes eTPU channels to run KNOCK function. 00070 * 00071 * @note The following actions are performed in order: 00072 * -# Use user-defined CPBA or allocate new eTPU DATA RAM 00073 * -# Write chan config registers and FM bits 00074 * -# Write channel parameters 00075 * -# Write HSR 00076 * -# Set channel priority 00077 * 00078 * @param *p_knock_instance - This is a pointer to the instance structure 00079 * @ref knock_instance_t. 00080 * @param *p_knock_config - This is a pointer to the structure of configuration 00081 * parameters @ref knock_config_t. 00082 * 00083 * @return Error codes that can be returned are: 00084 * - @ref FS_ETPU_ERROR_MALLOC - eTPU DATA RAM memory allocation error 00085 * - @ref FS_ETPU_ERROR_NONE - No error 00086 * 00087 * @warning This function does not configure the pins, only the eTPU channels. 00088 *******************************************************************************/ 00089 uint32_t fs_etpu_knock_init( 00090 struct knock_instance_t *p_knock_instance, 00091 struct knock_config_t *p_knock_config) 00092 { 00093 uint8_t chan_num; 00094 uint8_t priority; 00095 uint32_t *cpba; 00096 uint32_t *cpba_windows; 00097 uint8_t window_count; 00098 struct knock_window_config_t *p_knock_window_config; 00099 uint32_t cr; 00100 uint8_t i; 00101 00102 chan_num = p_knock_instance->chan_num; 00103 priority = p_knock_instance->priority; 00104 cpba = p_knock_instance->cpba; 00105 cpba_windows = p_knock_instance->cpba_windows; 00106 00107 /* Use user-defined CPBA or allocate new eTPU DATA RAM for chan. parameters */ 00108 if(cpba == 0) 00109 { 00110 cpba = fs_etpu_malloc(FS_ETPU_KNOCK_NUM_PARMS); 00111 if(cpba == 0) 00112 { 00113 return(FS_ETPU_ERROR_MALLOC); 00114 } 00115 else 00116 { 00117 p_knock_instance->cpba = cpba; 00118 } 00119 } 00120 /* Use user-defined CPBA or allocate new eTPU DATA RAM for knock windows */ 00121 window_count = p_knock_config->window_count; 00122 if(cpba_windows == 0) 00123 { 00124 cpba_windows = 00125 fs_etpu_malloc(FS_ETPU_KNOCK_WINDOW_STRUCT_SIZE * window_count); 00126 if(cpba_windows == 0) 00127 { 00128 return(FS_ETPU_ERROR_MALLOC); 00129 } 00130 else 00131 { 00132 p_knock_instance->cpba_windows = cpba_windows; 00133 } 00134 } 00135 00136 /* Write chan config registers and FM bits */ 00137 cr = (FS_ETPU_KNOCK_TABLE_SELECT << 24) + 00138 (FS_ETPU_KNOCK_FUNCTION_NUMBER << 16) + 00139 (((uint32_t)cpba - fs_etpu_data_ram_start) >> 3); 00140 eTPU->CHAN[chan_num].CR.R = cr; 00141 eTPU->CHAN[chan_num].SCR.R = (uint32_t)p_knock_instance->polarity 00142 + p_knock_config->mode; 00143 00144 /* Write channel parameters */ 00145 /* 24-bit */ 00146 *(cpba + ((FS_ETPU_KNOCK_OFFSET_P_WINDOW_FIRST - 1)>>2)) = (uint32_t)cpba_windows - fs_etpu_data_ram_start; 00147 *(cpba + ((FS_ETPU_KNOCK_OFFSET_P_WINDOW - 1)>>2)) = 0; 00148 *(cpba + ((FS_ETPU_KNOCK_OFFSET_TDC_ANGLE - 1)>>2)) = p_knock_instance->tdc_angle; 00149 *(cpba + ((FS_ETPU_KNOCK_OFFSET_TDC_ANGLE_ACTUAL - 1)>>2)) = 0; 00150 *(cpba + ((FS_ETPU_KNOCK_OFFSET_TCR2_WINDOW_START - 1)>>2)) = 0; 00151 *(cpba + ((FS_ETPU_KNOCK_OFFSET_TCR2_WINDOW_END - 1)>>2)) = 0; 00152 *(cpba + ((FS_ETPU_KNOCK_OFFSET_TRIGGER_PERIOD - 1)>>2)) = p_knock_config->trigger_period; 00153 /* 8-bit */ 00154 *((uint8_t*)cpba + FS_ETPU_KNOCK_OFFSET_WINDOW_COUNT ) = window_count; 00155 *((uint8_t*)cpba + FS_ETPU_KNOCK_OFFSET_WINDOW_COUNTER ) = 0; 00156 *((uint8_t*)cpba + FS_ETPU_KNOCK_OFFSET_IRQ_DMA_OPTIONS ) = p_knock_config->irq_dma_options; 00157 00158 /* Write array of knockection parameters */ 00159 p_knock_window_config = p_knock_config->p_knock_window_config; 00160 for(i=0; i<window_count; i++) 00161 { 00162 /* 24-bit */ 00163 *(cpba_windows + ((FS_ETPU_KNOCK_WINDOW_OFFSET_START - 1)>>2)) = p_knock_window_config->angle_start; 00164 *(cpba_windows + ((FS_ETPU_KNOCK_WINDOW_OFFSET_WIDTH - 1)>>2)) = p_knock_window_config->angle_width; 00165 00166 p_knock_window_config++; 00167 cpba_windows += FS_ETPU_KNOCK_WINDOW_STRUCT_SIZE >> 2; 00168 } 00169 00170 /* Write HSR and Set channel priority*/ 00171 eTPU->CHAN[chan_num].HSRR.R = FS_ETPU_KNOCK_HSR_INIT; 00172 fs_etpu_enable(chan_num, priority); 00173 00174 return(FS_ETPU_ERROR_NONE); 00175 } 00176 00177 /******************************************************************************* 00178 * FUNCTION: fs_etpu_knock_config 00179 ****************************************************************************//*! 00180 * @brief This function changes the KNOCK configuration. 00181 * 00182 * @note The following actions are performed in order: 00183 * -# Write FM bit. 00184 * -# Write configuration parameter values to eTPU DATA RAM 00185 * 00186 * @warning The new knock window configuration (array of windows) 00187 * must fit into the eTPU DATA RAM already allocated. It means the 00188 * windows_count can only be lower or the same as the value provided 00189 * on initialization. 00190 * 00191 * @param *p_knock_instance - This is a pointer to the instance structure 00192 * @ref knock_instance_t. 00193 * @param *p_knock_config - This is a pointer to the structure of configuration 00194 * parameters @ref knock_config_t. 00195 * 00196 * @return Error codes that can be returned are: 00197 * - @ref FS_ETPU_ERROR_NONE - No error 00198 * 00199 *******************************************************************************/ 00200 uint32_t fs_etpu_knock_config( 00201 struct knock_instance_t *p_knock_instance, 00202 struct knock_config_t *p_knock_config) 00203 { 00204 uint32_t *cpba; 00205 uint32_t *cpba_windows; 00206 uint32_t *cpbae; 00207 struct knock_window_config_t *p_knock_window_config; 00208 uint8_t i; 00209 00210 cpba = p_knock_instance->cpba; 00211 cpba_windows = p_knock_instance->cpba_windows; 00212 00213 /* Write chan config registers and FM bits */ 00214 eTPU->CHAN[p_knock_instance->chan_num].SCR.B.FM1 = p_knock_config->mode >> 1; 00215 00216 /* Write channel parameters */ 00217 /* 24-bit - use cpbae to prevent from overwriting bits 31:24 */ 00218 cpbae = cpba + (0x4000 >> 2); /* sign-extended memory area */ 00219 *(cpbae + ((FS_ETPU_KNOCK_OFFSET_TRIGGER_PERIOD - 1)>>2)) = p_knock_config->trigger_period; 00220 /* 8-bit */ 00221 *((uint8_t*)cpba + FS_ETPU_KNOCK_OFFSET_IRQ_DMA_OPTIONS) = p_knock_config->irq_dma_options; 00222 *((uint8_t*)cpba + FS_ETPU_KNOCK_OFFSET_WINDOW_COUNT) = p_knock_config->window_count; 00223 00224 /* Write array of knock window parameters */ 00225 p_knock_window_config = p_knock_config->p_knock_window_config; 00226 for(i=0; i<p_knock_config->window_count; i++) 00227 { 00228 /* 24-bit */ 00229 *(cpba_windows + ((FS_ETPU_KNOCK_WINDOW_OFFSET_START - 1)>>2)) = p_knock_window_config->angle_start; 00230 *(cpba_windows + ((FS_ETPU_KNOCK_WINDOW_OFFSET_WIDTH - 1)>>2)) = p_knock_window_config->angle_width; 00231 00232 p_knock_window_config++; 00233 cpba_windows += FS_ETPU_KNOCK_WINDOW_STRUCT_SIZE >> 2; 00234 } 00235 00236 return(FS_ETPU_ERROR_NONE); 00237 } 00238 00239 /******************************************************************************* 00240 * 00241 * Copyright: 00242 * Freescale Semiconductor, INC. All Rights Reserved. 00243 * You are hereby granted a copyright license to use, modify, and 00244 * distribute the SOFTWARE so long as this entire notice is 00245 * retained without alteration in any modified and/or redistributed 00246 * versions, and that such modified versions are clearly identified 00247 * as such. No licenses are granted by implication, estoppel or 00248 * otherwise under any patents or trademarks of Freescale 00249 * Semiconductor, Inc. This software is provided on an "AS IS" 00250 * basis and without warranty. 00251 * 00252 * To the maximum extent permitted by applicable law, Freescale 00253 * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 00254 * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A 00255 * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH 00256 * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) 00257 * AND ANY ACCOMPANYING WRITTEN MATERIALS. 00258 * 00259 * To the maximum extent permitted by applicable law, IN NO EVENT 00260 * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER 00261 * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 00262 * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER 00263 * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 00264 * 00265 * Freescale Semiconductor assumes no responsibility for the 00266 * maintenance and support of this software 00267 ******************************************************************************/ 00268 /******************************************************************************* 00269 * 00270 * REVISION HISTORY: 00271 * 00272 * FILE OWNER: Milan Brejl [r54529] 00273 * 00274 * Revision 1.0 2014/03/17 r54529 00275 * Minor comment and formating improvements. 00276 * Ready for eTPU Engine Control Library release 1.0. 00277 * 00278 * Revision 0.1 2013/09/09 r54529 00279 * Initial version of file. 00280 ******************************************************************************/
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