/*!
  \page PwmLdd1 PwmLdd1 (PWM_LDD)
**          This component implements a pulse-width modulation generator
**          that generates signal with variable duty and fixed cycle.
**          This PWM component provides a high level API for unified
**          hardware access to various timer devices using the TimerUnit
**          component.
**

- \subpage PwmLdd1_settings
- \subpage PwmLdd1_regs_overview  
- \subpage PwmLdd1_regs_details
- \ref PwmLdd1_module "Component documentation" 
\page PwmLdd1_regs_overview Registers Initialization Overview
This page contains the initialization values for the registers of the peripheral(s) configured
by the component. 
<table>
<tr><td colspan="4" class="ttitle1">PwmLdd1 Initialization</td></tr>
<tr><td class="ttitle2">Address</td><td class="ttitle2">Register</td><td class="ttitle2">Register Value</td><td class="ttitle2">Register Description</td></tr>
<tr><td>0x40048014</td><td>SIM_SCGC</td>
<td class="regNotResetVal">0x00403080</td>
 <td>SIM_SCGC register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A054</td><td>FTM2_MODE</td>
<td class="regResetVal">0x00000004</td>
 <td>FTM2_MODE register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A000</td><td>FTM2_SC</td>
<td class="regNotResetVal">0x0000004A</td>
 <td>FTM2_SC register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A04C</td><td>FTM2_CNTIN</td>
<td class="regResetVal">0x00000000</td>
 <td>FTM2_CNTIN register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A004</td><td>FTM2_CNT</td>
<td class="regResetVal">0x00000000</td>
 <td>FTM2_CNT register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A00C</td><td>FTM2_C0SC</td>
<td class="regResetVal">0x00000000</td>
 <td>FTM2_C0SC register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A014</td><td>FTM2_C1SC</td>
<td class="regResetVal">0x00000000</td>
 <td>FTM2_C1SC register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A01C</td><td>FTM2_C2SC</td>
<td class="regResetVal">0x00000000</td>
 <td>FTM2_C2SC register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A024</td><td>FTM2_C3SC</td>
<td class="regNotResetVal">0x0000002C</td>
 <td>FTM2_C3SC register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A02C</td><td>FTM2_C4SC</td>
<td class="regResetVal">0x00000000</td>
 <td>FTM2_C4SC register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A034</td><td>FTM2_C5SC</td>
<td class="regResetVal">0x00000000</td>
 <td>FTM2_C5SC register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A008</td><td>FTM2_MOD</td>
<td class="regNotResetVal">0x0000EA5F</td>
 <td>FTM2_MOD register, peripheral PwmLdd1.</td></tr>
<tr><td>0x4003A028</td><td>FTM2_C3V</td>
<td class="regNotResetVal">0x0000EA60</td>
 <td>FTM2_C3V register, peripheral PwmLdd1.</td></tr>
<tr><td>0x40048010</td><td>SIM_PINSEL1</td>
<td class="regResetVal">0x00000000</td>
 <td>SIM_PINSEL1 register, peripheral PwmLdd1.</td></tr>
<tr><td>0xE000E410</td><td>NVIC_IPR4</td>
<td class="regNotResetVal">0x40000000</td>
 <td>NVIC_IPR4 register, peripheral PwmLdd1.</td></tr>
<tr><td>0xE000E100</td><td>NVIC_ISER</td>
<td class="regNotResetVal">0x00080000</td>
 <td>NVIC_ISER register, peripheral PwmLdd1.</td></tr>
<tr><td>0xE000E180</td><td>NVIC_ICER</td>
<td class="regResetVal">0x00000000</td>
 <td>NVIC_ICER register, peripheral PwmLdd1.</td></tr>
</table>
Color Denotes Reset Value
<br/>
\page PwmLdd1_regs_details Register Initialization Details
This page contains detailed description of initialization values for the 
registers of the peripheral(s) configured by the component. 

<div class="reghdr1">SIM_SCGC</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">ACMP1</td><td colspan="1" rowspan="2">ACMP0</td>
<td colspan="1" rowspan="2">ADC</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">IRQ</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">KBI1</td><td colspan="1" rowspan="2">KBI0</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">UART2</td><td colspan="1" rowspan="2">UART1</td>
<td colspan="1" rowspan="2">UART0</td><td colspan="1" rowspan="2">SPI1</td><td colspan="1" rowspan="2">SPI0</td>
<td colspan="1" rowspan="2">I2C1</td><td colspan="1" rowspan="2">I2C0</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">MSCAN</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">SWD</td><td colspan="1" rowspan="2">FLASH</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">CRC</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">FTM2</td><td colspan="1" rowspan="2">FTM1</td><td colspan="1" rowspan="2">FTM0</td>
<td colspan="1" rowspan="2">PWT</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">PIT</td><td colspan="1" rowspan="2">RTC</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>1</td><td>1</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x40048014</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00403080</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00003000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>31</td><td>ACMP1</td><td>0x00</td><td>ACMP1 Clock Gate Control</td>
<tr><td>30</td><td>ACMP0</td><td>0x00</td><td>ACMP0 Clock Gate Control</td>
<tr><td>29</td><td>ADC</td><td>0x00</td><td>ADC Clock Gate Control</td>
<tr><td>27</td><td>IRQ</td><td>0x00</td><td>IRQ Clock Gate Control</td>
<tr><td>25</td><td>KBI1</td><td>0x00</td><td>KBI1 Clock Gate Control</td>
<tr><td>24</td><td>KBI0</td><td>0x00</td><td>KBI0 Clock Gate Control</td>
<tr><td>22</td><td>UART2</td><td>0x01</td><td>UART2 Clock Gate Control</td>
<tr><td>21</td><td>UART1</td><td>0x00</td><td>UART1 Clock Gate Control</td>
<tr><td>20</td><td>UART0</td><td>0x00</td><td>UART0 Clock Gate Control</td>
<tr><td>19</td><td>SPI1</td><td>0x00</td><td>SPI1 Clock Gate Control</td>
<tr><td>18</td><td>SPI0</td><td>0x00</td><td>SPI0 Clock Gate Control</td>
<tr><td>17</td><td>I2C1</td><td>0x00</td><td>I2C1 Clock Gate Control</td>
<tr><td>16</td><td>I2C0</td><td>0x00</td><td>I2C0 Clock Gate Control</td>
<tr><td>15</td><td>MSCAN</td><td>0x00</td><td>MSCAN Clock Gate Control</td>
<tr><td>13</td><td>SWD</td><td>0x01</td><td>SWD (single wire debugger) Clock Gate Control</td>
<tr><td>12</td><td>FLASH</td><td>0x01</td><td>Flash Clock Gate Control</td>
<tr><td>10</td><td>CRC</td><td>0x00</td><td>CRC Clock Gate Control</td>
<tr><td>7</td><td>FTM2</td><td>0x01</td><td>FTM2 Clock Gate Control</td>
<tr><td>6</td><td>FTM1</td><td>0x00</td><td>FTM1 Clock Gate Control</td>
<tr><td>5</td><td>FTM0</td><td>0x00</td><td>FTM0 Clock Gate Control</td>
<tr><td>4</td><td>PWT</td><td>0x00</td><td>PWT Clock Gate Control</td>
<tr><td>1</td><td>PIT</td><td>0x00</td><td>PIT Clock Gate Control</td>
<tr><td>0</td><td>RTC</td><td>0x00</td><td>RTC Clock Gate Control</td>
</tr></table>
<div class="reghdr1">FTM2_MODE</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">FAULTIE</td>
<td colspan="2" rowspan="2">FAULTM</td><td colspan="1" rowspan="2">CAPTEST</td><td colspan="1" rowspan="2">PWMSYNC</td>
<td colspan="1" rowspan="2">WPDIS</td><td colspan="1" rowspan="2">INIT</td><td colspan="1" rowspan="2">FTMEN</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>1</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A054</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000004</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000004</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>FAULTIE</td><td>0x00</td><td>Fault Interrupt Enable</td>
<tr><td>5 - 6</td><td>FAULTM</td><td>0x00</td><td>Fault Control Mode</td>
<tr><td>4</td><td>CAPTEST</td><td>0x00</td><td>Capture Test Mode Enable</td>
<tr><td>3</td><td>PWMSYNC</td><td>0x00</td><td>PWM Synchronization Mode</td>
<tr><td>2</td><td>WPDIS</td><td>0x01</td><td>Write Protection Disable</td>
<tr><td>1</td><td>INIT</td><td>0x00</td><td>Initialize The Channels Output</td>
<tr><td>0</td><td>FTMEN</td><td>0x00</td><td>FTM Enable</td>
</tr></table>
<div class="reghdr1">FTM2_SC</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="1">TOF</td>
<td colspan="1" rowspan="2">TOIE</td><td colspan="1" rowspan="2">CPWMS</td><td colspan="2" rowspan="2">CLKS</td>
<td colspan="3" rowspan="2">PS</td>
</tr>
<tr>
<td class="trd1c">W</td>
<td colspan="1"></td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x0000004A</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>TOF</td><td>0x00</td><td>Timer Overflow Flag</td>
<tr><td>6</td><td>TOIE</td><td>0x01</td><td>Timer Overflow Interrupt Enable</td>
<tr><td>5</td><td>CPWMS</td><td>0x00</td><td>Center-Aligned PWM Select</td>
<tr><td>3 - 4</td><td>CLKS</td><td>0x00</td><td>Clock Source Selection</td>
<tr><td>0 - 2</td><td>PS</td><td>0x00</td><td>Prescale Factor Selection</td>
</tr></table>
<div class="reghdr1">FTM2_CNTIN</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="16" rowspan="2">INIT</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A04C</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>0 - 15</td><td>INIT</td><td>0x00</td><td>Initial Value Of The FTM Counter</td>
</tr></table>
<div class="reghdr1">FTM2_CNT</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="16" rowspan="2">COUNT</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A004</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>0 - 15</td><td>COUNT</td><td>0x00</td><td>Counter Value</td>
</tr></table>
<div class="reghdr1">FTM2_C0SC</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="1">CHF</td>
<td colspan="1" rowspan="2">CHIE</td><td colspan="1" rowspan="2">MSB</td><td colspan="1" rowspan="2">MSA</td>
<td colspan="1" rowspan="2">ELSB</td><td colspan="1" rowspan="2">ELSA</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
<td colspan="1"></td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A00C</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>CHF</td><td>0x00</td><td>Channel Flag</td>
<tr><td>6</td><td>CHIE</td><td>0x00</td><td>Channel Interrupt Enable</td>
<tr><td>5</td><td>MSB</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>4</td><td>MSA</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>3</td><td>ELSB</td><td>0x00</td><td>Edge or Level Select</td>
<tr><td>2</td><td>ELSA</td><td>0x00</td><td>Edge or Level Select</td>
</tr></table>
<div class="reghdr1">FTM2_C1SC</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="1">CHF</td>
<td colspan="1" rowspan="2">CHIE</td><td colspan="1" rowspan="2">MSB</td><td colspan="1" rowspan="2">MSA</td>
<td colspan="1" rowspan="2">ELSB</td><td colspan="1" rowspan="2">ELSA</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
<td colspan="1"></td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A014</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>CHF</td><td>0x00</td><td>Channel Flag</td>
<tr><td>6</td><td>CHIE</td><td>0x00</td><td>Channel Interrupt Enable</td>
<tr><td>5</td><td>MSB</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>4</td><td>MSA</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>3</td><td>ELSB</td><td>0x00</td><td>Edge or Level Select</td>
<tr><td>2</td><td>ELSA</td><td>0x00</td><td>Edge or Level Select</td>
</tr></table>
<div class="reghdr1">FTM2_C2SC</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="1">CHF</td>
<td colspan="1" rowspan="2">CHIE</td><td colspan="1" rowspan="2">MSB</td><td colspan="1" rowspan="2">MSA</td>
<td colspan="1" rowspan="2">ELSB</td><td colspan="1" rowspan="2">ELSA</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
<td colspan="1"></td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A01C</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>CHF</td><td>0x00</td><td>Channel Flag</td>
<tr><td>6</td><td>CHIE</td><td>0x00</td><td>Channel Interrupt Enable</td>
<tr><td>5</td><td>MSB</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>4</td><td>MSA</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>3</td><td>ELSB</td><td>0x00</td><td>Edge or Level Select</td>
<tr><td>2</td><td>ELSA</td><td>0x00</td><td>Edge or Level Select</td>
</tr></table>
<div class="reghdr1">FTM2_C3SC</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="1">CHF</td>
<td colspan="1" rowspan="2">CHIE</td><td colspan="1" rowspan="2">MSB</td><td colspan="1" rowspan="2">MSA</td>
<td colspan="1" rowspan="2">ELSB</td><td colspan="1" rowspan="2">ELSA</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
<td colspan="1"></td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A024</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x0000002C</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>CHF</td><td>0x00</td><td>Channel Flag</td>
<tr><td>6</td><td>CHIE</td><td>0x00</td><td>Channel Interrupt Enable</td>
<tr><td>5</td><td>MSB</td><td>0x01</td><td>Channel Mode Select</td>
<tr><td>4</td><td>MSA</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>3</td><td>ELSB</td><td>0x01</td><td>Edge or Level Select</td>
<tr><td>2</td><td>ELSA</td><td>0x01</td><td>Edge or Level Select</td>
</tr></table>
<div class="reghdr1">FTM2_C4SC</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="1">CHF</td>
<td colspan="1" rowspan="2">CHIE</td><td colspan="1" rowspan="2">MSB</td><td colspan="1" rowspan="2">MSA</td>
<td colspan="1" rowspan="2">ELSB</td><td colspan="1" rowspan="2">ELSA</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
<td colspan="1"></td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A02C</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>CHF</td><td>0x00</td><td>Channel Flag</td>
<tr><td>6</td><td>CHIE</td><td>0x00</td><td>Channel Interrupt Enable</td>
<tr><td>5</td><td>MSB</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>4</td><td>MSA</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>3</td><td>ELSB</td><td>0x00</td><td>Edge or Level Select</td>
<tr><td>2</td><td>ELSA</td><td>0x00</td><td>Edge or Level Select</td>
</tr></table>
<div class="reghdr1">FTM2_C5SC</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="1">CHF</td>
<td colspan="1" rowspan="2">CHIE</td><td colspan="1" rowspan="2">MSB</td><td colspan="1" rowspan="2">MSA</td>
<td colspan="1" rowspan="2">ELSB</td><td colspan="1" rowspan="2">ELSA</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
<td colspan="1"></td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A034</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>CHF</td><td>0x00</td><td>Channel Flag</td>
<tr><td>6</td><td>CHIE</td><td>0x00</td><td>Channel Interrupt Enable</td>
<tr><td>5</td><td>MSB</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>4</td><td>MSA</td><td>0x00</td><td>Channel Mode Select</td>
<tr><td>3</td><td>ELSB</td><td>0x00</td><td>Edge or Level Select</td>
<tr><td>2</td><td>ELSA</td><td>0x00</td><td>Edge or Level Select</td>
</tr></table>
<div class="reghdr1">FTM2_MOD</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="16" rowspan="2">MOD</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A008</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x0000EA5F</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>0 - 15</td><td>MOD</td><td>0x8000</td><td>Modulo Value</td>
</tr></table>
<div class="reghdr1">FTM2_C3V</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="16" rowspan="2">VAL</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4003A028</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x0000EA60</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>0 - 15</td><td>VAL</td><td>0x8000</td><td>Channel Value</td>
</tr></table>
<div class="reghdr1">SIM_PINSEL1</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">MSCANPS</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">PWTIN1PS</td><td colspan="1" rowspan="2">PWTIN0PS</td>
<td colspan="1" rowspan="2">UART2PS</td><td colspan="1" rowspan="2">UART1PS</td><td colspan="1" rowspan="2">SPI1PS</td>
<td colspan="1" rowspan="2">I2C1PS</td><td colspan="1" rowspan="2">FTM2PS5</td><td colspan="1" rowspan="2">FTM2PS4</td>
<td colspan="2" rowspan="2">FTM2PS3</td><td colspan="2" rowspan="2">FTM2PS2</td><td colspan="2" rowspan="2">FTM2PS1</td>
<td colspan="2" rowspan="2">FTM2PS0</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x40048010</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>16</td><td>MSCANPS</td><td>0x00</td><td>MSCAN Pin Select</td>
<tr><td>15</td><td>PWTIN1PS</td><td>0x00</td><td>PWTIN1 Pin Select</td>
<tr><td>14</td><td>PWTIN0PS</td><td>0x00</td><td>PWTIN0 Pin Select</td>
<tr><td>13</td><td>UART2PS</td><td>0x00</td><td>UART2 Pin Select</td>
<tr><td>12</td><td>UART1PS</td><td>0x00</td><td>UART1 Pin Select</td>
<tr><td>11</td><td>SPI1PS</td><td>0x00</td><td>SPI1 Pin Select</td>
<tr><td>10</td><td>I2C1PS</td><td>0x00</td><td>I2C1 Pin Select</td>
<tr><td>9</td><td>FTM2PS5</td><td>0x00</td><td>FTM2 Channel 5 Pin Select</td>
<tr><td>8</td><td>FTM2PS4</td><td>0x00</td><td>FTM2 Channel4 Pin Select</td>
<tr><td>6 - 7</td><td>FTM2PS3</td><td>0x00</td><td>FTM2 Channel 3 Pin Select</td>
<tr><td>4 - 5</td><td>FTM2PS2</td><td>0x00</td><td>FTM2 Channel 2 Pin Select</td>
<tr><td>2 - 3</td><td>FTM2PS1</td><td>0x00</td><td>FTM2 Channel 1 Pin Select</td>
<tr><td>0 - 1</td><td>FTM2PS0</td><td>0x00</td><td>FTM2 Channel 0 Pin Select</td>
</tr></table>
<div class="reghdr1">NVIC_IPR4</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="2" rowspan="2">PRI_19</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="2" rowspan="2">PRI_18</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="2" rowspan="2">PRI_17</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="2" rowspan="2">PRI_16</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0xE000E410</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x40000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>30 - 31</td><td>PRI_19</td><td>0x00</td><td>Priority of the FlexTimer Module 2 interrupt</td>
<tr><td>22 - 23</td><td>PRI_18</td><td>0x00</td><td>Priority of the FlexTimer Module 1 interrupt</td>
<tr><td>14 - 15</td><td>PRI_17</td><td>0x00</td><td>Priority of the FlexTimer Module 0 interrupt</td>
<tr><td>6 - 7</td><td>PRI_16</td><td>0x00</td><td>Priority of the Analog comparator 0 interrupt interrupt</td>
</tr></table>
<div class="reghdr1">NVIC_ISER</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">SETENA31</td><td colspan="1" rowspan="2">SETENA30</td>
<td colspan="1" rowspan="2">SETENA29</td><td colspan="1" rowspan="2">SETENA28</td><td colspan="1" rowspan="2">SETENA27</td>
<td colspan="1" rowspan="2">SETENA26</td><td colspan="1" rowspan="2">SETENA25</td><td colspan="1" rowspan="2">SETENA24</td>
<td colspan="1" rowspan="2">SETENA23</td><td colspan="1" rowspan="2">SETENA22</td><td colspan="1" rowspan="2">SETENA21</td>
<td colspan="1" rowspan="2">SETENA20</td><td colspan="1" rowspan="2">SETENA19</td><td colspan="1" rowspan="2">SETENA18</td>
<td colspan="1" rowspan="2">SETENA17</td><td colspan="1" rowspan="2">SETENA16</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">SETENA15</td><td colspan="1" rowspan="2">SETENA14</td>
<td colspan="1" rowspan="2">SETENA13</td><td colspan="1" rowspan="2">SETENA12</td><td colspan="1" rowspan="2">SETENA11</td>
<td colspan="1" rowspan="2">SETENA10</td><td colspan="1" rowspan="2">SETENA9</td><td colspan="1" rowspan="2">SETENA8</td>
<td colspan="1" rowspan="2">SETENA7</td><td colspan="1" rowspan="2">SETENA6</td><td colspan="1" rowspan="2">SETENA5</td>
<td colspan="1" rowspan="2">SETENA4</td><td colspan="1" rowspan="2">SETENA3</td><td colspan="1" rowspan="2">SETENA2</td>
<td colspan="1" rowspan="2">SETENA1</td><td colspan="1" rowspan="2">SETENA0</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0xE000E100</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00080000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>31</td><td>SETENA31</td><td>0x00</td><td>Freescale&apos;s Scalable Controller Area Network Tx and error interrupt set-enable bit</td>
<tr><td>30</td><td>SETENA30</td><td>0x00</td><td>Freescale&apos;s Scalable Controller Area Network Rx interrupt set-enable bit</td>
<tr><td>29</td><td>SETENA29</td><td>0x00</td><td>Pulse width timer interrupt set-enable bit</td>
<tr><td>28</td><td>SETENA28</td><td>0x00</td><td>WDOG interrupt set-enable bit</td>
<tr><td>27</td><td>SETENA27</td><td>0x00</td><td>Clock loss of lock interrupt set-enable bit</td>
<tr><td>26</td><td>SETENA26</td><td>0x00</td><td>Reserved iv 42 interrupt set-enable bit</td>
<tr><td>25</td><td>SETENA25</td><td>0x00</td><td>Keyboard interrupt interrupt set-enable bit</td>
<tr><td>24</td><td>SETENA24</td><td>0x00</td><td>Keyboard interrupt interrupt set-enable bit</td>
<tr><td>23</td><td>SETENA23</td><td>0x00</td><td>Periodic timer overflow channel 1 interrupt set-enable bit</td>
<tr><td>22</td><td>SETENA22</td><td>0x00</td><td>Periodic timer overflow channel 0 interrupt set-enable bit</td>
<tr><td>21</td><td>SETENA21</td><td>0x00</td><td>Analog comparator 1 interrupt interrupt set-enable bit</td>
<tr><td>20</td><td>SETENA20</td><td>0x00</td><td>Real-time counter interrupt set-enable bit</td>
<tr><td>19</td><td>SETENA19</td><td>0x01</td><td>FlexTimer Module 2 interrupt set-enable bit</td>
<tr><td>18</td><td>SETENA18</td><td>0x00</td><td>FlexTimer Module 1 interrupt set-enable bit</td>
<tr><td>17</td><td>SETENA17</td><td>0x00</td><td>FlexTimer Module 0 interrupt set-enable bit</td>
<tr><td>16</td><td>SETENA16</td><td>0x00</td><td>Analog comparator 0 interrupt interrupt set-enable bit</td>
<tr><td>15</td><td>SETENA15</td><td>0x00</td><td>Analog-to-Digital Converter 0 interrupt set-enable bit</td>
<tr><td>14</td><td>SETENA14</td><td>0x00</td><td>UART2 status and error interrupt set-enable bit</td>
<tr><td>13</td><td>SETENA13</td><td>0x00</td><td>UART1 status and error interrupt set-enable bit</td>
<tr><td>12</td><td>SETENA12</td><td>0x00</td><td>UART0 status and error interrupt set-enable bit</td>
<tr><td>11</td><td>SETENA11</td><td>0x00</td><td>Serial Peripheral Interface 1 interrupt set-enable bit</td>
<tr><td>10</td><td>SETENA10</td><td>0x00</td><td>Serial Peripheral Interface 0 interrupt set-enable bit</td>
<tr><td>9</td><td>SETENA9</td><td>0x00</td><td>Inter-Integrated Circuit 1 interrupt set-enable bit</td>
<tr><td>8</td><td>SETENA8</td><td>0x00</td><td>Inter-Integrated Circuit 0 interrupt set-enable bit</td>
<tr><td>7</td><td>SETENA7</td><td>0x00</td><td>External Interrupt interrupt set-enable bit</td>
<tr><td>6</td><td>SETENA6</td><td>0x00</td><td>Low-voltage detect, low-voltage warning interrupt set-enable bit</td>
<tr><td>5</td><td>SETENA5</td><td>0x00</td><td>Command complete and read collision interrupt set-enable bit</td>
<tr><td>4</td><td>SETENA4</td><td>0x00</td><td>Reserved iv 20 interrupt set-enable bit</td>
<tr><td>3</td><td>SETENA3</td><td>0x00</td><td>Reserved iv 19 interrupt set-enable bit</td>
<tr><td>2</td><td>SETENA2</td><td>0x00</td><td>Reserved iv 18 interrupt set-enable bit</td>
<tr><td>1</td><td>SETENA1</td><td>0x00</td><td>Reserved iv 17 interrupt set-enable bit</td>
<tr><td>0</td><td>SETENA0</td><td>0x00</td><td>Reserved iv 16 interrupt set-enable bit</td>
</tr></table>
<div class="reghdr1">NVIC_ICER</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">CLRENA31</td><td colspan="1" rowspan="2">CLRENA30</td>
<td colspan="1" rowspan="2">CLRENA29</td><td colspan="1" rowspan="2">CLRENA28</td><td colspan="1" rowspan="2">CLRENA27</td>
<td colspan="1" rowspan="2">CLRENA26</td><td colspan="1" rowspan="2">CLRENA25</td><td colspan="1" rowspan="2">CLRENA24</td>
<td colspan="1" rowspan="2">CLRENA23</td><td colspan="1" rowspan="2">CLRENA22</td><td colspan="1" rowspan="2">CLRENA21</td>
<td colspan="1" rowspan="2">CLRENA20</td><td colspan="1" rowspan="2">CLRENA19</td><td colspan="1" rowspan="2">CLRENA18</td>
<td colspan="1" rowspan="2">CLRENA17</td><td colspan="1" rowspan="2">CLRENA16</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">CLRENA15</td><td colspan="1" rowspan="2">CLRENA14</td>
<td colspan="1" rowspan="2">CLRENA13</td><td colspan="1" rowspan="2">CLRENA12</td><td colspan="1" rowspan="2">CLRENA11</td>
<td colspan="1" rowspan="2">CLRENA10</td><td colspan="1" rowspan="2">CLRENA9</td><td colspan="1" rowspan="2">CLRENA8</td>
<td colspan="1" rowspan="2">CLRENA7</td><td colspan="1" rowspan="2">CLRENA6</td><td colspan="1" rowspan="2">CLRENA5</td>
<td colspan="1" rowspan="2">CLRENA4</td><td colspan="1" rowspan="2">CLRENA3</td><td colspan="1" rowspan="2">CLRENA2</td>
<td colspan="1" rowspan="2">CLRENA1</td><td colspan="1" rowspan="2">CLRENA0</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0xE000E180</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>31</td><td>CLRENA31</td><td>0x00</td><td>Freescale&apos;s Scalable Controller Area Network Tx and error interrupt clear-enable bit</td>
<tr><td>30</td><td>CLRENA30</td><td>0x00</td><td>Freescale&apos;s Scalable Controller Area Network Rx interrupt clear-enable bit</td>
<tr><td>29</td><td>CLRENA29</td><td>0x00</td><td>Pulse width timer interrupt clear-enable bit</td>
<tr><td>28</td><td>CLRENA28</td><td>0x00</td><td>WDOG interrupt clear-enable bit</td>
<tr><td>27</td><td>CLRENA27</td><td>0x00</td><td>Clock loss of lock interrupt clear-enable bit</td>
<tr><td>26</td><td>CLRENA26</td><td>0x00</td><td>Reserved iv 42 interrupt clear-enable bit</td>
<tr><td>25</td><td>CLRENA25</td><td>0x00</td><td>Keyboard interrupt interrupt clear-enable bit</td>
<tr><td>24</td><td>CLRENA24</td><td>0x00</td><td>Keyboard interrupt interrupt clear-enable bit</td>
<tr><td>23</td><td>CLRENA23</td><td>0x00</td><td>Periodic timer overflow channel 1 interrupt clear-enable bit</td>
<tr><td>22</td><td>CLRENA22</td><td>0x00</td><td>Periodic timer overflow channel 0 interrupt clear-enable bit</td>
<tr><td>21</td><td>CLRENA21</td><td>0x00</td><td>Analog comparator 1 interrupt interrupt clear-enable bit</td>
<tr><td>20</td><td>CLRENA20</td><td>0x00</td><td>Real-time counter interrupt clear-enable bit</td>
<tr><td>19</td><td>CLRENA19</td><td>0x00</td><td>FlexTimer Module 2 interrupt clear-enable bit</td>
<tr><td>18</td><td>CLRENA18</td><td>0x00</td><td>FlexTimer Module 1 interrupt clear-enable bit</td>
<tr><td>17</td><td>CLRENA17</td><td>0x00</td><td>FlexTimer Module 0 interrupt clear-enable bit</td>
<tr><td>16</td><td>CLRENA16</td><td>0x00</td><td>Analog comparator 0 interrupt interrupt clear-enable bit</td>
<tr><td>15</td><td>CLRENA15</td><td>0x00</td><td>Analog-to-Digital Converter 0 interrupt clear-enable bit</td>
<tr><td>14</td><td>CLRENA14</td><td>0x00</td><td>UART2 status and error interrupt clear-enable bit</td>
<tr><td>13</td><td>CLRENA13</td><td>0x00</td><td>UART1 status and error interrupt clear-enable bit</td>
<tr><td>12</td><td>CLRENA12</td><td>0x00</td><td>UART0 status and error interrupt clear-enable bit</td>
<tr><td>11</td><td>CLRENA11</td><td>0x00</td><td>Serial Peripheral Interface 1 interrupt clear-enable bit</td>
<tr><td>10</td><td>CLRENA10</td><td>0x00</td><td>Serial Peripheral Interface 0 interrupt clear-enable bit</td>
<tr><td>9</td><td>CLRENA9</td><td>0x00</td><td>Inter-Integrated Circuit 1 interrupt clear-enable bit</td>
<tr><td>8</td><td>CLRENA8</td><td>0x00</td><td>Inter-Integrated Circuit 0 interrupt clear-enable bit</td>
<tr><td>7</td><td>CLRENA7</td><td>0x00</td><td>External Interrupt interrupt clear-enable bit</td>
<tr><td>6</td><td>CLRENA6</td><td>0x00</td><td>Low-voltage detect, low-voltage warning interrupt clear-enable bit</td>
<tr><td>5</td><td>CLRENA5</td><td>0x00</td><td>Command complete and read collision interrupt clear-enable bit</td>
<tr><td>4</td><td>CLRENA4</td><td>0x00</td><td>Reserved iv 20 interrupt clear-enable bit</td>
<tr><td>3</td><td>CLRENA3</td><td>0x00</td><td>Reserved iv 19 interrupt clear-enable bit</td>
<tr><td>2</td><td>CLRENA2</td><td>0x00</td><td>Reserved iv 18 interrupt clear-enable bit</td>
<tr><td>1</td><td>CLRENA1</td><td>0x00</td><td>Reserved iv 17 interrupt clear-enable bit</td>
<tr><td>0</td><td>CLRENA0</td><td>0x00</td><td>Reserved iv 16 interrupt clear-enable bit</td>
</tr></table>
*/
/*!
\page PwmLdd1_settings Component Settings
\code
**          Component name                                 : PwmLdd1
**          Period device                                  : FTM2_MOD
**          Duty device                                    : FTM2_C3V
**          Output pin                                     : PTC3/KBI0_P19/FTM2_CH3/ADC0_SE11
**          Counter                                        : FTM2_CNT
**          Interrupt service/event                        : Enabled
**            Interrupt                                    : INT_FTM2
**            Interrupt priority                           : medium priority
**            Iterations before action/event               : 1
**          Period                                         : 10 ms
**          Starting pulse width                           : 10 ms
**          Initial polarity                               : low
**          Initialization                                 : 
**            Enabled in init. code                        : yes
**            Auto initialization                          : yes
**            Event mask                                   : 
**              OnEnd                                      : Enabled
**          CPU clock/configuration selection              : 
**            Clock configuration 0                        : This component enabled
**            Clock configuration 1                        : This component disabled
**            Clock configuration 2                        : This component disabled
**            Clock configuration 3                        : This component disabled
**            Clock configuration 4                        : This component disabled
**            Clock configuration 5                        : This component disabled
**            Clock configuration 6                        : This component disabled
**            Clock configuration 7                        : This component disabled
**          Referenced components                          : 
**            Linked component                             : TU1
<h1>
\endcode
*/
