ISF  1.1
Intelligent Sensing Framework
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User/Source/isf_sysconf_comms.c
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00001 /**
00002  * @file isf_sysconf_comms.c
00003  * @brief System Communications channel configuration
00004  * @version 0.0
00005  * @date 2012-08-01
00006  *
00007  * Copyright (c) 2012, Freescale, Inc.
00008  */
00009 #include <isf_user_config.h>
00010 #include <isf_sysconf_types.h>
00011 #include <isf_sysconf_comms.h>
00012 
00013 // I2C BUS 1 MACROS
00014 // Definitions for convenience
00015 #define I2C_MASTER_FXLC95000_BASE_ADDRESS (0xFFFF8040)   // Galla(FXLC95000) i2c master base address
00016 #define FXLC95000_PINMUX_CTRL_REG         (0xFFFF806B)   // Galla(FXLC95000) Pin Mux control register
00017 #define FXLC95000_GPIO_EN_REG             (0x00C00004)   // Galla(FXLC95000) GPIO pin Enable regsiter
00018 #define FXLC95000_PERIPHERAL_STOPFC       (0xFFFF8065)   // Galla(FXLC95000) peripheral clock in stop fc mode enable
00019 #define FXLC95000_PERIPHERAL_RUN          (0xFFFF8069)   // Galla(FXLC95000) peripheral clock in run mode enable
00020 #define BUS1_NAME                         "B1"           // Name of the first I2C bus
00021 #define PMCR1_A2_LOWER_MASK               0x10           // Lower bit mask value of A2 PMCR1 register
00022 #define PMCR1_A3_LOWER_MASK               0x40           // Lower bit mask value of A3 PMCR1 register
00023 #define ONE_SECOND                        1000           // MQX runs at one millisecond clock ticks
00024 
00025 /******************************************************************************
00026  * I2C CHANNEL CONFIGURATION 
00027  ******************************************************************************/
00028 
00029 #ifdef DEVICE_HAS_I2C_CHANNELS 
00030 //I2C Bus configuration information about Galla (FXLC95000)
00031 
00032 #include <isf_i2cconf_types.h>
00033 
00034 enum {
00035     I2C_BUS_ONE = 0,
00036     I2C_NUM_BUS
00037 };
00038 // I2C Bus register information for the Galla Board
00039 const i2c_BusRegInfo_t gSys_I2cRegInfo[] = {
00040       {
00041         .regBase = (i2c_RegLayout_t*)I2C_MASTER_FXLC95000_BASE_ADDRESS,
00042         .pinMuxReg = (uint8*)FXLC95000_PINMUX_CTRL_REG,
00043         .gpioReg = (uint16*)FXLC95000_GPIO_EN_REG,
00044         .stopFCReg = (uint8*)FXLC95000_PERIPHERAL_STOPFC,
00045         .runReg = (uint8*)FXLC95000_PERIPHERAL_RUN,
00046         .pBusName = (int8*)BUS1_NAME,
00047         .pinConfig = 0x0,
00048         .pinMaskVal = PMCR1_A2_LOWER_MASK | PMCR1_A3_LOWER_MASK,
00049         .gpioConfig = 0x0,
00050         .gpioMaskVal = RGPIO_ENB_ENB14_MASK | RGPIO_ENB_ENB15_MASK,
00051         .vectorNumber = VectorNumber_Vmaster_i2c,
00052       }
00053     };
00054 
00055 const i2c_BusConfig_t gSys_I2cBusConfig[] = {
00056     {
00057         .timeout       = ONE_SECOND ,                           
00058         .speed         = I2C_SPEED_400_KHZ,                 
00059         .configFlags   = I2C_CONFIG_MASTER,              
00060         .hwSpecificCfg = { 0x00, 0x00 }
00061     }
00062 };
00063 // Number of the I2C Buses of same type
00064 const uint8 gSys_NumI2cBuses = I2C_NUM_BUS;
00065 // Bus information structure for each bus, each field in the structure are updated dynamically, so no need to assign any value
00066 i2c_BusInfo_t gSys_I2cBusInfo[I2C_NUM_BUS];
00067 #endif //DEVICE_HAS_I2C_CHANNELS 
00068 
00069 /******************************************************************************
00070  * CHANNELIST CONFIGURATION FOR THE SYSTEM 
00071  ******************************************************************************/
00072 const sys_channelDescriptor_t gSys_ConfiguredChannelList[] =
00073 {
00074                 {
00075                   // I2C_MASTER1
00076                  .protocolType       = PROTOCOL_TYPE_I2C,
00077                  .protocolInstanceId = I2C_BUS_ONE,
00078                  .pConfig            = &gSys_I2cBusConfig[I2C_BUS_ONE]
00079                 }
00080 };
00081 
00082 const uint8  gSys_NumChannels  = sizeof(gSys_ConfiguredChannelList)/sizeof(sys_channelDescriptor_t);
00083