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ISF
1.1
Intelligent Sensing Framework
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00001 /* 00002 * 00003 * Copyright (c) 2012, Freescale Semiconductor, Inc. 00004 * 00005 */ 00006 00007 /*! 00008 * @file fxlc95000_util.h 00009 * @brief Fxlc95000 utility header file 00010 * 00011 */ 00012 00013 00014 #ifndef FXLC95000_UTIL_H_ 00015 #define FXLC95000_UTIL_H_ 00016 00017 #include "isf_types.h" 00018 00019 00020 // Use byte alignment for structures 00021 #pragma pack(push) 00022 #pragma pack(1) 00023 00024 00025 00026 #define TPMxSC_TOIE_MASK 0x40 00027 #define TPMxSC_TOF_MASK 0x80 00028 00029 #define TPMxSC_CLK_BUSCLK 0x08 00030 #define TPMxSC_CLK_SYSCLK 0x10 00031 00032 00033 00034 00035 /*! 00036 * @def NUM_SENSOR_AXIS 00037 * 00038 * @brief Specifies the total number of axis/sensors in the (AFE) Analog Front End 00039 * 00040 * For the FXLC9500xL the sensor/axis are: 00041 * - accelerometer X, Y, Z 00042 * - temperature 00043 * - external input 00044 */ 00045 #define NUM_SENSOR_AXIS 5 00046 00047 /*! 00048 * @struct fxlc9500x_afe_data_t 00049 * 00050 * @brief A single sample set of AFE sensor data. 00051 * 00052 * The fxlc9500x_afe_data_t structure is used to contain a set of raw or trimmed AFE sensor 00053 * data taken during a single AFE sample. A 16 bit signed value is stored for each axis/sensor, 00054 * where the number of axis/sensors in each sample is defined in the #NUM_SENSOR_AXIS macro. 00055 * 00056 * @see fxlc9500x_framerate_set() 00057 */ 00058 typedef struct { 00059 int16 data[NUM_SENSOR_AXIS]; /**< Raw or trimmed value for each axis/sensor */ 00060 } fxlc9500x_afe_data_t; 00061 00062 00063 /*! 00064 * @enum afe_csr_options_t 00065 * 00066 * @brief Configures the AFE (Analog Front End) through the AFE CSR (Control and Status Register). 00067 * 00068 * Since the AFE_CSR is not directly accessible in user mode it can be accessed using the 00069 * Freescale #fxlc9500x_afe_csr_set() and #fxlc9500x_afe_csr_get() functions. 00070 * 00071 * The AFE_CSR controls three parameters of the AFE operation: 00072 * 00073 * - G range selection - The AFE can operate in +/-2g, +/- 4g or +/-8g range. 00074 * 00075 * - 4th Conversion - the X, Y and Z accelerometer channels are measured using 3 out of 4 of the 00076 * ADC channels. The fourth channel can be disabled or used to measure the temperature or 00077 * external ADC input. 00078 * 00079 * - Conversion mode - the ADC can perform a 10, 12, 14 or 16 bit conversion. A higher bit 00080 * conversion will give more resolution in the result but takes longer to complete and so 00081 * consumes more power. Note that the significance of the most significant bit remains the 00082 * same in all conversion modes, so if the conversion mode is less than 16 bits, the least 00083 * significant bits of the raw sensor value will be 0. 00084 * 00085 * The AFE_CSR setting value is normally constructed by OR-ing one entry from each of the 3 sections, 00086 * and casting it to the correct type. e.g. 00087 * 00088 * @code 00089 * \\ Configure the AFE Control and Status Register 00090 * fxlc9500x_afe_csr_set((afe_csr_options_t)( 00091 * AFE_CSR_GRANGE_2G | // Use +/- 2 g range 00092 * AFE_CSR_C4MODE_TEMP | // Measure X, Y, Z and Temperature 00093 * AFE_CSR_CMODE_10BIT // Use 10 bit conversion 00094 * ); 00095 * \endcode 00096 * 00097 * @see fxlc9500x_afe_csr_set(), fxlc9500x_afe_csr_get() 00098 */ 00099 typedef enum { 00100 // G Range Selection 00101 AFE_CSR_GRANGE_8G = 0xC0, /**< Set the AFE to the +/-8g range, so each LSB is 0.244 mg */ 00102 AFE_CSR_GRANGE_4G = 0x80, /**< Set the AFE to the +/-4g range, so each LSB is 0.122 mg */ 00103 AFE_CSR_GRANGE_2G = 0x40, /**< Set the AFE to the +/-2g range, so each LSB is 0.061 mg */ 00104 // 4th Conversion Mode 00105 AFE_CSR_C4MODE_NONE = 0x00, /**< Do not measure anything with the ADCs 4th channel */ 00106 AFE_CSR_C4MODE_TEMP = 0x10, /**< Use the ADCs 4th channel to measure the temperature sensor */ 00107 AFE_CSR_C4MODE_EXT = 0x20, /**< Use the ADCs 4th channel to measure the external inputs */ 00108 // Conversion Mode - 00109 AFE_CSR_CMODE_10BIT = 0x0C, /**< Perform a 10 bit ADC conversion so the 6 LSBs will be 0 */ 00110 AFE_CSR_CMODE_12BIT = 0x08, /**< Perform a 12 bit ADC conversion so the 4 LSBs will be 0 */ 00111 AFE_CSR_CMODE_14BIT = 0x04, /**< Perform a 14 bit ADC conversion so the 2 LSBs will be 0 */ 00112 AFE_CSR_CMODE_16BIT = 0x00 /**< Perform a 16 bit ADC conversion using all 16 data bits */ 00113 } afe_csr_options_t; 00114 00115 /*! 00116 * @enum framerate_t 00117 * 00118 * @brief Configures the FIC (Frame Interval Counter) frequency through the CK_OSCTRL register. 00119 * 00120 * The frame interval counter is the primary mechanism for waking the device up periodically to 00121 * take some action such as reading the AFE values. The Frame Interval Counter register is 00122 * accessible in user mode, but a function is provided to set the framerate for two reasons: 00123 * 00124 * - The upper three bits of the CK_OSCTRL register control other attributes of the oscillator 00125 * so should be preserved when the framerate is changed. 00126 * 00127 * - In order for the Frame interval Counter to run the lowest power idle mode that can be used 00128 * is Stop SC (slow clock). This is ensured by setting the #IDLE_BITS_CKOSC bit in the idle 00129 * #fxlc9500x_idle_t use_stop_sc field. While this field can be accessed by user code, it should 00130 * only be modified while interrupts are disabled, either in the exception or trap handlers, 00131 * or when interrupts have been disabled. 00132 * 00133 * If the framerate is set to #FRAMERATE_NONE then the #IDLE_BITS_CKOSC bit in the idle 00134 * #fxlc9500x_idle_t use_stop_sc field is cleared to enable idle mode to drop to the lowest power 00135 * Stop NC (no clock) mode. If the framerate is set to any other valid value then the 00136 * #IDLE_BITS_CKOSC bit in the idle #fxlc9500x_idle_t use_stop_sc field is set so that the idle 00137 * mode cannot drop below the Stop SC (slow clock) mode. If the device enters the Stop NC state 00138 * then the frame interval counter will not run and cannot wake the device up at the start of 00139 * each frame. 00140 * 00141 * @see fxlc9500x_framerate_set() 00142 */ 00143 00144 typedef enum { 00145 FRAMERATE_NONE = 0x00, /**< The Frame Interval Counter is disabled and will NOT wake 00146 * up the FXLC9500X periodically. */ 00147 FRAMERATE_3906HZ = 0x04, /**< Configures the frame interval counter to run at 3906 Hz */ 00148 FRAMERATE_1953HZ = 0x05, /**< Configures the frame interval counter to run at 1953 Hz */ 00149 FRAMERATE_977HZ = 0x06, /**< Configures the frame interval counter to run at 977 Hz */ 00150 FRAMERATE_488HZ = 0x07, /**< Configures the frame interval counter to run at 488 Hz */ 00151 FRAMERATE_244HZ = 0x08, /**< Configures the frame interval counter to run at 244 Hz */ 00152 FRAMERATE_122HZ = 0x09, /**< Configures the frame interval counter to run at 122 Hz */ 00153 FRAMERATE_61HZ = 0x0A, /**< Configures the frame interval counter to run at 61 Hz */ 00154 FRAMERATE_30HZ = 0x0B, /**< Configures the frame interval counter to run at 30.5 Hz */ 00155 FRAMERATE_15HZ = 0x0C, /**< Configures the frame interval counter to run at 15.3 Hz */ 00156 FRAMERATE_8HZ = 0x0D, /**< Configures the frame interval counter to run at 7.6 Hz */ 00157 FRAMERATE_4HZ = 0x0E, /**< Configures the frame interval counter to run at 3.8 Hz */ 00158 FRAMERATE_2HZ = 0x0F, /**< Configures the frame interval counter to run at 1.9 Hz */ 00159 FRAMERATE_1HZ = 0x10, /**< Configures the frame interval counter to run at 0.95 Hz */ 00160 FRAMERATE_POINT5HZ = 0x11, /**< Configures the frame interval counter to run at 0.48 Hz */ 00161 FRAMERATE_POINT2HZ = 0x12 /**< Configures the frame interval counter to run at 0.24 Hz */ 00162 } framerate_t; 00163 00164 00165 00166 /*! 00167 * @enum idle_bits_t 00168 * @brief Determines which bits of the idle mode are being configured. 00169 * 00170 * These value may be used individually or combined by the fxlc9500x_idle_use_stop_config() to set 00171 * how the bit field will be used to modify the idle mode operation. 00172 * 00173 * Bits can be individually to separate tasks so that when tasks modify the idle mode 00174 * configuration they don't overwrite the configuration set by other tasks/activities. 00175 * 00176 * This bit fields may also be used when directly modifying the #idle_config_t fields within the 00177 * user_exception_handler, or any other time when interrupts are disabled. 00178 * 00179 * The first 16 idle bits are reserved for Freescale use and should not be used by user code, 00180 * while the second set of 16 bits are available for use in customer code. 00181 * 00182 * @see fxlc9500x_idle_use_stop_config() 00183 */ 00184 typedef enum { 00185 IDLE_BITS_CKOSC = (1<<0), /**< sets the idle configuration for the frame interval counter*/ 00186 IDLE_BITS_AFE = (1<<1), /**< sets the idle configuration for the AFE (Analog Front End)*/ 00187 IDLE_BITS_RSVD_2 = (1<<2), /**< idle configuration bit reserved for Freescale use */ 00188 IDLE_BITS_RSVD_3 = (1<<3), /**< idle configuration bit reserved for Freescale use */ 00189 IDLE_BITS_RSVD_4 = (1<<4), /**< idle configuration bit reserved for Freescale use */ 00190 IDLE_BITS_RSVD_5 = (1<<5), /**< idle configuration bit reserved for Freescale use */ 00191 IDLE_BITS_RSVD_6 = (1<<6), /**< idle configuration bit reserved for Freescale use */ 00192 IDLE_BITS_RSVD_7 = (1<<7), /**< idle configuration bit reserved for Freescale use */ 00193 IDLE_BITS_RSVD_8 = (1<<8), /**< idle configuration bit reserved for Freescale use */ 00194 IDLE_BITS_RSVD_9 = (1<<9), /**< idle configuration bit reserved for Freescale use */ 00195 IDLE_BITS_RSVD_10 = (1<<10), /**< idle configuration bit reserved for Freescale use */ 00196 IDLE_BITS_RSVD_11 = (1<<11), /**< idle configuration bit reserved for Freescale use */ 00197 IDLE_BITS_RSVD_12 = (1<<12), /**< idle configuration bit reserved for Freescale use */ 00198 IDLE_BITS_RSVD_13 = (1<<13), /**< idle configuration bit reserved for Freescale use */ 00199 IDLE_BITS_RSVD_14 = (1<<14), /**< idle configuration bit reserved for Freescale use */ 00200 IDLE_BITS_RSVD_15 = (1<<15), /**< idle configuration bit reserved for Freescale use */ 00201 IDLE_BITS_USER_0 = (1<<16), /**< user assignable idle configuration bit */ 00202 IDLE_BITS_USER_1 = (1<<17), /**< user assignable idle configuration bit */ 00203 IDLE_BITS_USER_2 = (1<<18), /**< user assignable idle configuration bit */ 00204 IDLE_BITS_USER_3 = (1<<19), /**< user assignable idle configuration bit */ 00205 IDLE_BITS_USER_4 = (1<<20), /**< user assignable idle configuration bit */ 00206 IDLE_BITS_USER_5 = (1<<21), /**< user assignable idle configuration bit */ 00207 IDLE_BITS_USER_6 = (1<<22), /**< user assignable idle configuration bit */ 00208 IDLE_BITS_USER_7 = (1<<23), /**< user assignable idle configuration bit */ 00209 IDLE_BITS_USER_8 = (1<<24), /**< user assignable idle configuration bit */ 00210 IDLE_BITS_USER_9 = (1<<25), /**< user assignable idle configuration bit */ 00211 IDLE_BITS_USER_10 = (1<<26), /**< user assignable idle configuration bit */ 00212 IDLE_BITS_USER_11 = (1<<27), /**< user assignable idle configuration bit */ 00213 IDLE_BITS_USER_12 = (1<<28), /**< user assignable idle configuration bit */ 00214 IDLE_BITS_USER_13 = (1<<29), /**< user assignable idle configuration bit */ 00215 IDLE_BITS_USER_14 = (1<<30), /**< user assignable idle configuration bit */ 00216 IDLE_BITS_USER_15 = (1<<31) /**< user assignable idle configuration bit */ 00217 } idle_bits_t; 00218 00219 /*! 00220 * @enum idle_config_t 00221 * @brief Determines the idle mode that is being configured. 00222 * 00223 * This value is used by the fxlc9500x_idle_use_stop_config() to set how the bit field will be used 00224 * to modify the idle mode operation. 00225 * 00226 * @see fxlc9500x_idle_use_stop_config() 00227 */ 00228 typedef enum { 00229 IDLE_USE_STOP_FC_CLEAR = 0, /**< Clear (remove) a bit in the use_stop_fc field of the 00230 * fxlc9500x_idle_t structure */ 00231 IDLE_USE_STOP_FC_SET = 1, /**< Set a bit in the use_stop_fc field of the fxlc9500x_idle_t 00232 * structure. This will force the idle function to stop using 00233 * the Stop_FC mode so that the system clock still runs at 00234 * full speed */ 00235 IDLE_USE_STOP_SC_CLEAR = 2, /**< Clear (remove) a bit in the use_stop_sc field of the 00236 * fxlc9500x_idle_t structure */ 00237 IDLE_USE_STOP_SC_SET = 3 /**< Set a bit in the use_stop_sc field of the fxlc9500x_idle_t 00238 * structure. This will prevent the idle function from using 00239 * the Stop_NC mode so that the system clock still run */ 00240 } idle_config_t; 00241 00242 00243 /*! 00244 * @struct fxlc9500x_idle_t 00245 * 00246 * @brief Stop mode configuration during idle 00247 * 00248 * This structure holds the configuration variables that control the operation of the device when 00249 * the fxlc9500x_idle() function is called. The use of this structure is described in the 00250 * fxlc9500x_idle() function. 00251 * 00252 * The use_stop_fc and use_stop_sc fields may be modified inside the user_exception_handler() 00253 * function, so while they can be read anywhere, any code that modifies them should 00254 * only be executed when interrupts are disabled. This can be achieved in 3 ways: 00255 * - within the user_exception_handler() or user_trap_handler() functions 00256 * - when interrupts are disabled using the interrupts_disable() function 00257 * - using the fxlc9500x_idle_use_stop_config() function 00258 * 00259 * @see fxlc9500x_idle(), fxlc9500x_idle_use_stop_config() 00260 */ 00261 typedef struct { 00262 int8 stop_cfg; /**< Override the normal idle mode stop configuration, based 00263 * upon the value of this field: 00264 * - stop_cfg < 0: do not use any Stop mode 00265 * - stop_cfg > 0: use the supplied value as the Stop mode 00266 * - stop_cfg = 0: use the #use_stop_fc and #use_stop_sc 00267 * fields */ 00268 vuint32 use_stop_fc; /**< If this is non-zero then STOP mode must use StopFC 00269 * (Fast Clock) mode */ 00270 vuint32 use_stop_sc; /**< If this is non-zero and #use_stop_fc is zero then STOP 00271 * mode must use StopSC (Slow Clock) mode */ 00272 } fxlc9500x_idle_t; 00273 00274 00275 /*! 00276 * @struct fxlc9500x_vars_t 00277 * 00278 * @brief Freescale firmware variables 00279 * 00280 * This structure holds all of the variables that are used by the Freescale firmware. Most of 00281 * them can be used by the customer firmware to configure and control the operation of the 00282 * Freescale firmware. 00283 * 00284 * @see 00285 */ 00286 typedef struct { 00287 uint16 afe_cm_gain; /**< AFE trim configuration - do not modify */ 00288 uint8 afe_fs_shift; /**< AFE trim configuration - do not modify */ 00289 00290 fxlc9500x_idle_t idle; /**< Idle stop mode configuration - see 00291 * fxlc9500x_idle_t */ 00292 } fxlc9500x_vars_t; 00293 00294 00295 /*! 00296 * 00297 * @brief Executes the idle processing function, to sleep until the next exception. 00298 * 00299 * The fxlc9500x_idle() manages the CPU stop modes to use the lowest possible power Stop mode based 00300 * upon the configuration set in the idle_config_t fields and the fxlc9500x_vars_t events field, 00301 * using the following procedure: 00302 * - if the fxlc9500x_vars_t events field is non-zero then return. This will occur if there are 00303 * unhandled events that should be processed before entering Stop mode. 00304 * - if the idle_config_t stop_cfg field is negative then return. This enables the use of Stop 00305 * modes to be disabled for debug purposes. 00306 * - if the idle_config_t stop_cfg field is positive then the value is loaded directly into the 00307 * STOP_CR register and a stop issued. This enables testing of particular Stop configurations 00308 * but should not generally be used. 00309 * - If the idle_config_t stop_cfg field is 0 and the idle_config_t use_stop_fc is non-zero then 00310 * the device uses StopFC (fast clock) mode. 00311 * - If the idle_config_t stop_cfg and use_stop_fc fields are 0, and the idle_config_t use_stop_sc 00312 * field is non-zero then the device uses StopSC (slow clock) mode. 00313 * - If the idle_config_t stop_cfg, use_stop_fc and use_stop_sc fields are all zero then the 00314 * device uses StopNC (no clock) mode which is the lowest power mode. 00315 */ 00316 __declspec(register_abi) asm uint32 fxlc9500x_idle(void); 00317 00318 00319 00320 00321 00322 00323 00324 00325 /*! 00326 * 00327 * @brief Sets the FIC (Frame Interval Counter) frequency. 00328 * 00329 * This function configures the FIC (Frame Interval Counter) with the supplied frequency. If 00330 * the framerate is invalid then it is ignored and the frame rate is not adjusted. 00331 * 00332 * @param rate - (in) A framerate_t type value to specify the desired frame rate. 00333 * 00334 * @return The resulting framerate value in the Frame Interval Counter. This should 00335 * be the same as the requested value, unless the requested value was invalid, 00336 * in which case the current framerate setting in the Frame Interval Counter 00337 * will be returned. 00338 * 00339 * @errors \n 00340 * 00341 * @constraints At the highest supported framerate of 3.906 kHz the 16 and 14 bit 00342 * AFE conversion cannot be completed within the frame interval, so 00343 * only an AFE conversion length of 12 bits of less should be used. 00344 * 00345 * @reentrant No 00346 * 00347 * @see framerate_t 00348 * 00349 */ 00350 framerate_t fxlc9500x_framerate_set( 00351 framerate_t rate); 00352 00353 00354 /*! 00355 * 00356 * @brief Starts an AFE conversion cycle. 00357 * 00358 * This triggers the AFE to start an ADC conversion cycle. The duration of the conversion depends 00359 * on the AFE_CSR configuration. When the conversion completes the 00360 * VectorNumber_Vconversion_complete exception will occur and can be used by the interrupt 00361 * service routine to start subsequent processing. 00362 * 00363 * This function can be called from anywhere in user code, but is usually called from within the 00364 * Start of Frame interrupt is serviced, to minimize the jitter on the AFE sampling: 00365 * 00366 * @return None 00367 * 00368 * @errors \n 00369 * 00370 * @constraints The ADC requires the system clock to run at full speed during the 00371 * AFE conversion. If idle mode is used, StopFC mode should be set. 00372 * 00373 * @reentrant No 00374 * 00375 * @see \n 00376 * 00377 */ 00378 void fxlc9500x_afe_conversion_start(void); 00379 00380 00381 /*! 00382 * 00383 * @brief Clears the AFE conversion complete interrupt source. 00384 * 00385 * This resets the AFE conversion complete bit that is set on the completion of the ADC 00386 * conversion. It also clears the #IDLE_BITS_AFE in the #idle_config_t use_stop_fc field so that 00387 * the fxlc9500x_idle() function is no longer forced to use StopFC (fast clock) during any idle 00388 * time. 00389 * 00390 * Users do not normally need to call this function unless they are operating with 00391 * interrupts disabled. If the AFE is setup to generate an interrupt when a conversion 00392 * complete occurs, then the interrupt service routine should clear the conversion 00393 * complete bit. 00394 * 00395 * @return None 00396 * 00397 * @errors \n 00398 * 00399 * @constraints \n 00400 * 00401 * @reentrant No 00402 * 00403 * @see \n 00404 * 00405 */ 00406 void fxlc9500x_afe_interrupt_clear(void); 00407 00408 00409 00410 /*! 00411 * 00412 * @brief Gets raw (semi-trimmed) data from the AFE sensors. 00413 * 00414 * Normally the trimmed AFE sensor values are read using the fxlc9500x_afe_trimmed_sensor_data_get() 00415 * function which reads the hardware registers and applies the trim calculations in a single 00416 * function call. 00417 * 00418 * This function copies the semi-trimmed sensor values directly from the AFE hardware registers 00419 * into the supplied data structure. The raw sensor values can then be trimmed using the 00420 * fxlc9500x_afe_raw_sensor_data_trim() function. This can be useful to save power when basic 00421 * operations can be performed on the sensor data (such as decimation) prior to applying the 00422 * trim calculations. 00423 * 00424 * @code 00425 * fxlc9500x_afe_data_t raw_afe_data; 00426 * ... 00427 * fxlc9500x_afe_raw_sensor_data_get(raw_afe_data.data); 00428 * @endcode 00429 * 00430 * The raw sensor values are stored in the array of 16 bit signed integers in the order: 00431 * - Accelerometer X axis 00432 * - Accelerometer Y axis 00433 * - Accelerometer Z axis 00434 * - Temperature 00435 * - External input 00436 * 00437 * The Temperature and External input values will not change if the AFE_CSR is not 00438 * configured to measure them using the fourth ADC channel. 00439 * 00440 * @return None 00441 * 00442 * @errors \n 00443 * 00444 * @constraints The user must ensure that the supplied data structure is large 00445 * enough to hold the values from all of the axis/sensors. The number 00446 * of axis/sensors is set in the #NUM_SENSOR_AXIS definition. 00447 * 00448 * @reentrant No 00449 * 00450 * @see fxlc9500x_afe_trimmed_sensor_data_get(), fxlc9500x_afe_raw_sensor_data_trim(), 00451 * fxlc9500x_afe_data_t, NUM_SENSOR_AXIS 00452 * 00453 */ 00454 void fxlc9500x_afe_raw_sensor_data_get( 00455 int16 *pData_ptr); /**< Address to store the raw AFE sensor data values */ 00456 00457 00458 00459 /*! 00460 * 00461 * @brief Configures the AFE (Analog Front End) by setting the AFE CSR 00462 * (Control and Status Register) contents. 00463 * 00464 * The AFE_CSR is not directly accessible in user mode so this function enables it to be 00465 * set by the user, and it preserves some fixed configuration settings. 00466 * 00467 * The AFE_CSR controls three parameters of the AFE operation: 00468 * 00469 * - G range selection - The AFE can operate in +/-2g, +/- 4g or +/-8g range. 00470 * 00471 * - 4th Conversion - the X, Y and Z accelerometer channels are measured using 3 out of 4 of the 00472 * ADC channels. The fourth ADC channel can be disabled or used to measure the temperature or 00473 * external input. 00474 * 00475 * - Conversion mode - the ADC can perform a 10, 12, 14 or 16 bit conversion. A higher bit 00476 * conversion will give more resolution in the result but takes longer to complete and so 00477 * consumes more power. Note that the significance of the most significant bit remains the 00478 * same in all conversion modes, so if the conversion mode is less than 16 bits, the least 00479 * significant bits of the raw sensor value will be 0. 00480 * 00481 * The AFE_CSR setting value is normally constructed by OR-ing one entry from each of the 3 sections, 00482 * and casting it to the correct type. e.g. 00483 * 00484 * @code 00485 * // Configure the AFE Control and Status Register 00486 * fxlc9500x_afe_csr_set((afe_csr_options_t)( 00487 * AFE_CSR_GRANGE_2G | // Use +/- 2 g range 00488 * AFE_CSR_C4MODE_TEMP | // Measure X, Y, Z and Temperature 00489 * AFE_CSR_CMODE_10BIT // Use 10 bit conversion 00490 * ); 00491 * @endcode 00492 * 00493 * 00494 * @return None 00495 * 00496 * @errors \n 00497 * 00498 * @constraints \n 00499 * 00500 * @reentrant No 00501 * 00502 * @see afe_csr_options_t 00503 * 00504 */ 00505 void fxlc9500x_afe_csr_set( 00506 uint32 options); 00507 00508 00509 /*! 00510 * 00511 * @brief Gets the AFE CSR (Control and Status Register) contents. 00512 * 00513 * This function reads the configuration bits from the AFE CSR register. 00514 * 00515 * 00516 * @code 00517 * afe_csr_options_t csr; 00518 * csr = fxlc9500x_afe_csr_get(); // Read the current AFE CSR value 00519 * @endcode 00520 * 00521 * 00522 * @return The current setting of the AFE CSR options 00523 * 00524 * @errors \n 00525 * 00526 * @constraints \n 00527 * 00528 * @reentrant No 00529 * 00530 * @see fxlc9500x_afe_csr_set(), afe_csr_options_t 00531 * 00532 */ 00533 afe_csr_options_t fxlc9500x_afe_csr_get(void); 00534 00535 00536 /*! 00537 * 00538 * @brief Trims the supplied raw AFE sensor data to get trimmed AFE sensor values. 00539 * 00540 * Normally the trimmed AFE sensor values are read using the fxlc9500x_afe_trimmed_sensor_data_get() 00541 * function which reads the hardware registers and applies the trim calculations in a single 00542 * function call. 00543 * 00544 * This function trims previously read semi-trimmed sensor values, that were read 00545 * using the fxlc9500x_afe_raw_sensor_data_get() function, and optionally pre-processed. The 00546 * trim processing is identical to the fxlc9500x_afe_trimmed_sensor_data_get() function. 00547 * 00548 * @code 00549 * fxlc9500x_afe_data_t raw_afe_data; 00550 * fxlc9500x_afe_data_t trimmed_afe_data; 00551 * ... 00552 * fxlc9500x_afe_raw_sensor_data_trim(trimmed_afe_data.data, raw_afe_data.data); 00553 * @endcode 00554 * 00555 * 00556 * @return None 00557 * 00558 * @errors \n 00559 * 00560 * @constraints The user must ensure that the supplied data structure is large 00561 * enough to hold the values from all of the axis/sensors. The 00562 * number of axis/sensors is set in the #NUM_SENSOR_AXIS definition. 00563 * 00564 * @reentrant No 00565 * 00566 * @see fxlc9500x_afe_trimmed_sensor_data_get(), 00567 * fxlc9500x_afe_raw_sensor_data_get(), 00568 * fxlc9500x_afe_data_t 00569 * 00570 */ 00571 void fxlc9500x_afe_raw_sensor_data_trim( 00572 int16 *pTrim_ptr, /*!< Address to store the trimmed AFE sensor data values */ 00573 int16 *pData_ptr /*!< Address of the raw AFE sensor data to be trimmed */ 00574 ); 00575 00576 00577 /*! 00578 * 00579 * @brief Gets the current AFE accelerometer user offset values. 00580 * 00581 * The fxlc9500x_afe_trimmed_sensor_data_get() and fxlc9500x_afe_raw_sensor_data_trim() functions 00582 * add user programmable offset values to the trimmed accelerometer readings. These values may 00583 * be set or read by the user. 00584 * 00585 * The offset values are treated as values in the 8 g range (where the hex value 0x4000 equates to 00586 * 1 g), and are adjusted automatically to the appropriate g range when the g range is changed 00587 * with the fxlc9500x_afe_csr_set() function. The values can be determined by putting the device 00588 * into the 8 g mode, reading the accelerometer values without the effects of gravity, and then 00589 * negating these values. 00590 * 00591 * @code 00592 * int16 offsets[3] = { 0, 0, 0x4000 }; // X, Y and Z offsets in 8 g mode 00593 * fxlc9500x_afe_offsets_set(offsets); 00594 * @endcode 00595 * 00596 * The user offset values are reset whenever the device is reset. 00597 * 00598 * @return None 00599 * 00600 * @errors \n 00601 * 00602 * @constraints The user must ensure that the supplied data structure is large 00603 * enough to hold the values from all of the axis/sensors. The 00604 * number of axis/sensors is set in the #NUM_SENSOR_AXIS definition. 00605 * 00606 * @reentrant No 00607 * 00608 * @see fxlc9500x_afe_offsets_get(), 00609 * fxlc9500x_afe_trimmed_sensor_data_get() 00610 * 00611 */ 00612 void fxlc9500x_afe_offsets_set( 00613 int16 *pData_ptr); 00614 00615 00616 00617 /*! 00618 * 00619 * @brief Gets the current AFE accelerometer user offset values. 00620 * 00621 * This function enables the user to read the current values of the 3 accelerometer user 00622 * offset settings. The offset values are in 8g mode, so the hex value of 0x4000 corresponds to 00623 * an offset of 1g. 00624 * 00625 * @code 00626 * int_16 offsets[3]; // X, Y and Z offsets in 8 g mode 00627 * fxlc9500x_afe_offsets_get(offsets); 00628 * @endcode 00629 * 00630 * The user offset values are reset whenever the device is reset. 00631 * 00632 * @return None 00633 * 00634 * @errors \n 00635 * 00636 * @constraints The user must ensure that the supplied data structure is large 00637 * enough to hold the values from all 3 of the accelerometer axis. 00638 * 00639 * @reentrant No 00640 * 00641 * @see fxlc9500x_afe_offsets_set() 00642 * 00643 */ 00644 void fxlc9500x_afe_offsets_get( 00645 int16 *pData_ptr); //!< - location containing the 3 AFE offset values 00646 00647 00648 00649 // \function fxlc9500x_afe_trimmed_sensor_data_get() 00650 /** \brief Gets trimmed data from the AFE sensors. 00651 * 00652 * This function reads the data from the AFE sensor hardware registers and applies the trim 00653 * calculations to provide the accurate values. 00654 * 00655 * The accelerometer sensor values are corrected for gain and offset using device specific trim 00656 * values. User specified offsets are also be applied to account for offsets caused by board 00657 * mounting during the assembly process. The user offsets can be set using the 00658 * fxlc9500x_afe_offsets_set() function. 00659 * 00660 * \code 00661 * fxlc9500x_afe_data_t trimmed_afe_data; 00662 * ... 00663 * fxlc9500x_afe_trimmed_sensor_data_get(trimmed_afe_data.data); 00664 * \endcode 00665 * 00666 * The trimmed sensor values are stored in the array of 16 bit signed integers in the order: 00667 * - Accelerometer X axis 00668 * - Accelerometer Y axis 00669 * - Accelerometer Z axis 00670 * - Temperature 00671 * - External input 00672 * 00673 * The Temperature and External input values will remain unchanged if the AFE_CSR is not 00674 * configured to measure them using the fourth ADC channel. 00675 * 00676 * \warning The user must ensure that the supplied data structure is large enough to hold the 00677 * values from all of the axis/sensors. The number of axis/sensors is set in the 00678 * #NUM_SENSOR_AXIS definition. 00679 * 00680 * \sa fxlc9500x_afe_offsets_set(), fxlc9500x_afe_data_t 00681 */ 00682 void fxlc9500x_afe_trimmed_sensor_data_get( 00683 int16 *trim_ptr); /**< Address to store the trimmed AFE sensor data values */ 00684 00685 00686 /*! 00687 * 00688 * @brief Enable or disable the AFE conversion complete interrupt. 00689 * 00690 * @param bEnable_irq - (in) TRUE to enable AFE interrupt 00691 * FALSE to disable 00692 * 00693 * @return None 00694 * 00695 * @errors \n 00696 * 00697 * @constraints \n 00698 * 00699 * @reentrant No 00700 * 00701 * @see \n 00702 * 00703 */ 00704 void fxlc9500x_afe_interrupt_set(boolean bEnable_irq); 00705 00706 00707 00708 00709 00710 00711 00712 /*! 00713 * 00714 * @brief Configures the TPM timer. 00715 * 00716 * This function configures the TPM timer to run with various parameters 00717 * given by the caller. This function sets the TPM to run using the 00718 * bus clock (16Mhz). 00719 * 00720 * @param bIrq_enable - (in) TRUE to enable TPM overflow interrupt 00721 * FALSE to disable overflow interrupt 00722 * 00723 * @param modulo - (in) 16-bit modulo counter. When the TPM counter value 00724 * matches the modulo value, an interrupt is generated 00725 * (if TPM irq is enabled). See Fxlc95000 manual for 00726 * more information. 00727 * 00728 * @param prescale - (in) TPM clock prescaler. Possible values are 0-7. 00729 * The resulting clock divisor is: 00730 * Prescaler Divisor 00731 * 0 1 00732 * 1 2 00733 * 2 4 00734 * 3 8 00735 * 4 16 00736 * 5 32 00737 * 6 64 00738 * 7 128 00739 * 00740 * @return None 00741 * 00742 * @errors None 00743 * 00744 * @constraints None 00745 * 00746 * @reentrant No 00747 * 00748 * @see None 00749 * 00750 */ 00751 void setup_TPM(boolean bIrq_enable, uint16 modulo, uint8 prescale); 00752 00753 00754 00755 extern fxlc9500x_vars_t fxlc9500x_vars_int; 00756 00757 00758 #pragma pack(pop) 00759 00760 00761 #endif /* FXLC95000_UTIL_H_ */