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fxls8471.h
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1 /**
2 * @file fxls8471.h
3 * @brief The \b fxls8471.h contains the FXLS8471 Accelerometer register definitions, access macros, and
4 * device access functions.
5 *
6 * @copyright Copyright (c) 2014, Freescale Semiconductor, Inc.
7 */
8
9 #ifndef FXLS8471_H_
10 #define FXLS8471_H_
11
12 /**
13 * @brief The FXLS8471 types
14 */
15
16 /**
17 **
18 ** @brief The FXLS8471 Sensor Internal Register Map.
19 */
20 enum {
21 FXLS8471_STATUS = 0x00, // 0x00 - status register
22 FXLS8471_OUT_X_MSB, // 0x01 - data registers
23 FXLS8471_OUT_X_LSB, // 0x02 - data registers
24 FXLS8471_OUT_Y_MSB, // 0x03 - data registers
25 FXLS8471_OUT_Y_lSB, // 0x04 - data registers
26 FXLS8471_OUT_Z_MSB, // 0x05 - data registers
27 FXLS8471_OUT_Z_LSB, // 0x06 - data registers
28 // 0x07:0x08 - Reserved, do not modify.
29 FXLS8471_F_SETUP = 0x09, // 0x09 - F_SETUP FIFO Setup register
30 FXLS8471_TRIG_CFG, // 0x0A - TRIG_CFG Trigger Configuration register
31 FXLS8471_SYSMOD, // 0x0B - SYSMOD System Mode register
32 FXLS8471_INT_SOURCE, // 0x0C - INT_SOURCE System Interrupt Status register
33 FXLS8471_WHO_AM_I, // 0x0D - WHO_AM_I Device ID register
34 FXLS8471_XYZ_DATA_CFG, // 0x0E - XYZ_DATA_CFG register
35 FXLS8471_HP_FILTER_CUTOFF, // 0x0F - High Pass Filter Configuration register
36 FXLS8471_PL_STATUS, // 0x10 - PL_STATUS Portrait/Landscape Status register
37 FXLS8471_PL_CFG, // 0x11 - Portrait/Landscape Configuration register
38 FXLS8471_PL_COUNT, // 0x12 - Portrait/Landscape Debounce register
39 FXLS8471_PL_BF_ZCOMP, // 0x13 - PL_BF_ZCOMP Back/Front and Z Compensation register
40 FXLS8471_PL_THS, // 0x14 - PL_THS_REG Portrait/Landscape Threshold and Hysteresis register
41 FXLS8471_FFMT_CFG, // 0x15 - FFMT_CFG Freefall/Motion Configuration register
42 FXLS8471_FFMT_SRC, // 0x16 - FFMT_SRC Freefall/Motion Source register
43 FXLS8471_FFMT_THS, // 0x17 - FFMT_THS Freefall and Motion Threshold register
44 FXLS8471_FFMT_COUNT, // 0x18 - FFMT_COUNT Debounce register
45 // 0x19:0x1C - Reserved, do not modify.
46 FXLS8471_TRANSIENT_CFG = 0x1D, // 0x1D - Transient_CFG register
47 FXLS8471_TRANSIENT_SRC, // 0x1E - TRANSIENT_SRC register
48 FXLS8471_TRANSIENT_THS, // 0x1F - TRANSIENT_THS register
49 FXLS8471_TRANSIENT_COUNT, // 0x20 - TRANSIENT_COUNT register
50 FXLS8471_PULSE_CFG, // 0x21 - PULSE_CFG Pulse Configuration register
51 FXLS8471_PULSE_SRC, // 0x22 - PULSE_SRC Pulse Source register
52 FXLS8471_PULSE_THSX, // 0x23 - PULSE_THSX, Y, Z Pulse Threshold for X, Y and Z registers
53 FXLS8471_PULSE_THSY, // 0x24 - PULSE_THSX, Y, Z Pulse Threshold for X, Y and Z registers
54 FXLS8471_PULSE_THSZ, // 0x25 - PULSE_THSX, Y, Z Pulse Threshold for X, Y and Z registers
55 FXLS8471_PULSE_TMLT, // 0x26 - PULSE_TMLT Pulse Time Window 1 register
56 FXLS8471_PULSE_LTCY, // 0x27 - PULSE_LTCY Pulse Latency Timer register
57 FXLS8471_PULSE_WIND, // 0x28 - PULSE_WIND register (Read/Write)
58 FXLS8471_ASLP_COUNT, // 0x29 - ASLP_COUNT, Auto-WAKE/SLEEP Detection register (Read/Write)
59 FXLS8471_CTRL_REG1, // 0x2A - CTRL_REG1 System Control 1 register
60 FXLS8471_CTRL_REG2, // 0x2B - CTRL_REG2 System Control 1 register
61 FXLS8471_CTRL_REG3, // 0x2C - CTRL_REG3 Interrupt Control register
62 FXLS8471_CTRL_REG4, // 0x2D - CTRL_REG4 Interrupt Enable register (Read/Write)
63 FXLS8471_CTRL_REG5, // 0x2E - CTRL_REG5 Interrupt Configuration register (Read/Write)
64 FXLS8471_OFF_X, // 0x2F - OFF_X Offset Correction X register
65 FXLS8471_OFF_Y, // 0x30 - OFF_Y Offset Correction Y register
66 FXLS8471_OFF_Z, // 0x31 - OFF_Z Offset Correction Z register
67 // 0x32:0x5E - Reserved, do not modify.
68 FXLS8471_A_VECM_CFG = 0x5F, // 0x5F - Acceleration Vector Magnitude Config
69 FXLS8471_A_VECM_THS_MSB, // 0x60 - Acceleration Vector Magnitude Threshold (MSB)
70 FXLS8471_A_VECM_THS_LSB, // 0x61 - Acceleration Vector Magnitude Threshold (LSB)
71 FXLS8471_A_VECM_CNT, // 0x62 - Acceleration Vector Magnitude Debounce Count
72 FXLS8471_A_VECM_INITX_MSB, // 0x63 - Acceleration Vector Magnitude X-Axis Reference Value (MSB)
73 FXLS8471_A_VECM_INITX_LSB, // 0x64 - Acceleration Vector Magnitude X-Axis Reference Value (LSB)
74 FXLS8471_A_VECM_INITY_MSB, // 0x65 - Acceleration Vector Magnitude Y-Axis Reference Value (MSB)
75 FXLS8471_A_VECM_INITY_LSB, // 0x66 - Acceleration Vector Magnitude Y-Axis Reference Value (LSB)
76 FXLS8471_A_VECM_INITZ_MSB, // 0x67 - Acceleration Vector Magnitude Z-Axis Reference Value (MSB)
77 FXLS8471_A_VECM_INITZ_LSB, // 0x68 - Acceleration Vector Magnitude Z-Axis Reference Value (LSB)
78 // 0x69:0x72 - Reserved, do not modify.
79 FXLS8471_A_FFMT_THS_X_MSB = 0x73,// 0x73 - X-Axis FFMT Threshold (MSB)
80 FXLS8471_A_FFMT_THS_X_LSB, // 0x74 - X-Axis FFMT Threshold (LSB)
81 FXLS8471_A_FFMT_THS_Y_MSB, // 0x75 - Y-Axis FFMT Threshold (MSB)
82 FXLS8471_A_FFMT_THS_Y_LSB, // 0x76 - Y-Axis FFMT Threshold (LSB)
83 FXLS8471_A_FFMT_THS_Z_MSB, // 0x77 - Z-Axis FFMT Threshold (MSB)
84 FXLS8471_A_FFMT_THS_Z_LSB, // 0x78 - Z-Axis FFMT Threshold (LSB)
85 // 0x79:0xFF - Reserved, do not modify.
86 };
87
88 #define FXLS8471_WHOAMI_VALUE (0x6A)
89
90 /*
91 * General purpose macros to set/get a specific bit field within a register.
92 * The macro assumes that the root identifier for the field is a consistent character string (e.g., "BIT_FIELD").
93 * The bit field mask is the character string followed by "_MASK" (e.g., BIT_FIELD_MASK).
94 * The bit field shift is the character string followed by "_SHIFT" (e.g., BIT_FIELD_SHIFT).
95 */
96 #define FXLS8471_SET_FIELD(name,val) (((val)<<FXLS8471_##name##_SHIFT)&(FXLS8471_##name##_MASK))
97 #define FXLS8471_GET_FIELD(name,val) ((val&FXLS8471_##name##_MASK)>>FXLS8471_##name##_SHIFT)
98
99 /*
100 ** STATUS Register
101 */
102 #define FXLS8471_ZYXOW_MASK 0x80
103 #define FXLS8471_ZYXOW_SHIFT 7
104 #define FXLS8471_ZOW_MASK 0x40
105 #define FXLS8471_YOW_MASK 0x20
106 #define FXLS8471_XOW_MASK 0x10
107 #define FXLS8471_ZYXDR_MASK 0x08
108 #define FXLS8471_ZYXDR_SHIFT 3
109 #define FXLS8471_ZDR_MASK 0x04
110 #define FXLS8471_YDR_MASK 0x02
111 #define FXLS8471_XDR_MASK 0x01
112
113 /*
114 * Output Data Registers
115 */
116
117 /*
118 ** F_STATUS FIFO Status Register - when F_MODE != 0
119 */
120 #define FXLS8471_F_OVF_MASK 0x80
121 #define FXLS8471_F_OVF_SHIFT 7
122 #define FXLS8471_F_WMRK_FLAG_MASK 0x40
123 #define FXLS8471_F_WMRK_FLAG_SHIFT 6
124 #define FXLS8471_F_CNT_MASK 0x3F
125 #define FXLS8471_F_CNT_SHIFT 0
126
127 /*
128 ** F_SETUP FIFO Setup Register
129 */
130 #define FXLS8471_F_MODE_MASK 0xC0
131 #define FXLS8471_F_MODE_SHIFT 6
132 #define FXLS8471_F_WMRK_MASK 0x3F
133 #define FXLS8471_F_WMRK_SHIFT 0
134 //
135 #define FXLS8471_F_MODE_DISABLED 0x00
136 #define FXLS8471_F_MODE_CIRCULAR 0x01
137 #define FXLS8471_F_MODE_FILL 0x02
138 #define FXLS8471_F_MODE_TRIGGER 0x03
139
140 /*
141 ** TRIG_CFG FIFO Trigger Configuration Register
142 */
143 #define FXLS8471_TRIG_TRANS_MASK 0x20
144 #define FXLS8471_TRIG_TRANS_SHIFT 5
145 #define FXLS8471_TRIG_LNDPRT_MASK 0x10
146 #define FXLS8471_TRIG_LNDPRT_SHIFT 4
147 #define FXLS8471_TRIG_PULSE_MASK 0x08
148 #define FXLs8471_TRIG_PULSE_SHIFT 3
149 #define FXLS8471_TRIG_FFMT_MASK 0x04
150 #define FXLS8471_TRIG_FFMT_SHIFT 2
151 #define FXLS8471_TRIG_A_VECM_MASK 0x02
152 #define FXLS8471_TRIG_A_VECM_SHIFT 1
153
154 /*
155 ** SYSMOD System Mode Register
156 */
157 #define FXLS8471_FGERR_MASK 0x80
158 #define FXLS8471_FGERR_SHIFT 7
159 #define FXLS8471_FGT_MASK 0x7C
160 #define FXLS8471_FGT_SHIFT 2
161 #define FXLS8471_SYSMOD_MASK 0x03
162 #define FXLS8471_SYSMOD_SHIFT 0
163 //
164 #define FXLS8471_SYSMOD_STANDBY 0x00
165 #define FXLS8471_SYSMOD_WAKE 0x01
166 #define FXLS8471_SYSMOD_SLEEP 0x02
167
168 /*
169 ** INT_SOURCE System Interrupt Status Register
170 */
171 #define FXLS8471_SRC_ASLP_MASK 0x80
172 #define FXLS8471_SRC_ASLP_SHIFT 7
173 #define FXLS8471_SRC_FIFO_MASK 0x40
174 #define FXLS8471_SRC_FIFO_SHIFT 6
175 #define FXLS8471_SRC_TRANS_MASK 0x20
176 #define FXLS8471_SRC_TRANS_SHIFT 5
177 #define FXLS8471_SRC_LNDPRT_MASK 0x10
178 #define FXLS8471_SRC_LNDPRT_SHIFT 4
179 #define FXLS8471_SRC_PULSE_MASK 0x08
180 #define FXLS8471_SRC_PULSE_SHIFT 3
181 #define FXLS8471_SRC_FFMT_MASK 0x04
182 #define FXLS8471_SRC_FFMT_SHIFT 2
183 #define FXLS8471_SRC_A_VECM_MASK 0x02
184 #define FXLS8471_SRC_A_VECM_SHIFT 1
185 #define FXLS8471_SRC_DRDY_MASK 0x01
186 #define FXLS8471_SRC_DRDY_SHIFT 0
187
188 /*
189 ** XYZ_DATA_CFG Sensor Data Configuration Register
190 */
191 #define FXLS8471_HPF_OUT_MASK 0x10
192 #define FXLS8471_HPF_OUT_SHIFT 4
193 #define FXLS8471_FS_MASK 0x03
194 #define FXLS8471_FS_SHIFT 0
195
196 /*
197 ** HP_FILTER_CUTOFF High Pass Filter Register
198 */
199 #define FXLS8471_PULSE_HPF_BYP_MASK 0x20
200 #define FXLS8471_PULSE_HPF_BYP_SHIFT 5
201 #define FXLS8471_PULSE_LPF_EN_MASK 0x10
202 #define FXLS8471_PULSE_LPF_EN_SHIFT 4
203 #define FXLS8471_SEL_MASK 0x03
204 #define FXLS8471_SEL_SHIFT 0
205
206 /*
207 ** PL_STATUS Portrait/Landscape Status Register
208 */
209 #define FXLS8471_NEWLP_MASK 0x80
210 #define FXLS8471_NEWLP_SHIFT 7
211 #define FXLS8471_LO_MASK 0x40
212 #define FXLS8471_LO_SHIFT 6
213 #define FXLS8471_LAPO_MASK 0x06
214 #define FXLS8471_LAPO_SHIFT 1
215 #define FXLS8471_BAFRO_MASK 0x01
216 #define FXLS8471_BAFRO_SHIFT 0
217
218 /*
219 ** PL_CFG Portrait/Landscape Configuration Register
220 */
221 #define FXLS8471_DBCNTM_MASK 0x80
222 #define FXLS8471_DBCNTM_SHIFT 7
223 #define FXLS8471_PL_EN_MASK 0x40
224 #define FXLS8471_PL_EN_SHIFT 6
225
226 /*
227 ** PL_BF_ZCOMP Back/Front and Z Compensation Register
228 */
229 #define FXLS8471_BKFR_MASK 0xC0
230 #define FXLS8471_BKFR_SHIFT 6
231 #define FXLS8471_ZLOCK_MASK 0x07
232 #define FXLS8471_ZLOCK_SHIFT 0
233
234 /*
235 ** PL_THS Portrait to Landscape Threshold Register
236 */
237 #define FXLS8471_PL_THS_MASK 0xF8
238 #define FXLS8471_PL_THS_SHIFT 3
239 #define FXLS8471_HYS_MASK 0x07
240 #define FXLS8471_HYS_SHIFT 0
241
242 /*
243 ** FFMT_CFG Freefall and Motion Detection Configuration Register
244 */
245 #define FXLS8471_A_FFMT_ELE_MASK 0x80
246 #define FXLS8471_A_FFMT_ELE_SHIFT 7
247 #define FXLS8471_A_FFMT_OAE_MASK 0x40
248 #define FXLS8471_A_FFMT_OAE_SHIFT 6
249 #define FXLS8471_A_FFMT_ZEFE_MASK 0x20
250 #define FXLS8471_A_FFMT_ZEFE_SHIFT 5
251 #define FXLS8471_A_FFMT_YEFE_MASK 0x10
252 #define FXLS8471_A_FFMT_YEFE_SHIFT 4
253 #define FXLS8471_A_FFMT_XEFE_MASK 0x08
254 #define FXLS8471_A_FFMT_XEFE_SHIFT 3
255 /*
256 ** FFMT_SRC Freefall and Motion Detection Source Registers
257 */
258 #define FXLS8471_A_FFMT_EA_MASK 0x80
259 #define FXLS8471_A_FFMT_EA_SHIFT 7
260 #define FXLS8471_A_FFMT_ZHE_MASK 0x20
261 #define FXLS8471_A_FFMT_ZHE_SHIFT 5
262 #define FXLS8471_A_FFMT_ZHP_MASK 0x10
263 #define FXLS8471_A_FFMT_ZHP_SHIFT 4
264 #define FXLS8471_A_FFMT_YHE_MASK 0x08
265 #define FXLS8471_A_FFMT_YHE_SHIFT 3
266 #define FXLS8471_A_FFMT_YHP_MASK 0x04
267 #define FXLS8471_A_FFMT_YHP_SHIFT 2
268 #define FXLS8471_A_FFMT_XHE_MASK 0x02
269 #define FXLS8471_A_FFMT_XHE_SHIFT 1
270 #define FXLS8471_A_FFMT_XHP_MASK 0x01
271 #define FXLS8471_A_FFMT_XHP_SHIFT 0
272 /*
273 ** FFMT_THS Freefall and Motion Threshold Registers
274 ** TRANSIENT_THS Transient Threshold Register
275 */
276 #define FXLS8471_A_FFMT_DBCNTM_MASK 0x80
277 #define FXLS8471_A_FFMT_DBCNTM_SHIFT 7
278 #define FXLS8471_A_FFMT_THS_MASK 0x7F
279 #define FXLS8471_A_FFMT_THS_SHIFT 0
280
281 /*
282 * A_FFMT_THS_X_MSB
283 */
284 #define FXLS8471_A_FFMT_THS_XYZ_EN_MASK 0x80
285 #define FXLS8471_A_FFMT_THS_XYZ_EN_SHIFT 7
286 /*
287 ** TRANSIENT_CFG Transient Configuration Register
288 */
289 #define FXLS8471_TELE_MASK 0x10
290 #define FXLS8471_TELE_SHIFT 4
291 #define FXLS8471_ZTEFE_MASK 0x08
292 #define FXLS8471_ZTEFE_SHIFT 3
293 #define FXLS8471_YTEFE_MASK 0x04
294 #define FXLS8471_YTEFE_SHIFT 2
295 #define FXLS8471_XTEFE_MASK 0x02
296 #define FXLS8471_XTEFE_SHIFT 1
297 #define FXLS8471_HPF_BYP_MASK 0x01
298 #define FXLS8471_HPF_BYP_SHIFT 0
299
300 /*
301 ** TRANSIENT_SRC Transient Source Register
302 */
303 #define FXLS8471_TEA_MASK 0x40
304 #define FXLS8471_ZTRANSE_MASK 0x20
305 #define FXLS8471_Z_TRANS_POL_MASK 0x10
306 #define FXLS8471_YTRANSE_MASK 0x08
307 #define FXLS8471_Y_TRANS_POL_MASK 0x04
308 #define FXLS8471_XTRANSE_MASK 0x02
309 #define FXLS8471_X_TRANS_POL_MASK 0x01
310
311 /*
312 ** PULSE_CFG Pulse Configuration Register
313 */
314 #define FXLS8471_DPA_MASK 0x80
315 #define FXLS8471_DPA_SHIFT 7
316 #define FXLS8471_PELE_MASK 0x40
317 #define FXLS8471_PELE_SHIFT 6
318 #define FXLS8471_ZDPEFE_MASK 0x20
319 #define FXLS8471_ZDPEFE_SHIFT 5
320 #define FXLS8471_ZSPEFE_MASK 0x10
321 #define FXLS8471_ZSPEFE_SHIFT 4
322 #define FXLS8471_YDPEFE_MASK 0x08
323 #define FXLS8471_YDPEFE_SHIFT 3
324 #define FXLS8471_YSPEFE_MASK 0x04
325 #define FXLS8471_YSPEFE_SHIFT 2
326 #define FXLS8471_XDPEFE_MASK 0x02
327 #define FXLS8471_XDPEFE_SHIFT 1
328 #define FXLS8471_XSPEFE_MASK 0x01
329 #define FXLS8471_XSPEFE_SHIFT 0
330 /*
331 ** PULSE_SRC Pulse Source Register
332 */
333 #define FXLS8471_PEA_MASK 0x80
334 #define FXLS8471_AXZ_MASK 0x40
335 #define FXLS8471_AXY_MASK 0x20
336 #define FXLS8471_AXX_MASK 0x10
337 #define FXLS8471_DPE_MASK 0x08
338 #define FXLS8471_POLZ_MASK 0x04
339 #define FXLS8471_POLY_MASK 0x02
340 #define FXLS8471_POLX_MASK 0x01
341 /*
342 ** PULSE_THS XYZ Pulse Threshold Registers
343 */
344 #define FXLS8471_PTHS_MASK 0x7F
345 #define FXLS8471_PTHS_SHIFT 0
346
347 /*
348 ** CTRL_REG1 System Control 1 Register
349 */
350 #define FXLS8471_ASLP_RATE_MASK 0xC0
351 #define FXLS8471_ASLP_RATE_SHIFT 6
352 #define FXLS8471_DR_MASK 0x38
353 #define FXLS8471_DR_SHIFT 3
354 #define FXLS8471_LNOISE_MASK 0x04
355 #define FXLS8471_LNOISE_SHIFT 2
356 #define FXLS8471_FREAD_MASK 0x02
357 #define FXLS8471_FREAD_SHIFT 1
358 #define FXLS8471_ACTIVE_MASK 0x01
359 #define FXLS8471_ACTIVE_SHIFT 0
360 //
361 #define FXLS8471_ACTIVE (FXLS8471_ACTIVE_MASK)
362 #define FXLS8471_STANDBY 0x00
363
364 /*
365 ** CTRL_REG2 System Control 2 Register
366 */
367 #define FXLS8471_ST_MASK 0x80
368 #define FXLS8471_ST_SHIFT 7
369 #define FXLS8471_RST_MASK 0x40
370 #define FXLS8471_RST_SHIFT 6
371 #define FXLS8471_SMODS_MASK 0x18
372 #define FXLS8471_SMODS_SHIFT 3
373 #define FXLS8471_SLPE_MASK 0x04
374 #define FXLS8471_SLPE_SHIFT 2
375 #define FXLS8471_MODS_MASK 0x03
376 #define FXLS8471_MODS_SHIFT 0
377
378 /*
379 ** CTRL_REG3 Interrupt Control Register
380 */
381 #define FXLS8471_FIFO_GATE_MASK 0x80
382 #define FXLS8471_FIFO_GATE_SHIFT 7
383 #define FXLS8471_WAKE_TRANS_MASK 0x40
384 #define FXLS8471_WAKE_TRANS_SHIFT 6
385 #define FXLS8471_WAKE_LNDPRT_MASK 0x20
386 #define FXLS8471_WAKE_LNDPRT_SHIFT 5
387 #define FXLS8471_WAKE_PULSE_MASK 0x10
388 #define FXLS8471_WAKE_PULSE_SHIFT 4
389 #define FXLS8471_WAKE_FFMT_MASK 0x08
390 #define FXLS8471_WAKE_FFMT_SHIFT 3
391 #define FXLS8471_WAKE_A_VECM_MASK 0x04
392 #define FXLS8471_WAKE_A_VECM_SHIFT 2
393 #define FXLS8471_IPOL_MASK 0x02
394 #define FXLS8471_IPOL_SHIFT 1
395 #define FXLS8471_PP_OD_MASK 0x01
396 #define FXLS8471_PP_OD_SHIFT 0
397 /*
398 ** CTRL_REG4 Interrupt Enable Register
399 */
400 #define FXLS8471_INT_EN_ASLP_MASK 0x80
401 #define FXLS8471_INT_EN_ASLP_SHIFT 7
402 #define FXLS8471_INT_EN_FIFO_MASK 0x40
403 #define FXLS8471_INT_EN_FIFO_SHIFT 6
404 #define FXLS8471_INT_EN_TRANS_MASK 0x20
405 #define FXLS8471_INT_EN_TRANS_SHIFT 5
406 #define FXLS8471_INT_EN_LNDPRT_MASK 0x10
407 #define FXLS8471_INT_EN_LNDPRT_SHIFT 4
408 #define FXLS8471_INT_EN_PULSE_MASK 0x08
409 #define FXLS8471_INT_EN_PULSE_SHIFT 3
410 #define FXLS8471_INT_EN_FFMT_MASK 0x04
411 #define FXLS8471_INT_EN_FFMT_SHIFT 2
412 #define FXLS8471_INT_EN_A_VECM_MASK 0x02
413 #define FXLS8471_INT_EN_A_VECM_SHIFT 1
414 #define FXLS8471_INT_EN_DRDY_MASK 0x01
415 #define FXLS8471_INT_EN_DRDY_SHIFT 0
416
417 /*
418 ** CTRL_REG5 Interrupt Configuration Register
419 */
420 #define FXLS8471_INT_CFG_ASLP_MASK 0x80
421 #define FXLS8471_INT_CFG_ASLP_SHIFT 7
422 #define FXLS8471_INT_CFG_FIFO_MASK 0x40
423 #define FXLS8471_INT_CFG_FIFO_SHIFT 6
424 #define FXLS8471_INT_CFG_TRANS_MASK 0x20
425 #define FXLS8471_INT_CFG_TRANS_SHIFT 5
426 #define FXLS8471_INT_CFG_LNDPRT_MASK 0x10
427 #define FXLS8471_INT_CFG_LNDPRT_SHIFT 4
428 #define FXLS8471_INT_CFG_PULSE_MASK 0x08
429 #define FXLS8471_INT_CFG_PULSE_SHIFT 3
430 #define FXLS8471_INT_CFG_FFMT_MASK 0x04
431 #define FXLS8471_INT_CFG_FFMT_SHIFT 2
432 #define FXLS8471_INT_CFG_A_VECM_MASK 0x02
433 #define FXLS8471_INT_CFG_A_VECM_SHIFT 1
434 #define FXLS8471_INT_CFG_DRDY_MASK 0x01
435 #define FXLS8471_INT_CFG_DRDY_SHIFT 0
436
437 /*
438 ** A_VECM_CFG Vector Magnitude Configuration Register
439 */
440 #define FXLS8471_A_VECM_ELE_MASK 0x40
441 #define FXLS8471_A_VECM_ELE_SHIFT 6
442 #define FXLS8471_A_VECM_INITM_MASK 0x20
443 #define FXLS8471_A_VECM_INITM_SHIFT 5
444 #define FXLS8471_A_VECM_UPDM_MASK 0x10
445 #define FXLS8471_A_VECM_UPDM_SHIFT 4
446 #define FXLS8471_A_VECM_EN_MASK 0x08
447 #define FXLS8471_A_VECM_EN_SHIFT 3
448
449 /*
450 * A_VECM_THS_MSB Vector Magnitude Threshold (MSB) Register
451 */
452 #define FXLS8471_A_VECM_DBCNTM_MASK 0x80
453 #define FXLS8471_A_VECM_DBCNTM_SHIFT 7
454 #define FXLS8471_A_VECM_THS_MSB_MASK 0x18
455 #define FXLS8471_A_VECM_THS_MSB_SHIFT 0
456
457
458 /*
459 * Public Types
460 */
461
462
463 // Define the MMA865X functional interface status return type.
464 enum
465 {
466 FXLS8471_SUCCESS,
467 FXLS8471_DATA_OVERWRITE,
468 FXLS8471_ERROR
469 };
470
471 typedef struct
472 {
473 uint8 regAddr;
474 uint8 regValue;
475 } fxls8471_Sensor_Specific_Reg_t;
476
477 typedef struct
478 {
479 uint8 accelFullScaleRange;
480 uint32 regCount;
481 fxls8471_Sensor_Specific_Reg_t regPairs[];
482 } fxls8471_Sensor_Specific_Settings_t;
483
484 #endif /* FXLS8471_H_ */
FXLS8471_A_VECM_CFG
Definition: fxls8471.h:68
FXLS8471_SYSMOD
Definition: fxls8471.h:31
uint8
unsigned char uint8
This defines uint8 as unsigned char.
Definition: isf_types.h:18
FXLS8471_PULSE_SRC
Definition: fxls8471.h:51
FXLS8471_TRANSIENT_COUNT
Definition: fxls8471.h:49
fxls8471_Sensor_Specific_Reg_t::regAddr
uint8 regAddr
Definition: fxls8471.h:473
FXLS8471_A_VECM_THS_MSB
Definition: fxls8471.h:69
FXLS8471_OUT_X_LSB
Definition: fxls8471.h:23
FXLS8471_A_FFMT_THS_Y_LSB
Definition: fxls8471.h:82
FXLS8471_A_VECM_INITX_LSB
Definition: fxls8471.h:73
FXLS8471_A_VECM_INITY_LSB
Definition: fxls8471.h:75
FXLS8471_A_VECM_INITY_MSB
Definition: fxls8471.h:74
FXLS8471_TRANSIENT_SRC
Definition: fxls8471.h:47
FXLS8471_SUCCESS
Definition: fxls8471.h:466
FXLS8471_A_VECM_THS_LSB
Definition: fxls8471.h:70
fxls8471_Sensor_Specific_Settings_t
Definition: fxls8471.h:477
FXLS8471_TRANSIENT_THS
Definition: fxls8471.h:48
FXLS8471_OUT_Z_MSB
Definition: fxls8471.h:26
FXLS8471_CTRL_REG2
Definition: fxls8471.h:60
FXLS8471_PULSE_TMLT
Definition: fxls8471.h:55
FXLS8471_OUT_Z_LSB
Definition: fxls8471.h:27
FXLS8471_A_FFMT_THS_Z_LSB
Definition: fxls8471.h:84
FXLS8471_A_FFMT_THS_Y_MSB
Definition: fxls8471.h:81
FXLS8471_A_VECM_INITX_MSB
Definition: fxls8471.h:72
uint32
unsigned long uint32
This defines uint32 as unsigned long.
Definition: isf_types.h:36
FXLS8471_PL_BF_ZCOMP
Definition: fxls8471.h:39
FXLS8471_A_VECM_INITZ_MSB
Definition: fxls8471.h:76
FXLS8471_OUT_Y_lSB
Definition: fxls8471.h:25
FXLS8471_PULSE_THSY
Definition: fxls8471.h:53
FXLS8471_OUT_X_MSB
Definition: fxls8471.h:22
FXLS8471_OUT_Y_MSB
Definition: fxls8471.h:24
FXLS8471_XYZ_DATA_CFG
Definition: fxls8471.h:34
FXLS8471_OFF_X
Definition: fxls8471.h:64
FXLS8471_CTRL_REG4
Definition: fxls8471.h:62
FXLS8471_A_FFMT_THS_X_MSB
Definition: fxls8471.h:79
FXLS8471_DATA_OVERWRITE
Definition: fxls8471.h:467
FXLS8471_A_FFMT_THS_X_LSB
Definition: fxls8471.h:80
FXLS8471_PULSE_LTCY
Definition: fxls8471.h:56
fxls8471_Sensor_Specific_Reg_t::regValue
uint8 regValue
Definition: fxls8471.h:474
FXLS8471_HP_FILTER_CUTOFF
Definition: fxls8471.h:35
FXLS8471_PL_CFG
Definition: fxls8471.h:37
FXLS8471_TRIG_CFG
Definition: fxls8471.h:30
FXLS8471_ERROR
Definition: fxls8471.h:468
FXLS8471_OFF_Y
Definition: fxls8471.h:65
FXLS8471_A_VECM_INITZ_LSB
Definition: fxls8471.h:77
FXLS8471_CTRL_REG5
Definition: fxls8471.h:63
FXLS8471_PULSE_CFG
Definition: fxls8471.h:50
FXLS8471_INT_SOURCE
Definition: fxls8471.h:32
FXLS8471_FFMT_THS
Definition: fxls8471.h:43
FXLS8471_PL_STATUS
Definition: fxls8471.h:36
FXLS8471_PL_THS
Definition: fxls8471.h:40
FXLS8471_F_SETUP
Definition: fxls8471.h:29
FXLS8471_PULSE_THSZ
Definition: fxls8471.h:54
FXLS8471_PULSE_THSX
Definition: fxls8471.h:52
FXLS8471_A_FFMT_THS_Z_MSB
Definition: fxls8471.h:83
FXLS8471_PULSE_WIND
Definition: fxls8471.h:57
fxls8471_Sensor_Specific_Settings_t::regCount
uint32 regCount
Definition: fxls8471.h:480
fxls8471_Sensor_Specific_Settings_t::accelFullScaleRange
uint8 accelFullScaleRange
Definition: fxls8471.h:479
FXLS8471_A_VECM_CNT
Definition: fxls8471.h:71
FXLS8471_TRANSIENT_CFG
Definition: fxls8471.h:46
FXLS8471_PL_COUNT
Definition: fxls8471.h:38
FXLS8471_STATUS
Definition: fxls8471.h:21
FXLS8471_FFMT_SRC
Definition: fxls8471.h:42
FXLS8471_CTRL_REG1
Definition: fxls8471.h:59
FXLS8471_WHO_AM_I
Definition: fxls8471.h:33
FXLS8471_CTRL_REG3
Definition: fxls8471.h:61
fxls8471_Sensor_Specific_Reg_t
Definition: fxls8471.h:471
FXLS8471_OFF_Z
Definition: fxls8471.h:66
FXLS8471_FFMT_COUNT
Definition: fxls8471.h:44
FXLS8471_ASLP_COUNT
Definition: fxls8471.h:58
FXLS8471_FFMT_CFG
Definition: fxls8471.h:41
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