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fxos8700.h
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1 /*!
2 ********************************************************************************
3 * File: fxos8700.h
4 *
5 * Copyright (c) 2013, Freescale Semiconductor, Inc.
6 *
7 *******************************************************************************/
8 /*!
9 * @file fxos8700.h
10 * @brief The \b fxos8700.h file describes the FXOS8700 register definition and its bit mask.
11 */
12 #ifndef FXOS8700_H_
13 #define FXOS8700_H_
14 /**
15 * @brief FXOS8700 internal register addresses explained in the FXOS8700 data sheet.
16 */
17 enum fxos8700_regmap_tag {
18 FXOS8700_STATUS = 0x00, /*!< Alias for ::FXOS8700_DR_STATUS or ::FXOS8700_F_STATUS. */
19 FXOS8700_OUT_X_MSB = 0x01, /*!< 14-bit X-axis measurement data bits 13:6. */
20 FXOS8700_OUT_X_LSB = 0x02, /*!< 14-bit X-axis measurement data bits 5:0. */
21 FXOS8700_OUT_Y_MSB = 0x03, /*!< 14-bit Y-axis measurement data bits 13:6. */
22 FXOS8700_OUT_Y_LSB = 0x04, /*!< 14-bit Y-axis measurement data bits 5:0. */
23 FXOS8700_OUT_Z_MSB = 0x05, /*!< 14-bit Z-axis measurement data bits 13:6. */
24 FXOS8700_OUT_Z_LSB = 0x06, /*!< 14-bit Z-axis measurement data bits 5:0. */
25 FXOS8700_F_SETUP = 0x09, /*!< FIFO setup. */
26 FXOS8700_TRIG_CFG = 0x0A, /*!< FIFO event trigger configuration register. */
27 FXOS8700_SYSMOD = 0x0B, /*!< Current system mode. */
28 FXOS8700_INT_SOURCE = 0x0C, /*!< Interrupt status. */
29 FXOS8700_WHO_AM_I = 0x0D, /*!< Device ID. */
30 FXOS8700_XYZ_DATA_CFG = 0x0E, /*!< Acceleration dynamic range and filter enable settings. */
31 FXOS8700_HP_FILTER_CUTOFF = 0x0F, /*!< Pulse detection highpass and lowpass filter enabling bits. */
32 FXOS8700_PL_STATUS = 0x10, /*!< Landscape/portrait orientation status. */
33 FXOS8700_PL_CFG = 0x11, /*!< Landscape/portrait configuration. */
34 FXOS8700_PL_COUNT = 0x12, /*!< Landscape/portrait debounce counter. */
35 FXOS8700_PL_BF_ZCOMP = 0x13, /*!< Back/front trip angle threshold. */
36 FXOS8700_PL_THS_REG = 0x14, /*!< Portrait to landscape trip threshold angle and hysteresis settings. */
37 FXOS8700_FF_MT_CFG = 0x15, /*!< Freefall/motion function configuration. */
38 FXOS8700_FF_MT_SRC = 0x16, /*!< Freefall/motion event source register. */
39 FXOS8700_FF_MT_THS = 0x17, /*!< Freefall/motion threshold register. */
40 FXOS8700_FF_MT_COUNT = 0x18, /*!< Freefall/motion debounce counter. */
41 FXOS8700_TRANSIENT_CFG = 0x1D, /*!< Transient function configuration. */
42 FXOS8700_TRANSIENT_SRC = 0x1E, /*!< Transient event status register. */
43 FXOS8700_TRANSIENT_THS = 0x1F, /*!< Transient event threshold. */
44 FXOS8700_TRANSIENT_COUNT = 0x20, /*!< Transient debounce counter. */
45 FXOS8700_PULSE_CFG = 0x21, /*!< Pulse function configuration. */
46 FXOS8700_PULSE_SRC = 0x22, /*!< Pulse function source register. */
47 FXOS8700_PULSE_THSX = 0x23, /*!< X-axis pulse threshold. */
48 FXOS8700_PULSE_THSY = 0x24, /*!< Y-axis pulse threshold. */
49 FXOS8700_PULSE_THSZ = 0x25, /*!< Z-axis pulse threshold. */
50 FXOS8700_TMLT = 0x26, /*!< Time limit for pulse detection. */
51 FXOS8700_PULSE_LTCY = 0x27, /*!< Latency time for second pulse detection. */
52 FXOS8700_PULSE_WIND = 0x28, /*!< Window time for second pulse detection. */
53 FXOS8700_ASLP_COUNT = 0x29, /*!< The counter setting for auto-sleep period. */
54 FXOS8700_CTRL_REG1 = 0x2A, /*!< System ODR, accelerometer OSR (Output sample rate), operating mode. */
55 FXOS8700_CTRL_REG2 = 0x2B, /*!< Self-test, reset, accelerometer OSR, and sleep mode settings. */
56 FXOS8700_CTRL_REG3 = 0x2C, /*!< Sleep mode interrupt wake enable, interrupt polarity, push-pull/open drain configuration. */
57 FXOS8700_CTRL_REG4 = 0x2D, /*!< Interrupt enable register. */
58 FXOS8700_CTRL_REG5 = 0x2E, /*!< Interrupt pin (INT1/INT2) map. */
59 FXOS8700_OFF_X = 0x2F, /*!< X-axis accelerometer offset adjust. */
60 FXOS8700_OFF_Y = 0x30, /*!< Y-axis accelerometer offset adjust. */
61 FXOS8700_OFF_Z = 0x31, /*!< Z-axis accelerometer offset adjust. */
62 FXOS8700_M_DR_STATUS = 0x32, /*!< The magnetometer data ready status. */
63 FXOS8700_M_OUT_X_MSB = 0x33, /*!< MSB of the 16-bit magnetometer data for X-axis. */
64 FXOS8700_M_OUT_X_LSB = 0x34, /*!< LSB of the 16-bit magnetometer data for X-axis. */
65 FXOS8700_M_OUT_Y_MSB = 0x35, /*!< MSB of the 16-bit magnetometer data for Y-axis. */
66 FXOS8700_M_OUT_Y_LSB = 0x36, /*!< LSB of the 16-bit magnetometer data for Y-axis. */
67 FXOS8700_M_OUT_Z_MSB = 0x37, /*!< MSB of the 16-bit magnetometer data for Z-axis. */
68 FXOS8700_M_OUT_Z_LSB = 0x38, /*!< LSB of the 16-bit magnetometer data for Z-axis. */
69 FXOS8700_CMP_X_MSB = 0x39, /*!< Bits [13:8] of integrated X-axis acceleration data. */
70 FXOS8700_CMP_X_LSB = 0x3A, /*!< Bits [7:0] of integrated X-axis acceleration data. */
71 FXOS8700_CMP_Y_MSB = 0x3B, /*!< Bits [13:8] of integrated Y-axis acceleration data. */
72 FXOS8700_CMP_Y_LSB = 0x3C, /*!< Bits [7:0] of integrated Y-axis acceleration data. */
73 FXOS8700_CMP_Z_MSB = 0x3D, /*!< Bits [13:8] of integrated Z-axis acceleration data. */
74 FXOS8700_CMP_Z_LSB = 0x3E, /*!< Bits [7:0] of integrated Z-axis acceleration data. */
75 FXOS8700_M_OFF_X_MSB = 0x3F, /*!< MSB of magnetometer X-axis offset. */
76 FXOS8700_M_OFF_X_LSB = 0x40, /*!< LSB of magnetometer X-axis offset. */
77 FXOS8700_M_OFF_Y_MSB = 0x41, /*!< MSB of magnetometer Y-axis offset. */
78 FXOS8700_M_OFF_Y_LSB = 0x42, /*!< LSB of magnetometer Y-axis offset. */
79 FXOS8700_M_OFF_Z_MSB = 0x43, /*!< MSB of magnetometer Z-axis offset. */
80 FXOS8700_M_OFF_Z_LSB = 0x44, /*!< LSB of magnetometer Z-axis offset. */
81 FXOS8700_MAX_X_MSB = 0x45, /*!< Magnetometer X-axis maximum value MSB. */
82 FXOS8700_MAX_X_LSB = 0x46, /*!< Magnetometer X-axis maximum value LSB. */
83 FXOS8700_MAX_Y_MSB = 0x47, /*!< Magnetometer Y-axis maximum value MSB. */
84 FXOS8700_MAX_Y_LSB = 0x48, /*!< Magnetometer Y-axis maximum value LSB. */
85 FXOS8700_MAX_Z_MSB = 0x49, /*!< Magnetometer Z-axis maximum value MSB. */
86 FXOS8700_MAX_Z_LSB = 0x4A, /*!< Magnetometer Z-axis maximum value LSB. */
87 FXOS8700_MIN_X_MSB = 0x4B, /*!< Magnetometer X-axis minimum value MSB. */
88 FXOS8700_MIN_X_LSB = 0x4C, /*!< Magnetometer X-axis minimum value LSB. */
89 FXOS8700_MIN_Y_MSB = 0x4D, /*!< Magnetometer Y-axis minimum value MSB. */
90 FXOS8700_MIN_Y_LSB = 0x4E, /*!< Magnetometer Y-axis minimum value LSB. */
91 FXOS8700_MIN_Z_MSB = 0x4F, /*!< Magnetometer Z-axis minimum value MSB. */
92 FXOS8700_MIN_Z_LSB = 0x50, /*!< Magnetometer Z-axis minimum value LSB. */
93 FXOS8700_TEMP = 0x51, /*!< Device temperature with a valid range of -128 to 127 degrees C. */
94 FXOS8700_M_THS_CFG = 0x52, /*!< Magnetic threshold detection function configuration. */
95 FXOS8700_M_THS_SRC = 0x53, /*!< Magnetic threshold event source register. */
96 FXOS8700_M_THS_X_MSB = 0x54, /*!< X-axis magnetic threshold MSB. */
97 FXOS8700_M_THS_X_LSB = 0x55, /*!< X-axis magnetic threshold LSB. */
98 FXOS8700_M_THS_Y_MSB = 0x56, /*!< Y-axis magnetic threshold MSB. */
99 FXOS8700_M_THS_Y_LSB = 0x57, /*!< Y-axis magnetic threshold LSB. */
100 FXOS8700_M_THS_Z_MSB = 0x58, /*!< Z-axis magnetic threshold MSB. */
101 FXOS8700_M_THS_Z_LSB = 0x59, /*!< Z-axis magnetic threshold LSB. */
102 FXOS8700_M_THS_COUNT = 0x5A, /*!< Magnetic threshold debounce counter. */
103 FXOS8700_M_CTRL_REG1 = 0x5B, /*!< Control for magnetometer sensor functions. */
104 FXOS8700_M_CTRL_REG2 = 0x5C, /*!< Control for magnetometer sensor functions. */
105 FXOS8700_M_CTRL_REG3 = 0x5D, /*!< Control for magnetometer sensor functions. */
106 FXOS8700_M_INT_SRC = 0x5E, /*!< Magnetometer interrupt source. */
107 FXOS8700_A_VECM_CFG = 0x5F, /*!< Acceleration vector magnitude configuration register. */
108 FXOS8700_A_VECM_THS_MSB = 0x60, /*!< Acceleration vector magnitude threshold MSB. */
109 FXOS8700_A_VECM_THS_LSB = 0x61, /*!< Acceleration vector magnitude threshold LSB. */
110 FXOS8700_A_VECM_CNT = 0x62, /*!< Acceleration vector magnitude debounce count. */
111 FXOS8700_A_VECM_INITX_MSB = 0x63, /*!< Acceleration vector magnitude X-axis reference value MSB. */
112 FXOS8700_A_VECM_INITX_LSB = 0x64, /*!< Acceleration vector magnitude X-axis reference value LSB. */
113 FXOS8700_A_VECM_INITY_MSB = 0x65, /*!< Acceleration vector magnitude Y-axis reference value MSB. */
114 FXOS8700_A_VECM_INITY_LSB = 0x66, /*!< Acceleration vector magnitude Y-axis reference value LSB. */
115 FXOS8700_A_VECM_INITZ_MSB = 0x67, /*!< Acceleration vector magnitude Z-axis reference value MSB. */
116 FXOS8700_A_VECM_INITZ_LSB = 0x68, /*!< Acceleration vector magnitude Z-axis reference value LSB. */
117 FXOS8700_M_VECM_CFG = 0x69, /*!< Magnetic vector magnitude configuration register. */
118 FXOS8700_M_VECM_THS_MSB = 0x6A, /*!< Magnetic vector magnitude threshold MSB. */
119 FXOS8700_M_VECM_THS_LSB = 0x6B, /*!< Magnetic vector magnitude threshold LSB. */
120 FXOS8700_M_VECM_CNT = 0x6C, /*!< Magnetic vector magnitude debounce count. */
121 FXOS8700_M_VECM_INITX_MSB = 0x6D, /*!< Magnetic vector magnitude X-axis reference value MSB. */
122 FXOS8700_M_VECM_INITX_LSB = 0x6E, /*!< Magnetic vector magnitude X-axis reference value LSB. */
123 FXOS8700_M_VECM_INITY_MSB = 0x6F, /*!< Magnetic vector magnitude Y-axis reference value MSB. */
124 FXOS8700_M_VECM_INITY_LSB = 0x70, /*!< Magnetic vector magnitude Y-axis reference value LSB. */
125 FXOS8700_M_VECM_INITZ_MSB = 0x71, /*!< Magnetic vector magnitude Z-axis reference value MSB. */
126 FXOS8700_M_VECM_INITZ_LSB = 0x72, /*!< Magnetic vector magnitude Z-axis reference value LSB. */
127 FXOS8700_A_FFMT_THS_X_MSB = 0x73, /*!< X-axis FFMT threshold MSB. */
128 FXOS8700_A_FFMT_THS_X_LSB = 0x74, /*!< X-axis FFMT threshold LSB. */
129 FXOS8700_A_FFMT_THS_Y_MSB = 0x75, /*!< Y-axis FFMT threshold MSB. */
130 FXOS8700_A_FFMT_THS_Y_LSB = 0x76, /*!< Y-axis FFMT threshold LSB. */
131 FXOS8700_A_FFMT_THS_Z_MSB = 0x77, /*!< Z-axis FFMT threshold MSB. */
132 FXOS8700_A_FFMT_THS_Z_LSB = 0x78, /*!< Z-axis FFMT threshold LSB. */
133 };
134
135 #define FXOS8700_DR_STATUS 0x00
136 #define FXOS8700_F_STATUS 0x00
137
138 /*
139 * General purpose macros to set/get a specific bit field within a register.
140 * The macro assumes that the root identifier for the field is a consistent character string (e.g., "BIT_FIELD").
141 * The bit field mask is the character string followed by "_MASK" (e.g., BIT_FIELD_MASK).
142 * The bit field shift is the character string followed by "_SHIFT" (e.g., BIT_FIELD_SHIFT).
143 */
144 #define FXOS8700_SET_FIELD(name,val) (((val)<<FXOS8700_##name##_SHIFT)&(FXOS8700_##name##_MASK))
145 #define FXOS8700_GET_FIELD(name,val) ((val&FXOS8700_##name##_MASK)>>FXOS8700_##name##_SHIFT)
146
147 /**
148 * The following are the macro definitions to address each bit and its value in the hardware registers.
149 */
150 // DR_STATUS
151 #define FXOS8700_ZYXDR_MASK 0x08
152 #define FXOS8700_ZYXDR_SHIFT 3
153
154 // XYZ_DATA_CFG
155 #define FXOS8700_HPF_OUT_MASK 0x10
156 #define FXOS8700_HPF_OUT_SHIFT 4
157 #define FXOS8700_FS_MASK 0x03
158 #define FXOS8700_FS_SHIFT 0
159
160 // HP_FILTER_CUTOFF
161 #define FXOS8700_PULSE_HPF_BYP_MASK 0x20
162 #define FXOS8700_PULSE_HPF_BYP_SHIFT 5
163 #define FXOS8700_PULSE_LPF_EN_MASK 0x10
164 #define FXOS8700_PULSE_LPF_EN_SHIFT 4
165 #define FXOS8700_SEL_MASK 0x03
166 #define FXOS8700_SEL_SHIFT 0
167
168 // PL_STATUS
169 #define FXOS8700_NEWLP_MASK 0x80
170 #define FXOS8700_NEWLP_SHIFT 7
171 #define FXOS8700_LO_MASK 0x40
172 #define FXOS8700_LO_SHIFT 6
173 #define FXOS8700_LAPO_MASK 0x06
174 #define FXOS8700_LAPO_SHIFT 1
175 #define FXOS8700_BAFRO_MASK 0x01
176 #define FXOS8700_BAFRO_SHIFT 0
177
178 // PL_CFG
179 #define FXOS8700_DBCNTM_MASK 0x80
180 #define FXOS8700_DBCNTM_SHIFT 7
181 #define FXOS8700_PL_EN_MASK 0x40
182 #define FXOS8700_PL_EN_SHIFT 6
183
184 // PL_BF_ZCOMP
185 #define FXOS8700_BKFR_MASK 0xC0
186 #define FXOS8700_BKFR_SHIFT 6
187 #define FXOS8700_ZLOCK_MASK 0x03
188 #define FXOS8700_ZLOCK_SHIFT 0
189
190 // PL_THS_REG
191 #define FXOS8700_PL_THS_MASK 0xF8
192 #define FXOS8700_PL_THS_SHIFT 3
193 #define FXOS8700_HYS_MASK 0x07
194 #define FXOS8700_HYS_SHIFT 0
195
196 // FF_MT_CFG
197 #define FXOS8700_ELE_MASK 0x80
198 #define FXOS8700_ELE_SHIFT 7
199 #define FXOS8700_OAE_MASK 0x40
200 #define FXOS8700_OAE_SHIFT 6
201 #define FXOS8700_ZEFE_MASK 0x20
202 #define FXOS8700_ZEFE_SHIFT 5
203 #define FXOS8700_YEFE_MASK 0x10
204 #define FXOS8700_YEFE_SHIFT 4
205 #define FXOS8700_XEFE_MASK 0x08
206 #define FXOS8700_XEFE_SHIFT 3
207
208 // FF_MT_SRC
209 #define FXOS8700_EA_MASK 0x80
210 #define FXOS8700_ZHE_MASK 0x20
211 #define FXOS8700_ZHP_MASK 0x10
212 #define FXOS8700_YHE_MASK 0x08
213 #define FXOS8700_YHP_MASK 0x04
214 #define FXOS8700_XHE_MASK 0x02
215 #define FXOS8700_XHP_MASK 0x01
216
217 // FF_MT_THS
218 #define FXOS8700_DBCNTM_MASK 0x80
219 #define FXOS8700_DBCNTM_SHIFT 7
220 #define FXOS8700_THS_MASK 0x7F
221 #define FXOS8700_THS_SHIFT 0
222
223 // TRANSIENT_CFG
224 #define FXOS8700_TELE_MASK 0x10
225 #define FXOS8700_TELE_SHIFT 4
226 #define FXOS8700_ZTEFE_MASK 0x08
227 #define FXOS8700_ZTEFE_SHIFT 3
228 #define FXOS8700_YTEFE_MASK 0x04
229 #define FXOS8700_YTEFE_SHIFT 2
230 #define FXOS8700_XTEFE_MASK 0x02
231 #define FXOS8700_XTEFE_SHIFT 1
232 #define FXOS8700_HPF_BYP_MASK 0x01
233 #define FXOS8700_HPF_BYP_SHIFT 0
234
235 // TRANSIENT_SRC
236 #define FXOS8700_TEA_MASK 0x40
237 #define FXOS8700_ZTRANSE_MASK 0x20
238 #define FXOS8700_Z_TRANS_POL_MASK 0x10
239 #define FXOS8700_YTRANSE_MASK 0x08
240 #define FXOS8700_Y_TRANS_POL_MASK 0x04
241 #define FXOS8700_XTRANSE_MASK 0x02
242 #define FXOS8700_X_TRANS_POL_MASK 0x01
243
244 // PULSE_CFG
245 #define FXOS8700_DPA_MASK 0x80
246 #define FXOS8700_DPA_SHIFT 7
247 #define FXOS8700_PELE_MASK 0x40
248 #define FXOS8700_PELE_SHIFT 6
249 #define FXOS8700_ZDPEFE_MASK 0x20
250 #define FXOS8700_ZDPEFE_SHIFT 5
251 #define FXOS8700_ZSPEFE_MASK 0x10
252 #define FXOS8700_ZSPEFE_SHIFT 4
253 #define FXOS8700_YDPEFE_MASK 0x08
254 #define FXOS8700_YDPEFE_SHIFT 3
255 #define FXOS8700_YSPEFE_MASK 0x04
256 #define FXOS8700_YSPEFE_SHIFT 2
257 #define FXOS8700_XDPEFE_MASK 0x02
258 #define FXOS8700_XDPEFE_SHIFT 1
259 #define FXOS8700_XSPEFE_MASK 0x01
260 #define FXOS8700_XSPEFE_SHIFT 0
261
262 // PULSE_SRC
263 #define FXOS8700_PEA_MASK 0x80
264 #define FXOS8700_AXZ_MASK 0x40
265 #define FXOS8700_AXY_MASK 0x20
266 #define FXOS8700_AXX_MASK 0x10
267 #define FXOS8700_DPE_MASK 0x08
268 #define FXOS8700_POLZ_MASK 0x04
269 #define FXOS8700_POLY_MASK 0x02
270 #define FXOS8700_POLX_MASK 0x01
271
272 // CTRL_REG1
273 #define FXOS8700_ASLP_RATE_MASK 0xC0
274 #define FXOS8700_ASLP_RATE_SHIFT 6
275 #define FXOS8700_DR_MASK 0x38
276 #define FXOS8700_DR_SHIFT 3
277 #define FXOS8700_LNOISE_MASK 0x04
278 #define FXOS8700_LNOISE_SHIFT 2
279 #define FXOS8700_F_READ_MASK 0x02
280 #define FXOS8700_F_READ_SHIFT 1
281 #define FXOS8700_ACTIVE_MASK 0x01
282 #define FXOS8700_ACTIVE_SHIFT 0
283
284 // CTRL_REG2
285 #define FXOS8700_RST_MASK 0x40
286 #define FXOS8700_RST_SHIFT 6
287 #define FXOS8700_SMODS_MASK 0x18
288 #define FXOS8700_SMODS_SHIFT 3
289 #define FXOS8700_SLPE_MASK 0x04
290 #define FXOS8700_SLPE_SHIFT 2
291 #define FXOS8700_MODS_MASK 0x03
292 #define FXOS8700_MODS_SHIFT 0
293
294 // CTRL_REG3
295 #define FXOS8700_FIFO_GATE_MASK 0x80
296 #define FXOS8700_FIFO_GATE_SHIFT 7
297 #define FXOS8700_WAKE_TRANS_MASK 0x40
298 #define FXOS8700_WAKE_TRANS_SHIFT 6
299 #define FXOS8700_WAKE_LNDPRT_MASK 0x20
300 #define FXOS8700_WAKE_LNDPRT_SHIFT 5
301 #define FXOS8700_WAKE_PULSE_MASK 0x10
302 #define FXOS8700_WAKE_PULSE_SHIFT 4
303 #define FXOS8700_WAKE_FF_MT_MASK 0x08
304 #define FXOS8700_WAKE_FF_MT_SHIFT 3
305 #define FXOS8700_IPOL_MASK 0x02
306 #define FXOS8700_IPOL_SHIFT 1
307 #define FXOS8700_PP_OD_MASK 0x01
308 #define FXOS8700_PP_OD_SHIFT 0
309
310 // CTRL_REG4
311 #define FXOS8700_INT_EN_ASLP_MASK 0x80
312 #define FXOS8700_INT_EN_ASLP_SHIFT 7
313 #define FXOS8700_INT_EN_FIFO_MASK 0x40
314 #define FXOS8700_INT_EN_FIFO_SHIFT 6
315 #define FXOS8700_INT_EN_TRANS_MASK 0x20
316 #define FXOS8700_INT_EN_TRANS_SHIFT 5
317 #define FXOS8700_INT_EN_LNDPRT_MASK 0x10
318 #define FXOS8700_INT_EN_LNDPRT_SHIFT 4
319 #define FXOS8700_INT_EN_PULSE_MASK 0x08
320 #define FXOS8700_INT_EN_PULSE_SHIFT 3
321 #define FXOS8700_INT_EN_FF_MT_MASK 0x04
322 #define FXOS8700_INT_EN_FF_MT_SHIFT 2
323 #define FXOS8700_INT_EN_DRDY_MASK 0x01
324 #define FXOS8700_INT_EN_DRDY_SHIFT 1
325
326 // CTRL_REG5
327 #define FXOS8700_INT_CFG_ASLP_MASK 0x80
328 #define FXOS8700_INT_CFG_ASLP_SHIFT 7
329 #define FXOS8700_INT_CFG_FIFO_MASK 0x40
330 #define FXOS8700_INT_CFG_FIFO_SHIFT 6
331 #define FXOS8700_INT_CFG_TRANS_MASK 0x20
332 #define FXOS8700_INT_CFG_TRANS_SHIFT 5
333 #define FXOS8700_INT_CFG_LNDPRT_MASK 0x10
334 #define FXOS8700_INT_CFG_LNDPRT_SHIFT 4
335 #define FXOS8700_INT_CFG_PULSE_MASK 0x08
336 #define FXOS8700_INT_CFG_PULSE_SHIFT 3
337 #define FXOS8700_INT_CFG_FF_MT_MASK 0x04
338 #define FXOS8700_INT_CFG_FF_MT_SHIFT 2
339 #define FXOS8700_INT_CFG_VECM_MASK 0x02
340 #define FXOS8700_INT_CFG_VECM_SHIFT 1
341 #define FXOS8700_INT_CFG_DRDY_MASK 0x01
342 #define FXOS8700_INT_CFG_DRDY_SHIFT 0
343
344 // M_DR_STATUS
345 #define FXOS8700_ZYXOW_MASK 0x80
346 #define FXOS8700_ZOW_MASK 0x40
347 #define FXOS8700_YOW_MASK 0x20
348 #define FXOS8700_XOW_MASK 0x10
349 #define FXOS8700_ZYXDR_MASK 0x08
350 #define FXOS8700_ZDR_MASK 0x04
351 #define FXOS8700_YDR_MASK 0x02
352 #define FXOS8700_XDR_MASK 0x01
353
354 // M_THS_CFG
355 #define FXOS8700_M_THS_ELE_MASK 0x80
356 #define FXOS8700_M_THS_ELE_SHIFT 7
357 #define FXOS8700_M_THS_OAE_MASK 0x40
358 #define FXOS8700_M_THS_OAE_SHIFT 6
359 #define FXOS8700_M_THS_ZEFE_MASK 0x20
360 #define FXOS8700_M_THS_ZEFE_SHIFT 5
361 #define FXOS8700_M_THS_YEFE_MASK 0x10
362 #define FXOS8700_M_THS_YEFE_SHIFT 4
363 #define FXOS8700_M_THS_XEFE_MASK 0x08
364 #define FXOS8700_M_THS_XEFE_SHIFT 3
365 #define FXOS8700_M_THS_WAKE_EN_MASK 0x04
366 #define FXOS8700_M_THS_WAKE_EN_SHIFT 2
367 #define FXOS8700_M_THS_INT_EN_MASK 0x02
368 #define FXOS8700_M_THS_INT_EN_SHIFT 1
369 #define FXOS8700_M_THS_INT_CFG_MASK 0x01
370 #define FXOS8700_M_THS_INT_CFG_SHIFT 0
371
372 // M_THS_SRC
373 #define FXOS8700_M_THS_EA_MASK 0x80
374 #define FXOS8700_M_THS_EA_SHIFT 7
375 #define FXOS8700_M_THS_ZHE_MASK 0x20
376 #define FXOS8700_M_THS_ZHE_SHIFT 5
377 #define FXOS8700_M_THS_ZHP_MASK 0x10
378 #define FXOS8700_M_THS_ZHP_SHIFT 4
379 #define FXOS8700_M_THS_YHE_MASK 0x08
380 #define FXOS8700_M_THS_YHE_SHIFT 3
381 #define FXOS8700_M_THS_YHP_MASK 0x04
382 #define FXOS8700_M_THS_YHP_SHIFT 2
383 #define FXOS8700_M_THS_XHE_MASK 0x02
384 #define FXOS8700_M_THS_XHE_SHIFT 1
385 #define FXOS8700_M_THS_XHP_MASK 0x01
386 #define FXOS8700_M_THS_XHP_SHIFT 0
387
388 // M_CTRL_REG1
389 #define FXOS8700_M_ACAL_MASK 0x80
390 #define FXOS8700_M_ACAL_SHIFT 7
391 #define FXOS8700_M_RST_MASK 0x40
392 #define FXOS8700_M_RST_SHIFT 6
393 #define FXOS8700_M_OST_MASK 0x20
394 #define FXOS8700_M_OST_SHIFT 5
395 #define FXOS8700_M_OS_MASK 0x1E
396 #define FXOS8700_M_OS_SHIFT 2
397 #define FXOS8700_M_HMS_MASK 0x03
398 #define FXOS8700_M_HMS_SHIFT 0
399
400 // M_CTRL_REG2
401 #define FXOS8700_M_AUTOINC_MASK 0x20
402 #define FXOS8700_M_AUTOINC_SHIFT 5
403 #define FXOS8700_M_MAXMIN_DIS_MASK 0x10
404 #define FXOS8700_M_MAXMIN_DIS_SHIFT 4
405 #define FXOS8700_M_MAXMIN_DIS_THS_MASK 0x08
406 #define FXOS8700_M_MAXMIN_DIS_THS_SHIFT 3
407 #define FXOS8700_M_MAXMIN_RST_MASK 0x04
408 #define FXOS8700_M_MAXMIN_RST_SHIFT 2
409 #define FXOS8700_M_RST_CNT_MASK 0x03
410 #define FXOS8700_M_RST_CNT_SHIFT 0
411
412 // M_CTRL_REG3
413 #define FXOS8700_M_RAW_MASK 0x80
414 #define FXOS8700_M_RAW_SHIFT 7
415 #define FXOS8700_M_ASLP_OS_MASK 0x70
416 #define FXOS8700_M_ASLP_OS_SHIFT 4
417 #define FXOS8700_M_THS_XYZ_UPDATE_MASK 0x08
418 #define FXOS8700_M_THS_XYZ_UPDATE_SHIFT 3
419 #define FXOS8700_M_ST_Z_MASK 0x04
420 #define FXOS8700_M_ST_Z_SHIFT 2
421 #define FXOS8700_M_ST_XY_MASK 0x03
422 #define FXOS8700_M_ST_XY_SHIFT 0
423
424 // M_INT_SRC
425 #define FXOS8700_SRC_M_THS_MASK 0x04
426 #define FXOS8700_SRC_M_THS_SHIFT 2
427 #define FXOS8700_SRC_M_VECM_MASK 0x02
428 #define FXOS8700_SRC_M_VECM_SHIFT 1
429 #define FXOS8700_SRC_M_DRDY_MASK 0x01
430 #define FXOS8700_SRC_M_DRDY_SHIFT 0
431
432 typedef struct
433 {
434 uint8 regAddr;
435 uint8 regValue;
436 } fxos8700_Sensor_Specific_Reg_t;
437
438 typedef struct
439 {
440 uint8 accelFullScaleRange;
441 uint8 mode;
442 uint32 regCount;
443 fxos8700_Sensor_Specific_Reg_t regPairs[];
444 } fxos8700_Sensor_Specific_Settings_t;
445
446 #endif /* FXOS8700_H_ */
FXOS8700_OFF_Y
Definition: fxos8700.h:60
FXOS8700_M_THS_X_MSB
Definition: fxos8700.h:96
FXOS8700_M_THS_Z_LSB
Definition: fxos8700.h:101
FXOS8700_M_OUT_X_MSB
Definition: fxos8700.h:63
FXOS8700_MIN_Z_LSB
Definition: fxos8700.h:92
FXOS8700_M_VECM_CNT
Definition: fxos8700.h:120
uint8
unsigned char uint8
This defines uint8 as unsigned char.
Definition: isf_types.h:18
FXOS8700_M_THS_Y_LSB
Definition: fxos8700.h:99
FXOS8700_A_VECM_INITX_MSB
Definition: fxos8700.h:111
FXOS8700_A_FFMT_THS_X_MSB
Definition: fxos8700.h:127
FXOS8700_SYSMOD
Definition: fxos8700.h:27
FXOS8700_M_CTRL_REG2
Definition: fxos8700.h:104
FXOS8700_PULSE_THSY
Definition: fxos8700.h:48
FXOS8700_M_OFF_Y_LSB
Definition: fxos8700.h:78
FXOS8700_M_VECM_THS_LSB
Definition: fxos8700.h:119
FXOS8700_TRANSIENT_CFG
Definition: fxos8700.h:41
FXOS8700_TEMP
Definition: fxos8700.h:93
FXOS8700_CTRL_REG4
Definition: fxos8700.h:57
FXOS8700_PL_THS_REG
Definition: fxos8700.h:36
fxos8700_Sensor_Specific_Reg_t::regValue
uint8 regValue
Definition: fxos8700.h:435
FXOS8700_A_VECM_INITZ_MSB
Definition: fxos8700.h:115
FXOS8700_ASLP_COUNT
Definition: fxos8700.h:53
FXOS8700_M_CTRL_REG3
Definition: fxos8700.h:105
FXOS8700_CTRL_REG5
Definition: fxos8700.h:58
FXOS8700_OFF_X
Definition: fxos8700.h:59
FXOS8700_OUT_Z_LSB
Definition: fxos8700.h:24
FXOS8700_PULSE_SRC
Definition: fxos8700.h:46
FXOS8700_MAX_Y_MSB
Definition: fxos8700.h:83
FXOS8700_A_FFMT_THS_Z_LSB
Definition: fxos8700.h:132
FXOS8700_PULSE_THSZ
Definition: fxos8700.h:49
FXOS8700_M_OUT_X_LSB
Definition: fxos8700.h:64
FXOS8700_PULSE_CFG
Definition: fxos8700.h:45
FXOS8700_FF_MT_COUNT
Definition: fxos8700.h:40
FXOS8700_A_VECM_THS_LSB
Definition: fxos8700.h:109
FXOS8700_MIN_Z_MSB
Definition: fxos8700.h:91
FXOS8700_A_VECM_INITY_LSB
Definition: fxos8700.h:114
FXOS8700_M_OUT_Z_LSB
Definition: fxos8700.h:68
FXOS8700_CTRL_REG3
Definition: fxos8700.h:56
FXOS8700_CMP_X_LSB
Definition: fxos8700.h:70
FXOS8700_INT_SOURCE
Definition: fxos8700.h:28
FXOS8700_TRANSIENT_COUNT
Definition: fxos8700.h:44
uint32
unsigned long uint32
This defines uint32 as unsigned long.
Definition: isf_types.h:36
FXOS8700_CMP_Y_LSB
Definition: fxos8700.h:72
FXOS8700_M_THS_CFG
Definition: fxos8700.h:94
FXOS8700_F_SETUP
Definition: fxos8700.h:25
FXOS8700_OUT_X_LSB
Definition: fxos8700.h:20
FXOS8700_M_DR_STATUS
Definition: fxos8700.h:62
FXOS8700_MAX_Y_LSB
Definition: fxos8700.h:84
FXOS8700_M_OUT_Y_MSB
Definition: fxos8700.h:65
FXOS8700_M_OFF_X_LSB
Definition: fxos8700.h:76
FXOS8700_A_VECM_INITY_MSB
Definition: fxos8700.h:113
FXOS8700_M_VECM_INITY_MSB
Definition: fxos8700.h:123
FXOS8700_WHO_AM_I
Definition: fxos8700.h:29
fxos8700_Sensor_Specific_Settings_t
Definition: fxos8700.h:438
FXOS8700_OUT_Y_MSB
Definition: fxos8700.h:21
FXOS8700_A_FFMT_THS_Z_MSB
Definition: fxos8700.h:131
FXOS8700_M_VECM_THS_MSB
Definition: fxos8700.h:118
FXOS8700_M_VECM_INITX_LSB
Definition: fxos8700.h:122
FXOS8700_M_THS_X_LSB
Definition: fxos8700.h:97
FXOS8700_CTRL_REG1
Definition: fxos8700.h:54
FXOS8700_TMLT
Definition: fxos8700.h:50
FXOS8700_FF_MT_THS
Definition: fxos8700.h:39
FXOS8700_CTRL_REG2
Definition: fxos8700.h:55
FXOS8700_M_VECM_INITZ_LSB
Definition: fxos8700.h:126
FXOS8700_TRIG_CFG
Definition: fxos8700.h:26
FXOS8700_MIN_X_LSB
Definition: fxos8700.h:88
FXOS8700_CMP_X_MSB
Definition: fxos8700.h:69
fxos8700_Sensor_Specific_Settings_t::regCount
uint32 regCount
Definition: fxos8700.h:442
FXOS8700_MAX_Z_MSB
Definition: fxos8700.h:85
FXOS8700_OFF_Z
Definition: fxos8700.h:61
FXOS8700_M_OUT_Z_MSB
Definition: fxos8700.h:67
FXOS8700_A_VECM_CNT
Definition: fxos8700.h:110
FXOS8700_M_OFF_X_MSB
Definition: fxos8700.h:75
fxos8700_Sensor_Specific_Settings_t::mode
uint8 mode
Definition: fxos8700.h:441
FXOS8700_STATUS
Definition: fxos8700.h:18
FXOS8700_PULSE_WIND
Definition: fxos8700.h:52
FXOS8700_CMP_Y_MSB
Definition: fxos8700.h:71
FXOS8700_MAX_X_LSB
Definition: fxos8700.h:82
FXOS8700_OUT_X_MSB
Definition: fxos8700.h:19
FXOS8700_TRANSIENT_SRC
Definition: fxos8700.h:42
FXOS8700_CMP_Z_MSB
Definition: fxos8700.h:73
FXOS8700_A_VECM_INITX_LSB
Definition: fxos8700.h:112
FXOS8700_MIN_Y_MSB
Definition: fxos8700.h:89
FXOS8700_A_FFMT_THS_Y_MSB
Definition: fxos8700.h:129
FXOS8700_PL_CFG
Definition: fxos8700.h:33
FXOS8700_FF_MT_SRC
Definition: fxos8700.h:38
FXOS8700_PL_STATUS
Definition: fxos8700.h:32
FXOS8700_M_VECM_INITX_MSB
Definition: fxos8700.h:121
FXOS8700_CMP_Z_LSB
Definition: fxos8700.h:74
FXOS8700_M_OUT_Y_LSB
Definition: fxos8700.h:66
FXOS8700_FF_MT_CFG
Definition: fxos8700.h:37
FXOS8700_MAX_X_MSB
Definition: fxos8700.h:81
FXOS8700_MAX_Z_LSB
Definition: fxos8700.h:86
FXOS8700_M_OFF_Y_MSB
Definition: fxos8700.h:77
FXOS8700_M_VECM_INITY_LSB
Definition: fxos8700.h:124
FXOS8700_M_THS_COUNT
Definition: fxos8700.h:102
FXOS8700_M_THS_Y_MSB
Definition: fxos8700.h:98
FXOS8700_A_FFMT_THS_X_LSB
Definition: fxos8700.h:128
FXOS8700_M_THS_Z_MSB
Definition: fxos8700.h:100
FXOS8700_M_OFF_Z_LSB
Definition: fxos8700.h:80
fxos8700_Sensor_Specific_Settings_t::accelFullScaleRange
uint8 accelFullScaleRange
Definition: fxos8700.h:440
FXOS8700_A_VECM_INITZ_LSB
Definition: fxos8700.h:116
FXOS8700_M_VECM_INITZ_MSB
Definition: fxos8700.h:125
FXOS8700_HP_FILTER_CUTOFF
Definition: fxos8700.h:31
FXOS8700_XYZ_DATA_CFG
Definition: fxos8700.h:30
FXOS8700_M_THS_SRC
Definition: fxos8700.h:95
FXOS8700_PL_BF_ZCOMP
Definition: fxos8700.h:35
FXOS8700_PULSE_THSX
Definition: fxos8700.h:47
FXOS8700_PULSE_LTCY
Definition: fxos8700.h:51
FXOS8700_A_VECM_THS_MSB
Definition: fxos8700.h:108
FXOS8700_A_VECM_CFG
Definition: fxos8700.h:107
FXOS8700_A_FFMT_THS_Y_LSB
Definition: fxos8700.h:130
FXOS8700_M_CTRL_REG1
Definition: fxos8700.h:103
FXOS8700_PL_COUNT
Definition: fxos8700.h:34
FXOS8700_OUT_Z_MSB
Definition: fxos8700.h:23
FXOS8700_M_VECM_CFG
Definition: fxos8700.h:117
FXOS8700_M_OFF_Z_MSB
Definition: fxos8700.h:79
fxos8700_Sensor_Specific_Reg_t
Definition: fxos8700.h:432
fxos8700_regmap_tag
fxos8700_regmap_tag
FXOS8700 internal register addresses explained in the FXOS8700 data sheet.
Definition: fxos8700.h:17
FXOS8700_OUT_Y_LSB
Definition: fxos8700.h:22
FXOS8700_TRANSIENT_THS
Definition: fxos8700.h:43
FXOS8700_MIN_Y_LSB
Definition: fxos8700.h:90
FXOS8700_MIN_X_MSB
Definition: fxos8700.h:87
FXOS8700_M_INT_SRC
Definition: fxos8700.h:106
fxos8700_Sensor_Specific_Reg_t::regAddr
uint8 regAddr
Definition: fxos8700.h:434
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