| ISF 2.2 rev 5 Intelligent Sensing Framework for Kinetis with Processor Expert

- Main Page
- Modules
- Data Structures
- Files

- File List
- Globals

RLI1.c
Go to the documentation of this file.
1 /* ###################################################################
2 ** This component module is generated by Processor Expert. Do not modify it.
3 ** Filename : RLI1.c
4 ** CDE edition : Standard
5 ** Project : ISF2P2_K64F_MQX_PROJ
6 ** Processor : MK64FN1M0VLL12
7 ** Component : ISF_KSDK_RLI
8 ** Version : Component 02.500, Driver 01.00, CPU db: 3.00.000
9 ** Repository : My Components
10 ** Compiler : GNU C Compiler
11 ** Date/Time : 2016-10-06, 13:38, # CodeGen: 0
12 ** Abstract :
13 **
14 ** Settings :
15 ** Component Name : RLI1
16 ** ISF_Core : ISFCore1
17 ** App Task Priority : 12
18 ** App Task Stack Size : 1280
19 ** Is SPI Present : yes
20 ** Chip Select : fsl_gpio
21 ** Contents :
22 ** No public methods
23 **
24 ** (c) Copyright Freescale Semiconductor Inc, 2015
25 http://www.freescale.com
26 ** ###################################################################*/
27 /*!
28 ** @file RLI1.c
29 ** @version 01.00
30 ** @brief
31 **
32 */
33 /*!
34 ** @addtogroup RLI1_module RLI1 module documentation
35 ** @{
36 */
37
38 /* MODULE RLI1. */
39
40 #include "RLI1.h"
41 #include "isf_util.h"
42 #include "fsl_gpio_driver.h"
43 #include "isf_spi_master_types.h"
44
45 /* Task1 task name */
46 #define RLI1_TASK_NAME "RLI1_task"
47 /* Task1 task stack size */
48 #define RLI1_TASK_STACK_SIZE 1280
49 /* Task1 task priority value */
50 #define RLI1_TASK_PRIORITY 12
51
52 OSA_TASK_DEFINE(RLI1, RLI1_TASK_STACK_SIZE);
53 extern void rli_app_task(void);
54 /*
55 ** ===================================================================
56 ** Method : RLI1_MainTask()
57 **
58 ** Description :
59 ** The method functions as the main task for the Embedded Application.
60 ** The method initializes the Embedded Application global instance, calls the
61 ** user defined initialization, brings the selected subscriptions to a known state,
62 ** waits for raw sensor data as prescribed, calls the user defined data processing,
63 ** performs processed data output to the host interface. If the task should exit,
64 ** then it will call the user defined exit processing before the task is destroyed.
65 ** This method is internal. It is used by Processor Expert only.
66 ** Parameters : None.
67 ** Returns : None.
68 ** ===================================================================
69 */
70 void RLI1_MainTask(os_task_param_t task_init_data)
71 {
72 // Waiting for the system synchronisation.
73 // ISF initialization.
74 isf_system_sync();
75 rli_app_task();
76 }
77
78 /*
79 ** ===================================================================
80 ** Method : RLI1_init
81 **
82 ** Description : Start the task
83 ** Parameters : None.
84 ** Returns : None.
85 ** ===================================================================
86 */
87 void RLI1_init(void)
88 {
89 // Create the Application Task
90 OSA_TaskCreate(RLI1_MainTask, /* The task function entry */
91 (uint8_t *)RLI1_TASK_NAME, /* The name of this task */
92 RLI1_TASK_STACK_SIZE, /* The stack size in byte */
93 RLI1_stack, /* Pointer to the stack */
94 RLI1_TASK_PRIORITY, /* Initial priority of the task */
95 (task_param_t)(NULL), /* Pointer to be passed to the task when it is created */
96 false, /* This task will use not float register */
97 &RLI1_task_handler); /* Pointer to the task handler */
98 }
99
100 isf_status_t rli_spi_slave_init(void);
101 isf_status_t rli_spi_slave_write_preprocess(void *pCmdOut, uint32 offset, uint32 size, void *pWritebuffer);
102 isf_status_t rli_spi_slave_write_postprocess(void *pCmdOut);
103 isf_status_t rli_spi_slave_read_preprocess(void *pCmdOut, uint32 offset, uint32 size);
104 isf_status_t rli_spi_slave_read_postprocess(void *pCmdOut, void* pDataOut);
105
106 static uint8 rli_spi_cmd_len;
107 static uint8 rli_spi_cmd_type;
108
109 spi_master_slaveInfo_t rli_spi_sensor_type =
110 {
111 .slaveinit = (fnslaveinit_t)&rli_spi_slave_init,
112 .writepreProcess = (fnwritepreProcessing_t)rli_spi_slave_write_preprocess,
113 .writepostProcess = (fnwritepostProcossing_t)rli_spi_slave_write_postprocess,
114 .readpreProcess = (fnreadpreProcessing_t)rli_spi_slave_read_preprocess,
115 .readpostProcess = (fnreadpostProcossing_t)rli_spi_slave_read_postprocess
116 };
117
118 gpio_output_pin_user_config_t gpioX_OutConfig0[] =
119 {
120 {
121 .config.outputLogic = 1,
122 .config.slewRate = kPortSlowSlewRate,
123 .config.isOpenDrainEnabled = false,
124 .config.driveStrength = kPortLowDriveStrength,
125 },
126 {
127 .pinName = GPIO_PINS_OUT_OF_RANGE,
128 }
129 };
130
131 const spi_master_CommSpecificInfo_t RLI_SPI_DeviceInfo =
132 {
133 .busConfig =
134 {
135 .timeout = 1000U,
136 .device =
137 {
138 .bitsPerSec = 500000U,
139 .dataBusConfig.bitsPerFrame = 8U,
140 .dataBusConfig.clkPolarity = kDspiClockPolarity_ActiveHigh,
141 .dataBusConfig.clkPhase = kDspiClockPhase_FirstEdge,
142 .dataBusConfig.direction = kDspiMsbFirst,
143 },
144 .userConfig =
145 {
146 .whichCtar = kDspiCtar0,
147 .isSckContinuous = false,
148 .isChipSelectContinuous = false,
149 .whichPcs = kDspiPcs0,
150 .pcsPolarity = kDspiPcs_ActiveHigh,
151 },
152 },
153 .pSlaveInfo = &rli_spi_sensor_type
154 };
155
156 static uint8 spiReadCmdBuffer[64] = {0};
157 static uint8 spiReadDataBuffer[64] = {0};
158 static uint8 spiWriteCmdDataBuffer[64] = {0};
159
160 /* @brief function to parse the 16-Bit packed SPI Address and return the populated SPI Configuration.
161 *
162 * --------------------------------- ---------------------------------
163 * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
164 * --------------------------------- ---------------------------------
165 * |TYP| ChannelID |SPI_TP/Reserved| |SS PortName| SS PinNumber |
166 * ---------------MSB--------------- ----------------LSB--------------
167 *
168 * TYP : I2C/SPI Type selector (0=I2C/1=SPI)
169 * ChannelID : The I2C/SPI sub-channel number (0=I2C0/SPI0 or defaults, 1=I2C1/SPI1).
170 * SPI_TP : SPI Header Type (SPI Header can be 1/2-bit with variable R/W bit values and address offsets).
171 * Refer individual Sensor Data sheet for details on SPI Header formats.
172 * The current implementation covers 3 family of sensors as listed below in th switch case statement.
173 * SS PortName : The SPI Slave Select Port (0=A, 1=B, 2=C, 3=D, 4=E, ...).
174 * SS Pin Number : The SPI Slave Select Pin Number (0, 1, 2, 3, ..).
175 */
176 spi_master_CommSpecificInfo_t rli_spi_get_config(uint16 spiAddress)
177 {
178 uint8 portName, pinNumber, spiHdrType;
179
180 /* Extract SPI Type and SS Info. */
181 spiHdrType = (spiAddress & 0x0400) >> 8;
182 portName = (spiAddress & 0x00E0) >> 5;
183 pinNumber = (spiAddress & 0x001F);
184
185 switch(spiHdrType)
186 {
187 case 2: /* MMA955x and Similar. */
188 rli_spi_cmd_len = 1;
189 rli_spi_cmd_type = 2;
190 break;
191 case 1: /* FXAS21002 and Similar. */
192 rli_spi_cmd_len = 1;
193 rli_spi_cmd_type = 1;
194 break;
195 case 0: /* FXLS8471, FXOS8700 and Similar. */
196 default:
197 rli_spi_cmd_len = 2;
198 rli_spi_cmd_type = 0;
199 }
200 gpioX_OutConfig0[0].pinName = GPIO_MAKE_PIN(portName, pinNumber);
201
202 return RLI_SPI_DeviceInfo;
203 }
204
205 isf_status_t rli_spi_slave_init(void)
206 {
207 // Call the GPIO API to initialize the chip-select.
208 GPIO_DRV_OutputPinInit(gpioX_OutConfig0);
209
210 return ISF_SUCCESS;
211 }
212
213 isf_status_t rli_spi_slave_write_preprocess(void *pCmdOut, uint32 offset, uint32 size, void *pWritebuffer)
214 {
215 spi_mater_slaveCmd_t* pSlaveCmd = (spi_mater_slaveCmd_t*)pCmdOut;
216
217 uint8 *pWBuff = (uint8*)spiWriteCmdDataBuffer;
218 uint8 *pRBuff = (uint8*)(spiWriteCmdDataBuffer + size + rli_spi_cmd_len);
219
220 switch(rli_spi_cmd_type)
221 {
222 case 2: /* MMA955x and Similar. */
223 *(pWBuff) = (offset | 0x40) << 1;
224 break;
225 case 1: /* FXAS21002 and Similar. */
226 *(pWBuff) = offset & 0x7F;
227 break;
228 case 0: /* FXLS8471, FXOS8700 and Similar. */
229 default:
230 *(pWBuff) = offset | 0x80;
231 *(pWBuff+1) = offset & 0x80;
232 }
233
234 // Copy the command
235 ISF_MEM_CPY((uint8*)pWritebuffer, (pWBuff + rli_spi_cmd_len), size);
236
237 // Create the slave command.
238 pSlaveCmd->size = size + rli_spi_cmd_len;
239 pSlaveCmd->pWriteBuffer = (uint8*)pWBuff;
240 pSlaveCmd->pReadBuffer = (uint8*)pRBuff;
241
242 // Call the GPIO_LDD function to clear chip-select.
243 GPIO_DRV_ClearPinOutput(gpioX_OutConfig0[0].pinName);
244
245 return ISF_SUCCESS;
246 }
247
248 isf_status_t rli_spi_slave_write_postprocess(void *pCmdOut)
249 {
250 spi_mater_slaveCmd_t* pSlaveCmd = (spi_mater_slaveCmd_t*)pCmdOut;
251
252 // Call the GPIO_LDD function to set chip-select.
253 GPIO_DRV_SetPinOutput(gpioX_OutConfig0[0].pinName);
254
255 return ISF_SUCCESS;
256 }
257
258 isf_status_t rli_spi_slave_read_preprocess(void *pCmdOut, uint32 offset, uint32 size)
259 {
260 spi_mater_slaveCmd_t* pSlaveCmd = (spi_mater_slaveCmd_t*)pCmdOut;
261
262 uint8 *pWBuff = (uint8*)spiReadCmdBuffer;
263 uint8 *pRBuff = (uint8*)spiReadDataBuffer;
264
265 switch(rli_spi_cmd_type)
266 {
267 case 2: /* MMA955x and Similar. */
268 *(pWBuff) = (offset & 0x7F) << 1 ;
269 break;
270 case 1: /* FXAS21002 and Similar. */
271 *(pWBuff) = offset | 0x80;
272 break;
273 case 0: /* FXLS8471, FXOS8700 and Similar. */
274 default:
275 *(pWBuff) = offset & 0x7F;
276 *(pWBuff + 1) = offset & 0x80;
277 }
278
279 // Create the slave command.
280 pSlaveCmd->size = size + rli_spi_cmd_len;
281 pSlaveCmd->pWriteBuffer = (uint8*)pWBuff;
282 pSlaveCmd->pReadBuffer = (uint8*)pRBuff;
283
284 // Call the GPIO_LDD function to clear chip-select.
285 GPIO_DRV_ClearPinOutput(gpioX_OutConfig0[0].pinName);
286 return ISF_SUCCESS;
287 }
288
289 isf_status_t rli_spi_slave_read_postprocess(void *pCmdOut, void* pDataOut)
290 {
291 spi_mater_slaveCmd_t* pSlaveCmd = (spi_mater_slaveCmd_t*)pCmdOut;
292
293 ISF_MEM_CPY((uint8*)(pSlaveCmd->pReadBuffer + rli_spi_cmd_len), pDataOut , (pSlaveCmd->size - rli_spi_cmd_len));
294 // Call the GPIO_LDD function to set chip-select.
295 GPIO_DRV_SetPinOutput(gpioX_OutConfig0[0].pinName);
296 return ISF_SUCCESS;
297 }
298
299 /* END RLI1. */
300
301 /*!
302 ** @}
303 */
304 /*
305 ** ###################################################################
306 **
307 ** This file was created by Processor Expert 10.5 [05.21]
308 ** for the Freescale Kinetis series of microcontrollers.
309 **
310 ** ###################################################################
311 */
spi_mater_SlaveCmd::size
uint32 size
Definition: isf_spi_master_types.h:39
RLI_SPI_DeviceInfo
const spi_master_CommSpecificInfo_t RLI_SPI_DeviceInfo
Definition: RLI1.c:131
rli_spi_slave_read_postprocess
isf_status_t rli_spi_slave_read_postprocess(void *pCmdOut, void *pDataOut)
Definition: RLI1.c:289
uint8
unsigned char uint8
Definition: isf_types.h:76
spi_mater_slaveInfo::slaveinit
fnslaveinit_t slaveinit
Definition: isf_spi_master_types.h:53
spi_master_CommSpecificInfo_t
Definition: isf_spi_master_types.h:60
ISF_SUCCESS
Definition: isf.h:31
ISF_MEM_CPY
#define ISF_MEM_CPY(src, dest, number_of_bytes)
Macro for the memory copy.
Definition: isf_util.h:68
isf_system_sync
void isf_system_sync(void)
This function synchronizes the user tasks and the system initialization.
Definition: isf_init.c:50
spi_mater_slaveInfo
This structure defines the slave specific spi information.
Definition: isf_spi_master_types.h:51
RLI1.h
spi_master_CommSpecificInfo_t::busConfig
spi_master_busConfig_t busConfig
Definition: isf_spi_master_types.h:63
RLI1_TASK_NAME
#define RLI1_TASK_NAME
Definition: RLI1.c:46
spi_mater_SlaveCmd::pWriteBuffer
uint8 * pWriteBuffer
Definition: isf_spi_master_types.h:41
rli_spi_slave_init
isf_status_t rli_spi_slave_init(void)
Definition: RLI1.c:205
RLI1_TASK_PRIORITY
#define RLI1_TASK_PRIORITY
Definition: RLI1.c:50
rli_spi_slave_read_preprocess
isf_status_t rli_spi_slave_read_preprocess(void *pCmdOut, uint32 offset, uint32 size)
Definition: RLI1.c:258
rli_app_task
void rli_app_task(void)
Definition: rli_project.c:189
os_task_param_t
task_param_t os_task_param_t
Definition: mqx_ksdk.h:354
isf_util.h
The isf_util.h file contains the utility method declarations and macros.
rli_spi_slave_write_preprocess
isf_status_t rli_spi_slave_write_preprocess(void *pCmdOut, uint32 offset, uint32 size, void *pWritebuffer)
Definition: RLI1.c:213
fnwritepreProcessing_t
isf_status_t(* fnwritepreProcessing_t)(void *cmdOut, uint32 offset, uint32 size, void *writebuffer)
Definition: isf_spi_master_types.h:45
RLI1_init
void RLI1_init(void)
Definition: RLI1.c:87
spi_mater_SlaveCmd
This structure defines the spi slave command format.
Definition: isf_spi_master_types.h:36
fnwritepostProcossing_t
isf_status_t(* fnwritepostProcossing_t)(void *cmd)
Definition: isf_spi_master_types.h:46
rli_spi_get_config
spi_master_CommSpecificInfo_t rli_spi_get_config(uint16 spiAddress)
Definition: RLI1.c:176
uint16
unsigned short int uint16
Definition: isf_types.h:77
gpioX_OutConfig0
gpio_output_pin_user_config_t gpioX_OutConfig0[]
Definition: RLI1.c:118
fnreadpreProcessing_t
isf_status_t(* fnreadpreProcessing_t)(void *cmdout, uint32 offset, uint32 size)
Definition: isf_spi_master_types.h:47
OSA_TASK_DEFINE
OSA_TASK_DEFINE(RLI1, RLI1_TASK_STACK_SIZE)
isf_status_t
int32 isf_status_t
ISF return status type.
Definition: isf.h:76
spi_mater_SlaveCmd::pReadBuffer
uint8 * pReadBuffer
Definition: isf_spi_master_types.h:40
isf_spi_master_types.h
isf_spi_master_types.h defines the spi protocol adapter structure and types.
RLI1_TASK_STACK_SIZE
#define RLI1_TASK_STACK_SIZE
Definition: RLI1.c:48
rli_spi_sensor_type
spi_master_slaveInfo_t rli_spi_sensor_type
Definition: RLI1.c:109
fnreadpostProcossing_t
isf_status_t(* fnreadpostProcossing_t)(void *cmd, void *dataOut)
Definition: isf_spi_master_types.h:48
spi_master_BusConfig_struct::timeout
isf_duration_t timeout
Definition: isf_spi_master_types.h:21
uint32
unsigned long int uint32
Definition: isf_types.h:78
rli_spi_slave_write_postprocess
isf_status_t rli_spi_slave_write_postprocess(void *pCmdOut)
Definition: RLI1.c:248
RLI1_MainTask
void RLI1_MainTask(os_task_param_t task_init_data)
Definition: RLI1.c:70
fnslaveinit_t
isf_status_t(* fnslaveinit_t)(void)
Definition: isf_spi_master_types.h:44
- © Freescale Semiconductor, Inc. 2016. All Rights Reserved.