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mpl3115.h
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1 /**
2 * @file mpl3115.h
3 * @brief The \b mpl3115.h contains the MPL3115 Pressure sensor register definitions, access macros, and
4 * device access functions.
5 *
6 * @copyright Copyright (c) 2015, Freescale Semiconductor, Inc.
7 */
8 #ifndef _MPL3115_H_
9 #define _MPL3115_H_
10
11 #include "isf.h"
12 #include "isf_devmsg.h"
13 #include "fsl_mpl3115_i2c_1D_press.h"
14
15 /***********************************************************************************************\
16 * Public macros
17 \***********************************************************************************************/
18
19 #define MPL3115_IIC_ADDRESS 0x60 /*MPL3115A2 Address*/
20
21 /***********************************************************************************************
22 **
23 ** MPL3115 Sensor Internal Registers
24 */
25 enum
26 {
27 MPL3115_STATUS_00 = 0, // 0x00
28 MPL3115_OUT_P_MSB, // 0x01
29 MPL3115_OUT_P_CSB, // 0x02
30 MPL3115_OUT_P_LSB, // 0x03
31 MPL3115_OUT_T_MSB, // 0x04
32 MPL3115_OUT_T_LSB, // 0x05
33 MPL3115_OUT_DR_STATUS, // 0x06
34 MPL3115_OUT_P_DELTA_MSB, // 0x07
35 MPL3115_OUT_P_DELTA_CSB, // 0x08
36 MPL3115_OUT_P_DELTA_LSB, // 0x09
37 MPL3115_OUT_T_DELTA_MSB, // 0x0A
38 MPL3115_OUT_T_DELTA_LSB, // 0x0B
39 MPL3115_WHO_AM_I, // 0x0C
40 MPL3115_F_STATUS, // 0x0D
41 MPL3115_F_DATA, // 0x0E
42 MPL3115_F_SETUP, // 0x0F
43 MPL3115_TIME_DLY, // 0x10
44 MPL3115_SYSMOD, // 0x11
45 MPL3115_INT_SOURCE, // 0x12
46 MPL3115_PT_DATA_CFG, // 0x13
47 MPL3115_BAR_IN_MSB, // 0x14
48 MPL3115_BAR_IN_LSB, // 0x15
49 MPL3115_P_ARM_MSB, // 0x16
50 MPL3115_P_ARM_LSB, // 0x17
51 MPL3115_T_ARM, // 0x18
52 MPL3115_P_ARM_WND_MSB, // 0x19
53 MPL3115_P_ARM_WND_LSB, // 0x1A
54 MPL3115_T_ARM_WND, // 0x1B
55 MPL3115_P_MIN_MSB, // 0x1C
56 MPL3115_P_MIN_CSB, // 0x1D
57 MPL3115_P_MIN_LSB, // 0x1E
58 MPL3115_T_MIN_MSB, // 0x1F
59 MPL3115_T_MIN_LSB, // 0x20
60 MPL3115_P_MAX_MSB, // 0x21
61 MPL3115_P_MAX_CSB, // 0x22
62 MPL3115_P_MAX_LSB, // 0x23
63 MPL3115_T_MAX_MSB, // 0x24
64 MPL3115_T_MAX_LSB, // 0x25
65 MPL3115_CTRL_REG1, // 0x26
66 MPL3115_CTRL_REG2, // 0x27
67 MPL3115_CTRL_REG3, // 0x28
68 MPL3115_CTRL_REG4, // 0x29
69 MPL3115_CTRL_REG5, // 0x2A
70 MPL3115_OFF_P, // 0x2B
71 MPL3115_OFF_T, // 0x2C
72 MPL3115_OFF_H // 0x2D
73 };
74
75 /*
76 * General purpose macros to set/get a specific bit field within a register.
77 * The macro assumes that the root identifier for the field is a consistent character string (e.g., "BIT_FIELD").
78 * The bit field mask is the character string followed by "_MASK" (e.g., BIT_FIELD_MASK).
79 * The bit field shift is the character string followed by "_SHIFT" (e.g., BIT_FIELD_SHIFT).
80 */
81 #define MPL3115_SET_FIELD(name,val) (((val)<<MPL3115_##name##_SHIFT)&(MPL3115_##name##_MASK))
82 #define MPL3115_GET_FIELD(name,val) ((val&MPL3115_##name##_MASK)>>MPL3115_##name##_SHIFT)
83
84 /*
85 ** STATUS_00 Register
86 */
87 #define STATUS_00_REG 0x00
88 #define DR_STATUS_00_REG 0x06
89 //
90 #define MPL3115_PTOW_MASK 0x80
91 #define MPL3115_PTOW_SHIFT 7
92 #define MPL3115_PTDR_MASK 0x08
93 #define MPL3115_PTDR_SHIFT 3
94 #define MPL3115_PDR_MASK 0x04
95 #define MPL3115_PDR_SHIFT 2
96 #define MPL3115_TDR_MASK 0x02
97 #define MPL3115_TDR_SHIFT 1
98 /*
99 ** WHO_AM_I Register
100 */
101 #define MPL3115_WHOAMI_VALUE 0xC4
102
103 /*
104 ** SYSMOD System Mode Register
105 */
106 #define MPL3115_SYSMOD_MASK 0x01
107 #define MPL3115_SYSMOD_SHIFT 0
108 #define MPL3115_ACTIVE_MASK 1
109
110 /*
111 ** INT_SOURCE System Interrupt Status Register
112 */
113 #define MPL3115_SRC_DRDY_MASK 0x80
114 #define MPL3115_SRC_DRDY_SHIFT 7
115 #define MPL3115_SRC_PW_MASK 0x20
116 #define MPL3115_SRC_PW_SHIFT 5
117 #define MPL3115_SRC_TW_MASK 0x10
118 #define MPL3115_SRC_TW_SHIFT 4
119 #define MPL3115_SRC_PTH_MASK 0x08
120 #define MPL3115_SRC_PTH_SHIFT 3
121 #define MPL3115_SRC_TTH_MASK 0x04
122 #define MPL3115_SRC_TTH_SHIFT 2
123 #define MPL3115_SRC_PCHG_MASK 0x02
124 #define MPL3115_SRC_PCHG_SHIFT 1
125 #define MPL3115_SRC_TCHG_MASK 0x01
126 #define MPL3115_SRC_TCHG_SHIFT 0
127
128 /*
129 ** PT_DATA_CFG Sensor Data Configuration Register
130 */
131 #define MPL3115_DREM_MASK 0x04
132 #define MPL3115_DREM_SHIFT 2
133 #define MPL3115_PDEFE_MASK 0x02
134 #define MPL3115_PDEFE_SHIFT 1
135 #define MPL3115_TDEFE_MASK 0x01
136 #define MPL3115_TDEFE_SHIFT 0
137
138 /*
139 ** CTRL_REG1 Interrupt Control Register
140 */
141 #define MPL3115_ALT_MASK 0x80
142 #define MPL3115_ALT_SHIFT 7
143 #define MPL3115_RAW_MASK 0x40
144 #define MPL3115_RAW_SHIFT 6
145 #define MPL3115_OS_MASK 0x38
146 #define MPL3115_OS_SHIFT 3
147 #define MPL3115_RST_MASK 0x04
148 #define MPL3115_RST_SHIFT 2
149 #define MPL3115_OST_MASK 0x02
150 #define MPL3115_OST_SHIFT 1
151 #define MPL3115_SBYB_MASK 0x01
152 #define MPL3115_SBYB_SHIFT 0
153
154 /*
155 ** CTRL_REG2 Interrupt Control Register
156 */
157 #define MPL3115_LOAD_OUT_MASK 0x20
158 #define MPL3115_LOAD_OUT_SHIFT 5
159 #define MPL3115_ALARM_SEL_MASK 0x10
160 #define MPL3115_ALARM_SEL_SHIFT 4
161 #define MPL3115_ST_MASK 0x0F
162 #define MPL3115_ST_SHIFT 0
163
164 /*
165 ** CTRL_REG3 Interrupt Control Register
166 */
167 #define MPL3115_IPOL1_MASK 0x20
168 #define MPL3115_IPOL1_SHIFT 5
169 #define MPL3115_PP_OD1_MASK 0x10
170 #define MPL3115_PP_OD1_SHIFT 4
171 #define MPL3115_IPOL2_MASK 0x02
172 #define MPL3115_IPOL2_SHIFT 1
173 #define MPL3115_PP_OD2_MASK 0x01
174 #define MPL3115_PP_OD2_SHIFT 0
175
176 /*
177 ** CTRL_REG4 Interrupt Control Register
178 */
179 #define MPL3115_INT_EN_DRDY_MASK 0x80
180 #define MPL3115_INT_EN_DRDY_SHIFT 7
181 #define MPL3115_INT_EN_PW_MASK 0x20
182 #define MPL3115_INT_EN_PW_SHIFT 5
183 #define MPL3115_INT_EN_TW_MASK 0x10
184 #define MPL3115_INT_EN_TW_SHIFT 4
185 #define MPL3115_INT_EN_PTH_MASK 0x08
186 #define MPL3115_INT_EN_PTH_SHIFT 3
187 #define MPL3115_INT_EN_TTH_MASK 0x04
188 #define MPL3115_INT_EN_TTH_SHIFT 2
189 #define MPL3115_INT_EN_PCHG_MASK 0x02
190 #define MPL3115_INT_EN_PCHG_SHIFT 1
191 #define MPL3115_INT_EN_TCHG_MASK 0x01
192 #define MPL3115_INT_EN_TCHG_SHIFT 0
193 /*
194 ** CTRL_REG5 Interrupt Control Register
195 */
196 #define MPL3115_INT_CFG_DRDY_MASK 0x80
197 #define MPL3115_INT_CFG_DRDY_SHIFT 7
198 #define MPL3115_INT_CFG_PW_MASK 0x20
199 #define MPL3115_INT_CFG_PW_SHIFT 5
200 #define MPL3115_INT_CFG_TW_MASK 0x10
201 #define MPL3115_INT_CFG_TW_SHIFT 4
202 #define MPL3115_INT_CFG_PTH_MASK 0x08
203 #define MPL3115_INT_CFG_PTH_SHIFT 3
204 #define MPL3115_INT_CFG_TTH_MASK 0x04
205 #define MPL3115_INT_CFG_TTH_SHIFT 2
206 #define MPL3115_INT_CFG_PCHG_MASK 0x02
207 #define MPL3115_INT_CFG_PCHG_SHIFT 1
208 #define MPL3115_INT_CFG_TCHG_MASK 0x01
209 #define MPL3115_INT_CFG_TCHG_SHIFT 0
210
211
212
213 /*
214 * Public Types
215 */
216
217 // Define the MPL3115 functional interface status return type.
218 typedef enum
219 {
220 MPL3115_SUCCESS,
221 MPL3115_ERROR
222 } mpl3115_status_t;
223
224 typedef struct
225 {
226 uint8 regAddr;
227 uint8 regValue;
228 } mpl3115_Sensor_Specific_Reg_t;
229
230 typedef struct
231 {
232 uint32 regCount;
233 mpl3115_Sensor_Specific_Reg_t regPairs[];
234 } mpl3115_Sensor_Specific_Settings_t;
235
236
237 #endif /* _MPL3115_H_ */
MPL3115_OUT_T_DELTA_LSB
Definition: mpl3115.h:38
MPL3115_STATUS_00
Definition: mpl3115.h:27
uint8
unsigned char uint8
Definition: isf_types.h:76
mpl3115_Sensor_Specific_Reg_t
Definition: mpl3115.h:224
MPL3115_OFF_T
Definition: mpl3115.h:71
MPL3115_INT_SOURCE
Definition: mpl3115.h:45
MPL3115_CTRL_REG3
Definition: mpl3115.h:67
MPL3115_F_SETUP
Definition: mpl3115.h:42
MPL3115_T_MAX_LSB
Definition: mpl3115.h:64
MPL3115_F_DATA
Definition: mpl3115.h:41
MPL3115_T_ARM_WND
Definition: mpl3115.h:54
MPL3115_P_ARM_WND_LSB
Definition: mpl3115.h:53
MPL3115_P_MAX_MSB
Definition: mpl3115.h:60
mpl3115_Sensor_Specific_Reg_t::regValue
uint8 regValue
Definition: mpl3115.h:227
MPL3115_CTRL_REG4
Definition: mpl3115.h:68
MPL3115_P_MIN_LSB
Definition: mpl3115.h:57
MPL3115_OUT_P_LSB
Definition: mpl3115.h:30
mpl3115_Sensor_Specific_Settings_t
Definition: mpl3115.h:230
MPL3115_P_MAX_LSB
Definition: mpl3115.h:62
mpl3115_Sensor_Specific_Reg_t::regAddr
uint8 regAddr
Definition: mpl3115.h:226
MPL3115_OUT_T_MSB
Definition: mpl3115.h:31
MPL3115_OUT_P_DELTA_MSB
Definition: mpl3115.h:34
mpl3115_status_t
mpl3115_status_t
Definition: mpl3115.h:218
MPL3115_T_ARM
Definition: mpl3115.h:51
MPL3115_OUT_T_LSB
Definition: mpl3115.h:32
MPL3115_OFF_H
Definition: mpl3115.h:72
MPL3115_P_ARM_WND_MSB
Definition: mpl3115.h:52
MPL3115_P_ARM_LSB
Definition: mpl3115.h:50
MPL3115_OUT_P_MSB
Definition: mpl3115.h:28
MPL3115_CTRL_REG2
Definition: mpl3115.h:66
MPL3115_T_MIN_MSB
Definition: mpl3115.h:58
fsl_mpl3115_i2c_1D_press.h
The fsl_mpl3115_i2c_1D_press.h file contains the definitions and functions supporting the MMA8652 Sen...
MPL3115_BAR_IN_LSB
Definition: mpl3115.h:48
MPL3115_CTRL_REG5
Definition: mpl3115.h:69
MPL3115_P_MIN_CSB
Definition: mpl3115.h:56
MPL3115_OUT_P_CSB
Definition: mpl3115.h:29
MPL3115_WHO_AM_I
Definition: mpl3115.h:39
MPL3115_BAR_IN_MSB
Definition: mpl3115.h:47
MPL3115_P_ARM_MSB
Definition: mpl3115.h:49
isf.h
Main ISF header file. Contains code common to all ISF components.
MPL3115_OUT_P_DELTA_LSB
Definition: mpl3115.h:36
MPL3115_P_MAX_CSB
Definition: mpl3115.h:61
MPL3115_ERROR
Definition: mpl3115.h:221
MPL3115_TIME_DLY
Definition: mpl3115.h:43
MPL3115_T_MAX_MSB
Definition: mpl3115.h:63
MPL3115_OFF_P
Definition: mpl3115.h:70
MPL3115_SUCCESS
Definition: mpl3115.h:220
MPL3115_PT_DATA_CFG
Definition: mpl3115.h:46
MPL3115_P_MIN_MSB
Definition: mpl3115.h:55
uint32
unsigned long int uint32
Definition: isf_types.h:78
MPL3115_F_STATUS
Definition: mpl3115.h:40
isf_devmsg.h
isf_devmsg.h defines the API definitions and types for the Intelligent Sensing (ISF) Device Messaging...
mpl3115_Sensor_Specific_Settings_t::regCount
uint32 regCount
Definition: mpl3115.h:232
MPL3115_OUT_P_DELTA_CSB
Definition: mpl3115.h:35
MPL3115_SYSMOD
Definition: mpl3115.h:44
MPL3115_CTRL_REG1
Definition: mpl3115.h:65
MPL3115_OUT_T_DELTA_MSB
Definition: mpl3115.h:37
MPL3115_T_MIN_LSB
Definition: mpl3115.h:59
MPL3115_OUT_DR_STATUS
Definition: mpl3115.h:33
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