<?xml version="1.0" encoding="UTF-8"?>
<PE_PROJECT_SETTINGS_DOCUMENTATION>
  <PE_product_version v="version 10.3 for Freescale Microcontrollers" />
  <PE_core_version v="Processor Expert Version 0509" />
  <CPU_Bean name="Cpu" type="MC56F84789VLL">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="Cpu" />
      <CPU_type v="MC56F84789VLL" />
      <list name="Clock settings (included)" v="1">
        <group name="Clock settings">
          <group name="Internal oscillator">
            <boolgroup name="Internal 32kHz relaxation oscillator (ROSC_32K)" v="Disabled" />
            <boolgroup name="Internal 8MHz relaxation oscillator (ROSC_8M)" v="Enabled">
              <Fast_internal_reference_clock__MHz_ v="8" />
              <boolgroup name="Initialize frequency trim" v="yes">
                <Frequency_trim_value_address v="58412" />
              </boolgroup>
              <boolgroup name="Initialize temperature trim" v="no" />
            </boolgroup>
          </group>
          <boolgroup name="External reference clock" v="Disabled" />
          <group name="Clock protection">
            <Frequency v="Off" />
            <Oscillator v="Off" />
            <Phase_locked_loop v="Off" />
          </group>
        </group>
      </list>
      <list name="Common settings (included)" v="1">
        <group name="Common settings">
          <Initialization_priority v="minimal priority" />
          <Watchdog v="Disabled" />
          <Saturation_mode v="Disabled" />
        </group>
      </list>
      <list name="Initialize shadow registers (included)" v="1">
        <boolgroup name="Initialize shadow registers" v="yes">
          <R0 v="0" />
          <R1 v="0" />
          <R2 v="0" />
          <R3 v="0" />
          <R4 v="0" />
          <R5 v="0" />
          <N v="0" />
          <N3 v="65535" />
          <M01 v="65535" />
        </boolgroup>
      </list>
      <list name="Initialize unused I/O pins (included)" v="1">
        <enumgroup name="Initialize unused I/O pins" v="No initialization">
          <Pull_resistor v="No initialization" />
          <Open_drain v="No initialization" />
          <Output_value v="no initialization" />
          <Include_Reset_pin v="no" />
          <Include_JTAG_pins v="no" />
        </enumgroup>
      </list>
      <group name="Internal peripherals">
        <list name="Shared Reset settings" v="1">
          <boolgroup name="Reset pin" v="Enabled">
            <Reset_Pin v="GPIOD4/RESETB" />
          </boolgroup>
        </list>
        <list name="Flash memory organization (included)" v="1">
          <group name="Flash memory organization">
            <list name="Shared FLASH settings" v="1">
              <group name="FlexNVM settings">
                <FlexNVM_size v="16 kW" />
                <D_flash_size v="16 kW" />
                <EEE_data_size v="0 words" />
                <boolgroup name="FlexRAM" v="Enabled">
                  <Start v="122880" />
                  <Size v="1024" />
                </boolgroup>
              </group>
            </list>
            <list name="Flash blocks" v="2">
              <group name="Flash block 0">
                <Address v="0" />
                <Size v="131072" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="1024" />
                <Protection_unit_size v="4096" />
              </group>
              <group name="Flash block 1">
                <Address v="32768" />
                <Size v="16384" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="512" />
                <Protection_unit_size v="2048" />
              </group>
            </list>
          </group>
        </list>
        <list name="Flash config settings (included)" v="1">
          <boolgroup name="Flash configuration field" v="Disabled" />
        </list>
        <list name="Memory resource protection (include)" v="1">
          <enumgroup name="Memory resource protection" v="Disabled">
            <EmptySection_DummyValue />
          </enumgroup>
        </list>
        <group name="Peripheral clock rates">
          <QSCI0_clock_rate v="Auto select" />
          <QSCI1_clock_rate v="Auto select" />
          <QSCI2_clock_rate v="Auto select" />
        </group>
        <list name="SIM module (included)" v="1">
          <group name="System integration module">
            <group name="Common CPU settings">
              <WAIT_disable_mode v="Enabled" />
              <STOP_disable_mode v="Enabled" />
              <DMA_disable_mode v="All modes" />
              <OnCE_clock_to_core v="Enabled when core TAP is enabled" />
              <Reset_filter v="Disabled" />
              <Select_master_PIT v="Master 0 and slave 1" />
            </group>
            <group name="Power controls">
              <Regulator_1_2_V_standby v="normal mode" />
              <Regulator_2_7_V_powerdown v="normal mode" />
              <Regulator_2_7_V_standby v="normal mode" />
              <Large_regulator_standby v="normal mode" />
            </group>
            <group name="Clock output selectors">
              <CLKOUT_divide_factor v="Divide by 1" />
              <CLKOUT0_select v="System clock" />
              <boolgroup name="CLKOUT0" v="Disabled" />
              <CLKOUT1_select v="System clock" />
              <boolgroup name="CLKOUT1" v="Disabled" />
            </group>
            <group name="Clock gating control in stop mode">
              <GPIOA_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOB_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOC_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOD_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOE_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOF_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOG_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <CAN_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C0_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI2_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI2_peripheral_clock_in_stop_mode v="Disabled" />
              <DAC_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB0_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB1_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT0_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT1_peripheral_clock_in_stop_mode v="Disabled" />
              <ENC_peripheral_clock_in_stop_mode v="Disabled" />
              <CRC_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC16_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC12_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPA_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPB_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPC_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPD_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
            </group>
            <group name="Clock gating control">
              <GPIOA_peripheral_clock v="Disabled" />
              <GPIOB_peripheral_clock v="Disabled" />
              <GPIOC_peripheral_clock v="Disabled" />
              <GPIOD_peripheral_clock v="Disabled" />
              <GPIOE_peripheral_clock v="Disabled" />
              <GPIOF_peripheral_clock v="Disabled" />
              <GPIOG_peripheral_clock v="Disabled" />
              <Timer_A_Channel_0_peripheral_clock v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock v="Disabled" />
              <Timer_B_Channel_1_peripheral_clock v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock v="Disabled" />
              <CAN_peripheral_clock v="Disabled" />
              <I2C0_peripheral_clock v="Disabled" />
              <I2C1_peripheral_clock v="Disabled" />
              <QSPI0_peripheral_clock v="Disabled" />
              <QSPI1_peripheral_clock v="Disabled" />
              <QSPI2_peripheral_clock v="Disabled" />
              <QSCI0_peripheral_clock v="Disabled" />
              <QSCI1_peripheral_clock v="Disabled" />
              <QSCI2_peripheral_clock v="Disabled" />
              <DAC_peripheral_clock v="Enabled" />
              <PDB0_peripheral_clock v="Disabled" />
              <PDB1_peripheral_clock v="Disabled" />
              <PIT0_peripheral_clock v="Disabled" />
              <PIT1_peripheral_clock v="Disabled" />
              <ENC_peripheral_clock v="Disabled" />
              <CRC_peripheral_clock v="Disabled" />
              <ADC16_peripheral_clock v="Disabled" />
              <ADC12_peripheral_clock v="Disabled" />
              <CMPA_peripheral_clock v="Enabled" />
              <CMPB_peripheral_clock v="Disabled" />
              <CMPC_peripheral_clock v="Disabled" />
              <CMPD_peripheral_clock v="Enabled" />
              <PWM_A_Channel_0_peripheral_clock v="Enabled" />
              <PWM_A_Channel_1_peripheral_clock v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock v="Disabled" />
            </group>
            <group name="Peripheral protection">
              <Power_Mode_Control_Write v="Off" />
              <GPIO_Port_D v="Off" />
              <Peripheral_Clock_Enable v="Off" />
              <GPIO_and_Internal_Peripheral_Select v="Off" />
            </group>
          </group>
        </list>
        <list name="MCM module (included)" v="1">
          <group name="Miscellaneous control module">
            <group name="MRP settings">
              <Program_RAM_Base_Address v="0" />
              <Flash_Base_Address v="0" />
              <Resource_protection v="Disabled" />
              <Register_lock v="Disabled" />
            </group>
            <group name="Core settings">
              <Core_instruction_buffer v="Enabled" />
              <Core_new_shadow_region v="Enabled" />
              <Core_reverse_carry v="Enabled" />
              <_56800EX_instructions v="Enabled" />
            </group>
          </group>
        </list>
        <list name="PMC module (included)" v="1">
          <boolgroup name="Power management controller" v="Enabled">
            <group name="Settings">
              <Voltage_Reference_Buffer v="Disabled" />
              <boolgroup name="Initialize bandgap trim value" v="yes">
                <Trim_value_address v="58413" />
              </boolgroup>
            </group>
          </boolgroup>
        </list>
        <list name="FMC module (included)" v="1">
          <boolgroup name="Flexible memory controller" v="Disabled" />
        </list>
        <list name="GPIOA module (included)" v="1">
          <group name="GPIOA">
            <group name="GPIOA_Low">
              <Drive_strength_for_GPIOA0 v="Low" />
              <Slew_rate_for_GPIOA0 v="Slow" />
              <Drive_strength_for_GPIOA1 v="Low" />
              <Slew_rate_for_GPIOA1 v="Slow" />
              <Drive_strength_for_GPIOA2 v="Low" />
              <Slew_rate_for_GPIOA2 v="Slow" />
              <Drive_strength_for_GPIOA3 v="Low" />
              <Slew_rate_for_GPIOA3 v="Slow" />
              <Drive_strength_for_GPIOA4 v="Low" />
              <Slew_rate_for_GPIOA4 v="Slow" />
              <Drive_strength_for_GPIOA5 v="Low" />
              <Slew_rate_for_GPIOA5 v="Slow" />
              <Drive_strength_for_GPIOA6 v="Low" />
              <Slew_rate_for_GPIOA6 v="Slow" />
              <Drive_strength_for_GPIOA7 v="Low" />
              <Slew_rate_for_GPIOA7 v="Slow" />
            </group>
            <group name="GPIOA_High">
              <Drive_strength_for_GPIOA8 v="Low" />
              <Slew_rate_for_GPIOA8 v="Slow" />
              <Drive_strength_for_GPIOA9 v="Low" />
              <Slew_rate_for_GPIOA9 v="Slow" />
              <Drive_strength_for_GPIOA10 v="Low" />
              <Slew_rate_for_GPIOA10 v="Slow" />
              <Drive_strength_for_GPIOA11 v="Low" />
              <Slew_rate_for_GPIOA11 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOB module (included)" v="1">
          <group name="GPIOB">
            <group name="GPIOB_Low">
              <Drive_strength_for_GPIOB0 v="Low" />
              <Slew_rate_for_GPIOB0 v="Slow" />
              <Drive_strength_for_GPIOB1 v="Low" />
              <Slew_rate_for_GPIOB1 v="Slow" />
              <Drive_strength_for_GPIOB2 v="Low" />
              <Slew_rate_for_GPIOB2 v="Slow" />
              <Drive_strength_for_GPIOB3 v="Low" />
              <Slew_rate_for_GPIOB3 v="Slow" />
              <Drive_strength_for_GPIOB4 v="Low" />
              <Slew_rate_for_GPIOB4 v="Slow" />
              <Drive_strength_for_GPIOB5 v="Low" />
              <Slew_rate_for_GPIOB5 v="Slow" />
              <Drive_strength_for_GPIOB6 v="Low" />
              <Slew_rate_for_GPIOB6 v="Slow" />
              <Drive_strength_for_GPIOB7 v="Low" />
              <Slew_rate_for_GPIOB7 v="Slow" />
            </group>
            <group name="GPIOB_High">
              <Drive_strength_for_GPIOB8 v="Low" />
              <Slew_rate_for_GPIOB8 v="Slow" />
              <Drive_strength_for_GPIOB9 v="Low" />
              <Slew_rate_for_GPIOB9 v="Slow" />
              <Drive_strength_for_GPIOB10 v="Low" />
              <Slew_rate_for_GPIOB10 v="Slow" />
              <Drive_strength_for_GPIOB11 v="Low" />
              <Slew_rate_for_GPIOB11 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOC module (included)" v="1">
          <group name="GPIOC">
            <group name="GPIOC_Low">
              <Drive_strength_for_GPIOC0 v="Low" />
              <Slew_rate_for_GPIOC0 v="Slow" />
              <Drive_strength_for_GPIOC1 v="Low" />
              <Slew_rate_for_GPIOC1 v="Slow" />
              <Drive_strength_for_GPIOC2 v="Low" />
              <Slew_rate_for_GPIOC2 v="Slow" />
              <Drive_strength_for_GPIOC3 v="Low" />
              <Slew_rate_for_GPIOC3 v="Slow" />
              <Drive_strength_for_GPIOC4 v="Low" />
              <Slew_rate_for_GPIOC4 v="Slow" />
              <Drive_strength_for_GPIOC5 v="Low" />
              <Slew_rate_for_GPIOC5 v="Slow" />
              <Drive_strength_for_GPIOC6 v="Low" />
              <Slew_rate_for_GPIOC6 v="Slow" />
              <Drive_strength_for_GPIOC7 v="Low" />
              <Slew_rate_for_GPIOC7 v="Slow" />
            </group>
            <group name="GPIOC_High">
              <Drive_strength_for_GPIOC8 v="Low" />
              <Slew_rate_for_GPIOC8 v="Slow" />
              <Drive_strength_for_GPIOC9 v="Low" />
              <Slew_rate_for_GPIOC9 v="Slow" />
              <Drive_strength_for_GPIOC10 v="Low" />
              <Slew_rate_for_GPIOC10 v="Slow" />
              <Drive_strength_for_GPIOC11 v="Low" />
              <Slew_rate_for_GPIOC11 v="Slow" />
              <Drive_strength_for_GPIOC12 v="Low" />
              <Slew_rate_for_GPIOC12 v="Slow" />
              <Drive_strength_for_GPIOC13 v="Low" />
              <Slew_rate_for_GPIOC13 v="Slow" />
              <Drive_strength_for_GPIOC14 v="Low" />
              <Slew_rate_for_GPIOC14 v="Slow" />
              <Drive_strength_for_GPIOC15 v="Low" />
              <Slew_rate_for_GPIOC15 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOD module (included)" v="1">
          <group name="GPIOD">
            <Drive_strength_for_GPIOD0 v="Low" />
            <Slew_rate_for_GPIOD0 v="Slow" />
            <Drive_strength_for_GPIOD1 v="Low" />
            <Slew_rate_for_GPIOD1 v="Fast" />
            <Drive_strength_for_GPIOD2 v="Low" />
            <Slew_rate_for_GPIOD2 v="Slow" />
            <Drive_strength_for_GPIOD3 v="Low" />
            <Slew_rate_for_GPIOD3 v="Fast" />
            <Drive_strength_for_GPIOD4 v="Low" />
            <Slew_rate_for_GPIOD4 v="Slow" />
            <Drive_strength_for_GPIOD5 v="Low" />
            <Slew_rate_for_GPIOD5 v="Slow" />
            <Drive_strength_for_GPIOD6 v="Low" />
            <Slew_rate_for_GPIOD6 v="Slow" />
            <Drive_strength_for_GPIOD7 v="Low" />
            <Slew_rate_for_GPIOD7 v="Slow" />
          </group>
        </list>
        <list name="GPIOE module (included)" v="1">
          <group name="GPIOE">
            <group name="GPIOE_Low">
              <Drive_strength_for_GPIOE0 v="Low" />
              <Slew_rate_for_GPIOE0 v="Slow" />
              <Drive_strength_for_GPIOE1 v="Low" />
              <Slew_rate_for_GPIOE1 v="Slow" />
              <Drive_strength_for_GPIOE2 v="Low" />
              <Slew_rate_for_GPIOE2 v="Slow" />
              <Drive_strength_for_GPIOE3 v="Low" />
              <Slew_rate_for_GPIOE3 v="Slow" />
              <Drive_strength_for_GPIOE4 v="Low" />
              <Slew_rate_for_GPIOE4 v="Slow" />
              <Drive_strength_for_GPIOE5 v="Low" />
              <Slew_rate_for_GPIOE5 v="Slow" />
              <Drive_strength_for_GPIOE6 v="Low" />
              <Slew_rate_for_GPIOE6 v="Slow" />
              <Drive_strength_for_GPIOE7 v="Low" />
              <Slew_rate_for_GPIOE7 v="Slow" />
            </group>
            <group name="GPIOE_High">
              <Drive_strength_for_GPIOE8 v="Low" />
              <Slew_rate_for_GPIOE8 v="Slow" />
              <Drive_strength_for_GPIOE9 v="Low" />
              <Slew_rate_for_GPIOE9 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOF module (included)" v="1">
          <group name="GPIOF">
            <group name="GPIOF_Low">
              <Drive_strength_for_GPIOF0 v="Low" />
              <Slew_rate_for_GPIOF0 v="Slow" />
              <Drive_strength_for_GPIOF1 v="Low" />
              <Slew_rate_for_GPIOF1 v="Slow" />
              <Drive_strength_for_GPIOF2 v="Low" />
              <Slew_rate_for_GPIOF2 v="Slow" />
              <Drive_strength_for_GPIOF3 v="Low" />
              <Slew_rate_for_GPIOF3 v="Slow" />
              <Drive_strength_for_GPIOF4 v="Low" />
              <Slew_rate_for_GPIOF4 v="Slow" />
              <Drive_strength_for_GPIOF5 v="Low" />
              <Slew_rate_for_GPIOF5 v="Slow" />
              <Drive_strength_for_GPIOF6 v="Low" />
              <Slew_rate_for_GPIOF6 v="Slow" />
              <Drive_strength_for_GPIOF7 v="Low" />
              <Slew_rate_for_GPIOF7 v="Slow" />
            </group>
            <group name="GPIOF_High">
              <Drive_strength_for_GPIOF8 v="Low" />
              <Slew_rate_for_GPIOF8 v="Slow" />
              <Drive_strength_for_GPIOF9 v="Low" />
              <Slew_rate_for_GPIOF9 v="Slow" />
              <Drive_strength_for_GPIOF10 v="Low" />
              <Slew_rate_for_GPIOF10 v="Slow" />
              <Drive_strength_for_GPIOF11 v="Low" />
              <Slew_rate_for_GPIOF11 v="Slow" />
              <Drive_strength_for_GPIOF12 v="Low" />
              <Slew_rate_for_GPIOF12 v="Slow" />
              <Drive_strength_for_GPIOF13 v="Low" />
              <Slew_rate_for_GPIOF13 v="Slow" />
              <Drive_strength_for_GPIOF14 v="Low" />
              <Slew_rate_for_GPIOF14 v="Slow" />
              <Drive_strength_for_GPIOF15 v="Low" />
              <Slew_rate_for_GPIOF15 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOG module (included)" v="1">
          <group name="GPIOG">
            <group name="GPIOG_Low">
              <Drive_strength_for_GPIOG0 v="Low" />
              <Slew_rate_for_GPIOG0 v="Slow" />
              <Drive_strength_for_GPIOG1 v="Low" />
              <Slew_rate_for_GPIOG1 v="Slow" />
              <Drive_strength_for_GPIOG2 v="Low" />
              <Slew_rate_for_GPIOG2 v="Slow" />
              <Drive_strength_for_GPIOG3 v="Low" />
              <Slew_rate_for_GPIOG3 v="Slow" />
              <Drive_strength_for_GPIOG4 v="Low" />
              <Slew_rate_for_GPIOG4 v="Slow" />
              <Drive_strength_for_GPIOG5 v="Low" />
              <Slew_rate_for_GPIOG5 v="Slow" />
              <Drive_strength_for_GPIOG6 v="Low" />
              <Slew_rate_for_GPIOG6 v="Slow" />
              <Drive_strength_for_GPIOG7 v="Low" />
              <Slew_rate_for_GPIOG7 v="Slow" />
            </group>
            <group name="GPIOG_High">
              <Drive_strength_for_GPIOG8 v="Low" />
              <Slew_rate_for_GPIOG8 v="Slow" />
              <Drive_strength_for_GPIOG9 v="Low" />
              <Slew_rate_for_GPIOG9 v="Slow" />
              <Drive_strength_for_GPIOG10 v="Low" />
              <Slew_rate_for_GPIOG10 v="Slow" />
              <Drive_strength_for_GPIOG11 v="Low" />
              <Slew_rate_for_GPIOG11 v="Slow" />
            </group>
          </group>
        </list>
      </group>
      <group name="CPU interrupts">
        <boolgroup name="Interrupt SW0" v="Disabled" />
        <boolgroup name="Interrupt SW1" v="Disabled" />
        <boolgroup name="Interrupt SW2" v="Disabled" />
        <boolgroup name="Interrupt SW3" v="Disabled" />
        <boolgroup name="Interrupt LP" v="Disabled" />
        <boolgroup name="Interrupt PLL" v="Disabled" />
        <boolgroup name="Interrupt LVI" v="Disabled" />
        <boolgroup name="Interrupt Illegal Instruction" v="Disabled" />
        <boolgroup name="Interrupt Misalign Access" v="Disabled" />
        <boolgroup name="Interrupt HW Stack Overflow" v="Disabled" />
        <list name="MCM module (included)" v="1">
          <boolgroup name="Interrupt Core Fault" v="Disabled" />
        </list>
      </group>
      <list name="Enabled speed modes (included)" v="1">
        <group name="Enabled speed modes">
          <boolgroup name="High speed mode" v="Enabled">
            <Input_clock_source_ v="Internal oscillator 8MHz" />
            <Clock_output_divider__Postscaler_ v="Auto select" />
            <System_clock__IP_Bus___MHz_ v="100" />
            <boolgroup name="PLL clock" v="Enabled">
              <PLL_multiplier v="Auto select" />
              <PLL_clock_frequency v="400" />
              <Enable_PLL_after_reset v="yes" />
              <Number_of_lock_checks v="1" />
            </boolgroup>
          </boolgroup>
          <boolgroup name="Low speed mode" v="Disabled" />
          <boolgroup name="Slow speed mode" v="Disabled" />
        </group>
      </list>
    </Properties>
    <Methods>
      <list name="CPUCond0" v="1">
        <SetHighSpeed v="don&amp;apos;t generate code" />
        <SetLowSpeed v="don&amp;apos;t generate code" />
        <SetSlowSpeed v="don&amp;apos;t generate code" />
        <GetSpeedMode v="don&amp;apos;t generate code" />
        <EnableInt v="generate code" />
        <DisableInt v="generate code" />
        <GetResetSource v="don&amp;apos;t generate code" />
        <SetWaitMode v="generate code" />
        <SetStopMode v="generate code" />
        <GetBusFreqHz v="don&amp;apos;t generate code" />
        <OpenBackDoor v="don&amp;apos;t generate code" />
        <SetFlexRAMFunction v="don&amp;apos;t generate code" />
        <SetFlexNVMPartition v="don&amp;apos;t generate code" />
        <InitShadowRegs v="don&amp;apos;t generate code" />
        <Delay100US v="don&amp;apos;t generate code" />
        <EnablePLL v="don&amp;apos;t generate code" />
      </list>
    </Methods>
    <Events>
      <Event_module_name v="Events" />
      <list name="CPUCond" v="1">
        <event name="OnReset" v="don&amp;apos;t generate code" />
        <event name="OnSwINT0" v="don&amp;apos;t generate code" />
        <event name="OnSwINT1" v="don&amp;apos;t generate code" />
        <event name="OnSwINT2" v="don&amp;apos;t generate code" />
        <event name="OnSwINT3" v="don&amp;apos;t generate code" />
        <event name="OnSwINTLP" v="don&amp;apos;t generate code" />
        <event name="OnPLLError" v="don&amp;apos;t generate code" />
        <event name="OnIllegalOpcode" v="don&amp;apos;t generate code" />
        <event name="OnMisalignData" v="don&amp;apos;t generate code" />
        <event name="OnHWStackError" v="don&amp;apos;t generate code" />
        <event name="OnLVI22" v="don&amp;apos;t generate code" />
        <event name="OnLVI27" v="don&amp;apos;t generate code" />
        <event name="OnCoreFault" v="don&amp;apos;t generate code" />
      </list>
    </Events>
    <Compiler v="CodeWarrior DSP C Compiler" />
    <CompilerProperties>
      <Compiler v="CodeWarrior DSP C Compiler" />
      <PESL_support v="no" />
      <Unhandled_interrupts v="One handler for all" />
      <Unhandled_int_code>
        <StrgList><![CDATA[/* This code can be changed using the CPU bean property "Build Options / Unhandled int code" */
  asm(DEBUGHLT);                       /* Halt the core and placing it in the debug processing state. */
  /* Here should be two NOPs if DEBUGHLT is removed.
  asm(nop);
  asm(nop); */
]]></StrgList>
      </Unhandled_int_code>
      <group name="User initialization">
        <User_data_declarations>
          <StrgList></StrgList>
        </User_data_declarations>
        <User_code_before_PE_initialization>
          <StrgList></StrgList>
        </User_code_before_PE_initialization>
        <User_code_after_PE_initialization>
          <StrgList></StrgList>
        </User_code_after_PE_initialization>
      </group>
      <boolgroup name="Generate debugger files" v="yes">
        <Generate_mem_file v="yes" />
      </boolgroup>
      <boolgroup name="Generate linker file" v="yes">
        <Constants_in_xROM v="no" />
        <xROM_xRAM_mode v="no" />
        <pROM_xRAM_mode v="yes" />
        <Stack_size v="512" />
        <Heap_size v="256" />
        <Set_memory_segments_to_default v="Click to set default &amp;gt;" />
        <Default_memory_for_interrupts v="INTERNAL FLASH" />
        <Default_memory_for_code v="INTERNAL FLASH" />
        <Default_memory_for_data v="INTERNAL RAM" />
        <list name="ROM/RAM Areas" v="4">
          <group name="MemoryArea0">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_Interrupts" />
              <Address v="0" />
              <Size v="222" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
          <group name="MemoryArea1">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_Code" />
              <Address v="520" />
              <Size v="130552" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
          <group name="MemoryArea2">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".x_Data" />
              <Address v="0" />
              <Size v="16384" />
              <Qualifier v="RW" />
            </boolgroup>
          </group>
          <group name="MemoryArea3">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_reserved_FCF" />
              <Address v="512" />
              <Size v="8" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
        </list>
      </boolgroup>
      <list name="System paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="Libraries" v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User directories" v="0">
        <EmptySection_DummyValue />
      </list>
    </CompilerProperties>
  </CPU_Bean>
  <CPU_Bean name="Cpu" type="MC56F84789VLL">
    <Enabled v="N" />
    <Properties>
      <Component_name v="Cpu" />
      <CPU_type v="MC56F84789VLL" />
      <list name="Clock settings (included)" v="1">
        <group name="Clock settings">
          <group name="Internal oscillator">
            <boolgroup name="Internal 32kHz relaxation oscillator (ROSC_32K)" v="Disabled" />
            <boolgroup name="Internal 8MHz relaxation oscillator (ROSC_8M)" v="Enabled">
              <Fast_internal_reference_clock__MHz_ v="8" />
              <boolgroup name="Initialize frequency trim" v="yes">
                <Frequency_trim_value_address v="58412" />
              </boolgroup>
              <boolgroup name="Initialize temperature trim" v="no" />
            </boolgroup>
          </group>
          <boolgroup name="External reference clock" v="Disabled" />
          <group name="Clock protection">
            <Frequency v="Off" />
            <Oscillator v="Off" />
            <Phase_locked_loop v="Off" />
          </group>
        </group>
      </list>
      <list name="Common settings (included)" v="1">
        <group name="Common settings">
          <Initialization_priority v="minimal priority" />
          <Watchdog v="No initialization" />
          <Saturation_mode v="Disabled" />
        </group>
      </list>
      <list name="Initialize shadow registers (included)" v="1">
        <boolgroup name="Initialize shadow registers" v="yes">
          <R0 v="0" />
          <R1 v="0" />
          <R2 v="0" />
          <R3 v="0" />
          <R4 v="0" />
          <R5 v="0" />
          <N v="0" />
          <N3 v="65535" />
          <M01 v="65535" />
        </boolgroup>
      </list>
      <list name="Initialize unused I/O pins (included)" v="1">
        <enumgroup name="Initialize unused I/O pins" v="No initialization">
          <Pull_resistor v="No initialization" />
          <Open_drain v="No initialization" />
          <Output_value v="no initialization" />
          <Include_Reset_pin v="no" />
          <Include_JTAG_pins v="no" />
        </enumgroup>
      </list>
      <group name="Internal peripherals">
        <list name="Shared Reset settings" v="1">
          <boolgroup name="Reset pin" v="Enabled">
            <Reset_Pin v="GPIOD4/RESETB" />
          </boolgroup>
        </list>
        <list name="Flash memory organization (included)" v="1">
          <group name="Flash memory organization">
            <list name="Shared FLASH settings" v="1">
              <group name="FlexNVM settings">
                <FlexNVM_size v="16 kW" />
                <D_flash_size v="16 kW" />
                <EEE_data_size v="0 words" />
                <boolgroup name="FlexRAM" v="Disabled" />
              </group>
            </list>
            <list name="Flash blocks" v="2">
              <group name="Flash block 0">
                <Address v="0" />
                <Size v="131072" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="1024" />
                <Protection_unit_size v="4096" />
              </group>
              <group name="Flash block 1">
                <Address v="32768" />
                <Size v="16384" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="512" />
                <Protection_unit_size v="2048" />
              </group>
            </list>
          </group>
        </list>
        <list name="Flash config settings (included)" v="1">
          <boolgroup name="Flash configuration field" v="Disabled" />
        </list>
        <list name="Memory resource protection (include)" v="1">
          <enumgroup name="Memory resource protection" v="Disabled">
            <EmptySection_DummyValue />
          </enumgroup>
        </list>
        <group name="Peripheral clock rates">
          <QSCI0_clock_rate v="Auto select" />
          <QSCI1_clock_rate v="Auto select" />
          <QSCI2_clock_rate v="Auto select" />
        </group>
        <list name="SIM module (included)" v="1">
          <group name="System integration module">
            <group name="Common CPU settings">
              <WAIT_disable_mode v="Enabled" />
              <STOP_disable_mode v="Enabled" />
              <DMA_disable_mode v="All modes" />
              <OnCE_clock_to_core v="Enabled when core TAP is enabled" />
              <Reset_filter v="Disabled" />
              <Select_master_PIT v="Master 0 and slave 1" />
            </group>
            <group name="Power controls">
              <Regulator_1_2_V_standby v="normal mode" />
              <Regulator_2_7_V_powerdown v="normal mode" />
              <Regulator_2_7_V_standby v="normal mode" />
              <Large_regulator_standby v="normal mode" />
            </group>
            <group name="Clock output selectors">
              <CLKOUT_divide_factor v="Divide by 1" />
              <CLKOUT0_select v="System clock" />
              <boolgroup name="CLKOUT0" v="Disabled" />
              <CLKOUT1_select v="System clock" />
              <boolgroup name="CLKOUT1" v="Disabled" />
            </group>
            <group name="Clock gating control in stop mode">
              <GPIOA_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOB_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOC_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOD_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOE_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOF_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOG_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <CAN_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C0_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI2_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI2_peripheral_clock_in_stop_mode v="Disabled" />
              <DAC_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB0_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB1_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT0_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT1_peripheral_clock_in_stop_mode v="Disabled" />
              <ENC_peripheral_clock_in_stop_mode v="Disabled" />
              <CRC_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC16_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC12_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPA_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPB_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPC_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPD_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
            </group>
            <group name="Clock gating control">
              <GPIOA_peripheral_clock v="Disabled" />
              <GPIOB_peripheral_clock v="Disabled" />
              <GPIOC_peripheral_clock v="Disabled" />
              <GPIOD_peripheral_clock v="Disabled" />
              <GPIOE_peripheral_clock v="Disabled" />
              <GPIOF_peripheral_clock v="Disabled" />
              <GPIOG_peripheral_clock v="Disabled" />
              <Timer_A_Channel_0_peripheral_clock v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock v="Disabled" />
              <Timer_B_Channel_1_peripheral_clock v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock v="Disabled" />
              <CAN_peripheral_clock v="Disabled" />
              <I2C0_peripheral_clock v="Disabled" />
              <I2C1_peripheral_clock v="Disabled" />
              <QSPI0_peripheral_clock v="Disabled" />
              <QSPI1_peripheral_clock v="Disabled" />
              <QSPI2_peripheral_clock v="Disabled" />
              <QSCI0_peripheral_clock v="Disabled" />
              <QSCI1_peripheral_clock v="Disabled" />
              <QSCI2_peripheral_clock v="Disabled" />
              <DAC_peripheral_clock v="Disabled" />
              <PDB0_peripheral_clock v="Disabled" />
              <PDB1_peripheral_clock v="Disabled" />
              <PIT0_peripheral_clock v="Disabled" />
              <PIT1_peripheral_clock v="Disabled" />
              <ENC_peripheral_clock v="Disabled" />
              <CRC_peripheral_clock v="Disabled" />
              <ADC16_peripheral_clock v="Disabled" />
              <ADC12_peripheral_clock v="Disabled" />
              <CMPA_peripheral_clock v="Disabled" />
              <CMPB_peripheral_clock v="Disabled" />
              <CMPC_peripheral_clock v="Disabled" />
              <CMPD_peripheral_clock v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock v="Disabled" />
              <PWM_A_Channel_1_peripheral_clock v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock v="Disabled" />
            </group>
            <group name="Peripheral protection">
              <Power_Mode_Control_Write v="Off" />
              <GPIO_Port_D v="Off" />
              <Peripheral_Clock_Enable v="Off" />
              <GPIO_and_Internal_Peripheral_Select v="Off" />
            </group>
            <boolgroup name="hidden properties" v="Disabled" />
          </group>
        </list>
        <list name="MCM module (included)" v="1">
          <group name="Miscellaneous control module">
            <group name="MRP settings">
              <Program_RAM_Base_Address v="0" />
              <Flash_Base_Address v="0" />
              <Resource_protection v="Disabled" />
              <Register_lock v="Disabled" />
            </group>
            <group name="Core settings">
              <Core_instruction_buffer v="Enabled" />
              <Core_new_shadow_region v="Enabled" />
              <Core_reverse_carry v="Enabled" />
              <_56800EX_instructions v="Enabled" />
            </group>
          </group>
        </list>
        <list name="PMC module (included)" v="1">
          <boolgroup name="Power management controller" v="Enabled">
            <group name="Settings">
              <Voltage_Reference_Buffer v="Disabled" />
              <boolgroup name="Initialize bandgap trim value" v="yes">
                <Trim_value_address v="58413" />
              </boolgroup>
            </group>
          </boolgroup>
        </list>
        <list name="FMC module (included)" v="1">
          <boolgroup name="Flexible memory controller" v="Disabled" />
        </list>
        <list name="GPIOA module (included)" v="1">
          <group name="GPIOA">
            <group name="GPIOA_Low">
              <Drive_strength_for_GPIOA0 v="Low" />
              <Slew_rate_for_GPIOA0 v="Slow" />
              <Drive_strength_for_GPIOA1 v="Low" />
              <Slew_rate_for_GPIOA1 v="Slow" />
              <Drive_strength_for_GPIOA2 v="Low" />
              <Slew_rate_for_GPIOA2 v="Slow" />
              <Drive_strength_for_GPIOA3 v="Low" />
              <Slew_rate_for_GPIOA3 v="Slow" />
              <Drive_strength_for_GPIOA4 v="Low" />
              <Slew_rate_for_GPIOA4 v="Slow" />
              <Drive_strength_for_GPIOA5 v="Low" />
              <Slew_rate_for_GPIOA5 v="Slow" />
              <Drive_strength_for_GPIOA6 v="Low" />
              <Slew_rate_for_GPIOA6 v="Slow" />
              <Drive_strength_for_GPIOA7 v="Low" />
              <Slew_rate_for_GPIOA7 v="Slow" />
            </group>
            <group name="GPIOA_High">
              <Drive_strength_for_GPIOA8 v="Low" />
              <Slew_rate_for_GPIOA8 v="Slow" />
              <Drive_strength_for_GPIOA9 v="Low" />
              <Slew_rate_for_GPIOA9 v="Slow" />
              <Drive_strength_for_GPIOA10 v="Low" />
              <Slew_rate_for_GPIOA10 v="Slow" />
              <Drive_strength_for_GPIOA11 v="Low" />
              <Slew_rate_for_GPIOA11 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOB module (included)" v="1">
          <group name="GPIOB">
            <group name="GPIOB_Low">
              <Drive_strength_for_GPIOB0 v="Low" />
              <Slew_rate_for_GPIOB0 v="Slow" />
              <Drive_strength_for_GPIOB1 v="Low" />
              <Slew_rate_for_GPIOB1 v="Slow" />
              <Drive_strength_for_GPIOB2 v="Low" />
              <Slew_rate_for_GPIOB2 v="Slow" />
              <Drive_strength_for_GPIOB3 v="Low" />
              <Slew_rate_for_GPIOB3 v="Slow" />
              <Drive_strength_for_GPIOB4 v="Low" />
              <Slew_rate_for_GPIOB4 v="Slow" />
              <Drive_strength_for_GPIOB5 v="Low" />
              <Slew_rate_for_GPIOB5 v="Slow" />
              <Drive_strength_for_GPIOB6 v="Low" />
              <Slew_rate_for_GPIOB6 v="Slow" />
              <Drive_strength_for_GPIOB7 v="Low" />
              <Slew_rate_for_GPIOB7 v="Slow" />
            </group>
            <group name="GPIOB_High">
              <Drive_strength_for_GPIOB8 v="Low" />
              <Slew_rate_for_GPIOB8 v="Slow" />
              <Drive_strength_for_GPIOB9 v="Low" />
              <Slew_rate_for_GPIOB9 v="Slow" />
              <Drive_strength_for_GPIOB10 v="Low" />
              <Slew_rate_for_GPIOB10 v="Slow" />
              <Drive_strength_for_GPIOB11 v="Low" />
              <Slew_rate_for_GPIOB11 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOC module (included)" v="1">
          <group name="GPIOC">
            <group name="GPIOC_Low">
              <Drive_strength_for_GPIOC0 v="Low" />
              <Slew_rate_for_GPIOC0 v="Slow" />
              <Drive_strength_for_GPIOC1 v="Low" />
              <Slew_rate_for_GPIOC1 v="Slow" />
              <Drive_strength_for_GPIOC2 v="Low" />
              <Slew_rate_for_GPIOC2 v="Slow" />
              <Drive_strength_for_GPIOC3 v="Low" />
              <Slew_rate_for_GPIOC3 v="Slow" />
              <Drive_strength_for_GPIOC4 v="Low" />
              <Slew_rate_for_GPIOC4 v="Slow" />
              <Drive_strength_for_GPIOC5 v="Low" />
              <Slew_rate_for_GPIOC5 v="Slow" />
              <Drive_strength_for_GPIOC6 v="Low" />
              <Slew_rate_for_GPIOC6 v="Slow" />
              <Drive_strength_for_GPIOC7 v="Low" />
              <Slew_rate_for_GPIOC7 v="Slow" />
            </group>
            <group name="GPIOC_High">
              <Drive_strength_for_GPIOC8 v="Low" />
              <Slew_rate_for_GPIOC8 v="Slow" />
              <Drive_strength_for_GPIOC9 v="Low" />
              <Slew_rate_for_GPIOC9 v="Slow" />
              <Drive_strength_for_GPIOC10 v="Low" />
              <Slew_rate_for_GPIOC10 v="Slow" />
              <Drive_strength_for_GPIOC11 v="Low" />
              <Slew_rate_for_GPIOC11 v="Slow" />
              <Drive_strength_for_GPIOC12 v="Low" />
              <Slew_rate_for_GPIOC12 v="Slow" />
              <Drive_strength_for_GPIOC13 v="Low" />
              <Slew_rate_for_GPIOC13 v="Slow" />
              <Drive_strength_for_GPIOC14 v="Low" />
              <Slew_rate_for_GPIOC14 v="Slow" />
              <Drive_strength_for_GPIOC15 v="Low" />
              <Slew_rate_for_GPIOC15 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOD module (included)" v="1">
          <group name="GPIOD">
            <Drive_strength_for_GPIOD0 v="Low" />
            <Slew_rate_for_GPIOD0 v="Slow" />
            <Drive_strength_for_GPIOD1 v="Low" />
            <Slew_rate_for_GPIOD1 v="Fast" />
            <Drive_strength_for_GPIOD2 v="Low" />
            <Slew_rate_for_GPIOD2 v="Slow" />
            <Drive_strength_for_GPIOD3 v="Low" />
            <Slew_rate_for_GPIOD3 v="Fast" />
            <Drive_strength_for_GPIOD4 v="Low" />
            <Slew_rate_for_GPIOD4 v="Slow" />
            <Drive_strength_for_GPIOD5 v="Low" />
            <Slew_rate_for_GPIOD5 v="Slow" />
            <Drive_strength_for_GPIOD6 v="Low" />
            <Slew_rate_for_GPIOD6 v="Slow" />
            <Drive_strength_for_GPIOD7 v="Low" />
            <Slew_rate_for_GPIOD7 v="Slow" />
          </group>
        </list>
        <list name="GPIOE module (included)" v="1">
          <group name="GPIOE">
            <group name="GPIOE_Low">
              <Drive_strength_for_GPIOE0 v="Low" />
              <Slew_rate_for_GPIOE0 v="Slow" />
              <Drive_strength_for_GPIOE1 v="Low" />
              <Slew_rate_for_GPIOE1 v="Slow" />
              <Drive_strength_for_GPIOE2 v="Low" />
              <Slew_rate_for_GPIOE2 v="Slow" />
              <Drive_strength_for_GPIOE3 v="Low" />
              <Slew_rate_for_GPIOE3 v="Slow" />
              <Drive_strength_for_GPIOE4 v="Low" />
              <Slew_rate_for_GPIOE4 v="Slow" />
              <Drive_strength_for_GPIOE5 v="Low" />
              <Slew_rate_for_GPIOE5 v="Slow" />
              <Drive_strength_for_GPIOE6 v="Low" />
              <Slew_rate_for_GPIOE6 v="Slow" />
              <Drive_strength_for_GPIOE7 v="Low" />
              <Slew_rate_for_GPIOE7 v="Slow" />
            </group>
            <group name="GPIOE_High">
              <Drive_strength_for_GPIOE8 v="Low" />
              <Slew_rate_for_GPIOE8 v="Slow" />
              <Drive_strength_for_GPIOE9 v="Low" />
              <Slew_rate_for_GPIOE9 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOF module (included)" v="1">
          <group name="GPIOF">
            <group name="GPIOF_Low">
              <Drive_strength_for_GPIOF0 v="Low" />
              <Slew_rate_for_GPIOF0 v="Slow" />
              <Drive_strength_for_GPIOF1 v="Low" />
              <Slew_rate_for_GPIOF1 v="Slow" />
              <Drive_strength_for_GPIOF2 v="Low" />
              <Slew_rate_for_GPIOF2 v="Slow" />
              <Drive_strength_for_GPIOF3 v="Low" />
              <Slew_rate_for_GPIOF3 v="Slow" />
              <Drive_strength_for_GPIOF4 v="Low" />
              <Slew_rate_for_GPIOF4 v="Slow" />
              <Drive_strength_for_GPIOF5 v="Low" />
              <Slew_rate_for_GPIOF5 v="Slow" />
              <Drive_strength_for_GPIOF6 v="Low" />
              <Slew_rate_for_GPIOF6 v="Slow" />
              <Drive_strength_for_GPIOF7 v="Low" />
              <Slew_rate_for_GPIOF7 v="Slow" />
            </group>
            <group name="GPIOF_High">
              <Drive_strength_for_GPIOF8 v="Low" />
              <Slew_rate_for_GPIOF8 v="Slow" />
              <Drive_strength_for_GPIOF9 v="Low" />
              <Slew_rate_for_GPIOF9 v="Slow" />
              <Drive_strength_for_GPIOF10 v="Low" />
              <Slew_rate_for_GPIOF10 v="Slow" />
              <Drive_strength_for_GPIOF11 v="Low" />
              <Slew_rate_for_GPIOF11 v="Slow" />
              <Drive_strength_for_GPIOF12 v="Low" />
              <Slew_rate_for_GPIOF12 v="Slow" />
              <Drive_strength_for_GPIOF13 v="Low" />
              <Slew_rate_for_GPIOF13 v="Slow" />
              <Drive_strength_for_GPIOF14 v="Low" />
              <Slew_rate_for_GPIOF14 v="Slow" />
              <Drive_strength_for_GPIOF15 v="Low" />
              <Slew_rate_for_GPIOF15 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOG module (included)" v="1">
          <group name="GPIOG">
            <group name="GPIOG_Low">
              <Drive_strength_for_GPIOG0 v="Low" />
              <Slew_rate_for_GPIOG0 v="Slow" />
              <Drive_strength_for_GPIOG1 v="Low" />
              <Slew_rate_for_GPIOG1 v="Slow" />
              <Drive_strength_for_GPIOG2 v="Low" />
              <Slew_rate_for_GPIOG2 v="Slow" />
              <Drive_strength_for_GPIOG3 v="Low" />
              <Slew_rate_for_GPIOG3 v="Slow" />
              <Drive_strength_for_GPIOG4 v="Low" />
              <Slew_rate_for_GPIOG4 v="Slow" />
              <Drive_strength_for_GPIOG5 v="Low" />
              <Slew_rate_for_GPIOG5 v="Slow" />
              <Drive_strength_for_GPIOG6 v="Low" />
              <Slew_rate_for_GPIOG6 v="Slow" />
              <Drive_strength_for_GPIOG7 v="Low" />
              <Slew_rate_for_GPIOG7 v="Slow" />
            </group>
            <group name="GPIOG_High">
              <Drive_strength_for_GPIOG8 v="Low" />
              <Slew_rate_for_GPIOG8 v="Slow" />
              <Drive_strength_for_GPIOG9 v="Low" />
              <Slew_rate_for_GPIOG9 v="Slow" />
              <Drive_strength_for_GPIOG10 v="Low" />
              <Slew_rate_for_GPIOG10 v="Slow" />
              <Drive_strength_for_GPIOG11 v="Low" />
              <Slew_rate_for_GPIOG11 v="Slow" />
            </group>
          </group>
        </list>
      </group>
      <group name="CPU interrupts">
        <boolgroup name="Interrupt SW0" v="Disabled" />
        <boolgroup name="Interrupt SW1" v="Disabled" />
        <boolgroup name="Interrupt SW2" v="Disabled" />
        <boolgroup name="Interrupt SW3" v="Disabled" />
        <boolgroup name="Interrupt LP" v="Disabled" />
        <boolgroup name="Interrupt PLL" v="Disabled" />
        <boolgroup name="Interrupt LVI" v="Disabled" />
        <boolgroup name="Interrupt Illegal Instruction" v="Disabled" />
        <boolgroup name="Interrupt Misalign Access" v="Disabled" />
        <boolgroup name="Interrupt HW Stack Overflow" v="Disabled" />
        <list name="MCM module (included)" v="1">
          <boolgroup name="Interrupt Core Fault" v="Disabled" />
        </list>
      </group>
      <list name="Enabled speed modes (included)" v="1">
        <group name="Enabled speed modes">
          <boolgroup name="High speed mode" v="Enabled">
            <Input_clock_source_ v="Internal oscillator 8MHz" />
            <Clock_output_divider__Postscaler_ v="Auto select" />
            <System_clock__IP_Bus___MHz_ v="100" />
            <boolgroup name="PLL clock" v="Enabled">
              <PLL_multiplier v="Auto select" />
              <PLL_clock_frequency v="400" />
              <Enable_PLL_after_reset v="yes" />
              <Number_of_lock_checks v="1" />
            </boolgroup>
          </boolgroup>
          <boolgroup name="Low speed mode" v="Disabled" />
          <boolgroup name="Slow speed mode" v="Disabled" />
        </group>
      </list>
    </Properties>
    <Methods>
      <list name="CPUCond0" v="1">
        <SetHighSpeed v="don&amp;apos;t generate code" />
        <SetLowSpeed v="don&amp;apos;t generate code" />
        <SetSlowSpeed v="don&amp;apos;t generate code" />
        <GetSpeedMode v="don&amp;apos;t generate code" />
        <EnableInt v="generate code" />
        <DisableInt v="generate code" />
        <GetResetSource v="don&amp;apos;t generate code" />
        <SetWaitMode v="generate code" />
        <SetStopMode v="generate code" />
        <GetBusFreqHz v="don&amp;apos;t generate code" />
        <OpenBackDoor v="don&amp;apos;t generate code" />
        <SetFlexRAMFunction v="don&amp;apos;t generate code" />
        <SetFlexNVMPartition v="don&amp;apos;t generate code" />
        <InitShadowRegs v="don&amp;apos;t generate code" />
        <Delay100US v="don&amp;apos;t generate code" />
        <EnablePLL v="don&amp;apos;t generate code" />
      </list>
    </Methods>
    <Events>
      <Event_module_name v="Events" />
      <list name="CPUCond" v="1">
        <event name="OnReset" v="don&amp;apos;t generate code" />
        <event name="OnSwINT0" v="don&amp;apos;t generate code" />
        <event name="OnSwINT1" v="don&amp;apos;t generate code" />
        <event name="OnSwINT2" v="don&amp;apos;t generate code" />
        <event name="OnSwINT3" v="don&amp;apos;t generate code" />
        <event name="OnSwINTLP" v="don&amp;apos;t generate code" />
        <event name="OnPLLError" v="don&amp;apos;t generate code" />
        <event name="OnIllegalOpcode" v="don&amp;apos;t generate code" />
        <event name="OnMisalignData" v="don&amp;apos;t generate code" />
        <event name="OnHWStackError" v="don&amp;apos;t generate code" />
        <event name="OnLVI22" v="don&amp;apos;t generate code" />
        <event name="OnLVI27" v="don&amp;apos;t generate code" />
        <event name="OnCoreFault" v="don&amp;apos;t generate code" />
      </list>
    </Events>
    <Compiler v="CodeWarrior DSP C Compiler" />
    <CompilerProperties>
      <Compiler v="CodeWarrior DSP C Compiler" />
      <Unhandled_interrupts v="One handler for all" />
      <Unhandled_int_code>
        <StrgList><![CDATA[/* This code can be changed using the CPU bean property "Build Options / Unhandled int code" */
  asm(DEBUGHLT);                       /* Halt the core and placing it in the debug processing state. */
  /* Here should be two NOPs if DEBUGHLT is removed.
  asm(nop);
  asm(nop); */
]]></StrgList>
      </Unhandled_int_code>
      <boolgroup name="Generate debugger files" v="yes">
        <Generate_mem_file v="yes" />
      </boolgroup>
      <boolgroup name="Generate linker file" v="yes">
        <Constants_in_xROM v="no" />
        <xROM_xRAM_mode v="no" />
        <pROM_xRAM_mode v="yes" />
        <boolgroup name="Serial bootloader support" v="no" />
        <Stack_size v="512" />
        <Heap_size v="256" />
        <list name="ROM/RAM Areas" v="4">
          <group name="MemoryArea0">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_Interrupts" />
              <Address v="0" />
              <Size v="222" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
          <group name="MemoryArea1">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_Code" />
              <Address v="520" />
              <Size v="130552" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
          <group name="MemoryArea2">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".x_Data" />
              <Address v="0" />
              <Size v="16384" />
              <Qualifier v="RW" />
            </boolgroup>
          </group>
          <group name="MemoryArea3">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_reserved_FCF" />
              <Address v="512" />
              <Size v="8" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
        </list>
      </boolgroup>
      <list name="System paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="Libraries" v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User directories" v="0">
        <EmptySection_DummyValue />
      </list>
    </CompilerProperties>
  </CPU_Bean>
  <Bean name="DAC" type="Init_DAC">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="DAC" />
      <Device v="DAC" />
      <group name="Settings">
        <Glitch_filter v="Enabled" />
        <Glitch_filter_count_bits v="24" />
        <Up_counting v="Disabled" />
        <Down_counting v="Disabled" />
        <Automatic_mode v="Disabled" />
        <Data_word_justification v="Right" />
        <High_speed_low_speed v="High speed" />
        <DMA_enable v="Disabled" />
        <Watermark_level v="2 samples" />
      </group>
      <group name="Pins">
        <boolgroup name="Output pin" v="Enabled">
          <Analog_output_pin v="GPIOC5/DACO/XB_IN7" />
        </boolgroup>
        <enumgroup name="Synchronous mode" v="Disabled">
          <EmptySection_DummyValue />
        </enumgroup>
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Power_down v="no" />
        <Enable_peripheral_clock v="yes" />
        <DAC_data_register_value v="2047" />
        <DAC_minimum_register_value v="0" />
        <DAC_maximum_register_value v="4095" />
        <DAC_step_size_register_value v="0" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="CMPD" type="Init_HSCMP">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="CMPD" />
      <Device v="CMPD" />
      <group name="Settings">
        <Sample v="Disabled" />
        <Windowing v="Disabled" />
        <Filter_sample_count v="0" />
        <Filter_sample_period v="0" />
        <Sampling_period v="STOP" />
        <Invert_control v="Do NOT invert" />
        <Comparator_output_select v="Unfiltered" />
        <Power_mode v="Power saving" />
        <Hysteresis_control v="Level 0" />
      </group>
      <group name="Pins/Signals">
        <boolgroup name="Positive input pins" v="Enabled">
          <boolgroup name="Positive input pin0" v="Disabled" />
          <boolgroup name="Positive input pin1" v="Disabled" />
          <boolgroup name="Positive input pin2" v="Disabled" />
          <boolgroup name="Positive input pin3" v="Disabled" />
          <boolgroup name="Positive input pin4" v="Enabled">
            <Positive_input_pin4 v="DAC12b_Output" />
          </boolgroup>
          <boolgroup name="Positive input pin5" v="Disabled" />
          <boolgroup name="Positive input pin7" v="Disabled" />
        </boolgroup>
        <boolgroup name="Negative input pins" v="Enabled">
          <boolgroup name="Negative input pin0" v="Enabled">
            <Negative_input_pin0 v="GPIOA4/ANA4/ANC8/CMPD_IN0" />
          </boolgroup>
          <boolgroup name="Negative input pin1" v="Disabled" />
          <boolgroup name="Negative input pin2" v="Disabled" />
          <boolgroup name="Negative input pin3" v="Disabled" />
          <boolgroup name="Negative input pin4" v="Disabled" />
          <boolgroup name="Negative input pin5" v="Disabled" />
          <boolgroup name="Negative input pin7" v="Disabled" />
        </boolgroup>
        <boolgroup name="Window/Sample input" v="Disabled" />
        <boolgroup name="Output pin" v="Enabled">
          <Comparator_output_pin v="GPIOF1/CLKO1/XB_IN7/CMPD_O" />
        </boolgroup>
      </group>
      <group name="Interrupts/DMA">
        <group name="Rising or Falling compare">
          <Interrupt v="INT_CMPD" />
          <Interrupt_priority v="default" />
          <ISR_name v="" />
          <Rising_compare_interrupt v="Disabled" />
          <Falling_compare_interrupt v="Disabled" />
        </group>
      </group>
      <group name="Initialization">
        <Comparator_module v="Enabled" />
        <Initial_positive_input v="P4" />
        <Initial_negative_input v="M0" />
        <Enable_peripheral_clock v="yes" />
        <Call_Init_method v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="PWMA" type="Init_eFlexPWM">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="PWMA" />
      <Device v="PWMA" />
      <group name="Settings">
        <boolgroup name="Submodule 0" v="Enabled">
          <group name="Clock setting">
            <PWM_clock_source v="IP Bus clock" />
            <PWM_generator_clock v="Enabled" />
            <PWM_prescaler v="2" />
            <Module_clock v="50 MHz" />
            <Init_counter_value v="60536" />
            <PWM_value_0___half_cycle_point v="0" />
            <PWM_value_1___counter_modulo v="4999" />
            <Fractional_circuit_power_up v="Disabled" />
            <Fractional_value_1_circuit v="Disabled" />
            <Fractional_value_1 v="0" />
            <Dead_time_value_0 v="100" />
            <Dead_time_value_1 v="100" />
            <PWM_frequency v="5.0000 kHz" />
            <PWM_period v="200.0000 us" />
            <PWM_dead_time_0 v="1 us" />
            <PWM_dead_time_1 v="1 us" />
          </group>
          <Enabled_in_Wait_mode v="no" />
          <Enabled_in_Debug_mode v="no" />
          <group name="Channel settings">
            <Mode_of_PWM_ch_A_and_B v="Complementary" />
            <Complementary_PWM_source v="PWM23" />
            <Double_switching v="Disabled" />
            <group name="Channel A (PWM23)">
              <group name="PWM function">
                <PWM_value_2 v="63036" />
                <Fractional_value_2_and_3_circuit v="Disabled" />
                <Fractional_value_2 v="0" />
                <PWM_value_3 v="2499" />
                <Fractional_value_3 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Enabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_A v="Raw PWMA input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel B (PWM45)">
              <group name="PWM function">
                <PWM_value_4 v="0" />
                <Fractional_value_4_and_5_circuit v="Disabled" />
                <Fractional_value_4 v="0" />
                <PWM_value_5 v="0" />
                <Fractional_value_5 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Enabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_B v="Raw PWMB input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel X (PWM01)">
              <group name="PWM function">
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <X_Double_switching v="Disabled" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_X v="Raw PWMX input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
          </group>
          <group name="Output trigger settings">
            <Output_trigger_0_source_select v="OUT_TRIG0 signal" />
            <Output_trigger_1_source_select v="OUT_TRIG1 signal" />
            <group name="OUT_TRIG0 signal settings">
              <Output_trigger_for_Val_0 v="Disabled" />
              <Output_trigger_for_Val_2 v="Disabled" />
              <Output_trigger_for_Val_4 v="Disabled" />
            </group>
            <group name="OUT_TRIG1 signal settings">
              <Output_trigger_for_Val_1 v="Disabled" />
              <Output_trigger_for_Val_3 v="Disabled" />
              <Output_trigger_for_Val_5 v="Disabled" />
            </group>
          </group>
          <group name="Reload settings">
            <Reload_source v="Local reload signal" />
            <Reload_frequency v="1" />
            <Half_cycle_reload v="Disabled" />
            <Full_cycle_reload v="Enabled" />
            <Load_mode v="Load at next PWM reload if LDOK is set" />
          </group>
          <group name="Force and initialization settings">
            <Initialization_source v="Local sync signal" />
            <Force_initialization v="Disabled" />
            <Force_source v="Local force signal" />
            <Init_value_ch_A v="Low" />
            <Init_value_ch_B v="Low" />
            <Init_value_ch_X v="Low" />
          </group>
        </boolgroup>
        <boolgroup name="Submodule 1" v="Disabled" />
        <boolgroup name="Submodule 2" v="Disabled" />
        <boolgroup name="Submodule 3" v="Disabled" />
        <group name="Fault channel 0 protection settings">
          <group name="Common fault settings">
            <boolgroup name="Input filter" v="Disabled" />
            <Fault_Glitch_Stretch v="Disabled" />
          </group>
          <group name="Fault 0">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Automatic" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="yes" />
          </group>
          <group name="Fault 1">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 2">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 3">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
        </group>
        <group name="Fault channel 1 protection settings">
          <group name="Common fault settings">
            <boolgroup name="Input filter" v="Disabled" />
            <Fault_Glitch_Stretch v="Disabled" />
          </group>
          <group name="Fault 0">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 1">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 2">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 3">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
        </group>
      </group>
      <group name="Pins">
        <boolgroup name="SM0 pins" v="Disabled" />
        <boolgroup name="SM1 pins" v="Disabled" />
        <boolgroup name="SM2 pins" v="Disabled" />
        <boolgroup name="SM3 pins" v="Disabled" />
        <group name="PWM Faults">
          <group name="Fault channel 0">
            <boolgroup name="Fault 0" v="Disabled" />
            <boolgroup name="Fault 1" v="Disabled" />
            <boolgroup name="Fault 2" v="Disabled" />
            <boolgroup name="Fault 3" v="Disabled" />
          </group>
          <group name="Fault channel 1">
            <boolgroup name="Fault 4" v="Disabled" />
            <boolgroup name="Fault 5" v="Disabled" />
            <boolgroup name="Fault 6" v="Disabled" />
            <boolgroup name="Fault 7" v="Disabled" />
          </group>
        </group>
        <group name="External clock">
          <boolgroup name="External clock" v="Disabled" />
          <External_clock_frequency v="1" />
        </group>
        <boolgroup name="External force" v="Disabled" />
      </group>
      <group name="Interrupts/DMA">
        <boolgroup name="SM0 Interrupts/DMA" v="Disabled" />
        <boolgroup name="SM1 Interrupts/DMA" v="Disabled" />
        <boolgroup name="SM2 Interrupts/DMA" v="Disabled" />
        <boolgroup name="SM3 Interrupts/DMA" v="Disabled" />
        <group name="Fault interrupt">
          <Interrupt v="INT_eFlexPWMA_FAULT" />
          <Interrupt_priority v="default" />
          <ISR_Name v="" />
          <Channel_0_fault_0_interrupt v="Disabled" />
          <Channel_0_fault_1_interrupt v="Disabled" />
          <Channel_0_fault_2_interrupt v="Disabled" />
          <Channel_0_fault_3_interrupt v="Disabled" />
          <Channel_1_Fault_0_interrupt v="Disabled" />
          <Channel_1_Fault_1_interrupt v="Disabled" />
          <Channel_1_Fault_2_interrupt v="Disabled" />
          <Channel_1_Fault_3_interrupt v="Disabled" />
        </group>
      </group>
      <group name="Initialization">
        <Load_values_after_init_into_SM0 v="yes" />
        <Load_values_after_init_into_SM1 v="no" />
        <Load_values_after_init_into_SM2 v="no" />
        <Load_values_after_init_into_SM3 v="no" />
        <Enable_peripheral_clock_for_SM0 v="yes" />
        <Enable_peripheral_clock_for_SM1 v="no" />
        <Enable_peripheral_clock_for_SM2 v="no" />
        <Enable_peripheral_clock_for_SM3 v="no" />
        <Fault_channel_0_test v="No simulated fault" />
        <Fault_channel_1_test v="No simulated fault" />
        <group name="Fault flag clearing">
          <Fault_channel_0_flag_0 v="Clear" />
          <Fault_channel_0_flag_1 v="Clear" />
          <Fault_channel_0_flag_2 v="Clear" />
          <Fault_channel_0_flag_3 v="Clear" />
          <Fault_channel_1_flag_0 v="Clear" />
          <Fault_channel_1_flag_1 v="Clear" />
          <Fault_channel_1_flag_2 v="Clear" />
          <Fault_channel_1_flag_3 v="Clear" />
        </group>
        <Monitor_PLL_mode v="Do not monitor PLL" />
        <Call_Init_method v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
</PE_PROJECT_SETTINGS_DOCUMENTATION>

