<?xml version="1.0" encoding="UTF-8"?>
<PE_PROJECT_SETTINGS_DOCUMENTATION>
  <PE_product_version v="version 10.3 for Freescale Microcontrollers" />
  <PE_core_version v="Processor Expert Version 0509" />
  <CPU_Bean name="Cpu" type="MC56F84789VLL">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="Cpu" />
      <CPU_type v="MC56F84789VLL" />
      <list name="Clock settings (included)" v="1">
        <group name="Clock settings">
          <group name="Internal oscillator">
            <boolgroup name="Internal 32kHz relaxation oscillator (ROSC_32K)" v="Disabled" />
            <boolgroup name="Internal 8MHz relaxation oscillator (ROSC_8M)" v="Enabled">
              <Fast_internal_reference_clock__MHz_ v="8" />
              <boolgroup name="Initialize frequency trim" v="yes">
                <Frequency_trim_value_address v="58412" />
              </boolgroup>
              <boolgroup name="Initialize temperature trim" v="no" />
            </boolgroup>
          </group>
          <boolgroup name="External reference clock" v="Disabled" />
          <group name="Clock protection">
            <Frequency v="Off" />
            <Oscillator v="Off" />
            <Phase_locked_loop v="Off" />
          </group>
        </group>
      </list>
      <list name="Common settings (included)" v="1">
        <group name="Common settings">
          <Initialization_priority v="minimal priority" />
          <Watchdog v="Disabled" />
          <Saturation_mode v="Disabled" />
        </group>
      </list>
      <list name="Initialize shadow registers (included)" v="1">
        <boolgroup name="Initialize shadow registers" v="yes">
          <R0 v="0" />
          <R1 v="0" />
          <R2 v="0" />
          <R3 v="0" />
          <R4 v="0" />
          <R5 v="0" />
          <N v="0" />
          <N3 v="65535" />
          <M01 v="65535" />
        </boolgroup>
      </list>
      <list name="Initialize unused I/O pins (included)" v="1">
        <enumgroup name="Initialize unused I/O pins" v="No initialization">
          <Pull_resistor v="No initialization" />
          <Open_drain v="No initialization" />
          <Output_value v="no initialization" />
          <Include_Reset_pin v="no" />
          <Include_JTAG_pins v="no" />
        </enumgroup>
      </list>
      <group name="Internal peripherals">
        <list name="Shared Reset settings" v="1">
          <boolgroup name="Reset pin" v="Enabled">
            <Reset_Pin v="GPIOD4/RESETB" />
          </boolgroup>
        </list>
        <list name="Flash memory organization (included)" v="1">
          <group name="Flash memory organization">
            <list name="Shared FLASH settings" v="1">
              <group name="FlexNVM settings">
                <FlexNVM_size v="16 kW" />
                <D_flash_size v="16 kW" />
                <EEE_data_size v="0 words" />
                <boolgroup name="FlexRAM" v="Enabled">
                  <Start v="122880" />
                  <Size v="1024" />
                </boolgroup>
              </group>
            </list>
            <list name="Flash blocks" v="2">
              <group name="Flash block 0">
                <Address v="0" />
                <Size v="131072" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="1024" />
                <Protection_unit_size v="4096" />
              </group>
              <group name="Flash block 1">
                <Address v="32768" />
                <Size v="16384" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="512" />
                <Protection_unit_size v="2048" />
              </group>
            </list>
          </group>
        </list>
        <list name="Flash config settings (included)" v="1">
          <boolgroup name="Flash configuration field" v="Disabled" />
        </list>
        <list name="Memory resource protection (include)" v="1">
          <enumgroup name="Memory resource protection" v="Disabled">
            <EmptySection_DummyValue />
          </enumgroup>
        </list>
        <group name="Peripheral clock rates">
          <QSCI0_clock_rate v="Auto select" />
          <QSCI1_clock_rate v="Auto select" />
          <QSCI2_clock_rate v="Auto select" />
        </group>
        <list name="SIM module (included)" v="1">
          <group name="System integration module">
            <group name="Common CPU settings">
              <WAIT_disable_mode v="Enabled" />
              <STOP_disable_mode v="Enabled" />
              <DMA_disable_mode v="All modes" />
              <OnCE_clock_to_core v="Enabled when core TAP is enabled" />
              <Reset_filter v="Disabled" />
              <Select_master_PIT v="Master 0 and slave 1" />
            </group>
            <group name="Power controls">
              <Regulator_1_2_V_standby v="normal mode" />
              <Regulator_2_7_V_powerdown v="normal mode" />
              <Regulator_2_7_V_standby v="normal mode" />
              <Large_regulator_standby v="normal mode" />
            </group>
            <group name="Clock output selectors">
              <CLKOUT_divide_factor v="Divide by 1" />
              <CLKOUT0_select v="System clock" />
              <boolgroup name="CLKOUT0" v="Disabled" />
              <CLKOUT1_select v="System clock" />
              <boolgroup name="CLKOUT1" v="Disabled" />
            </group>
            <group name="Clock gating control in stop mode">
              <GPIOA_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOB_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOC_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOD_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOE_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOF_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOG_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <CAN_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C0_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI2_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI2_peripheral_clock_in_stop_mode v="Disabled" />
              <DAC_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB0_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB1_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT0_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT1_peripheral_clock_in_stop_mode v="Disabled" />
              <ENC_peripheral_clock_in_stop_mode v="Disabled" />
              <CRC_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC16_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC12_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPA_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPB_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPC_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPD_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
            </group>
            <group name="Clock gating control">
              <GPIOA_peripheral_clock v="Disabled" />
              <GPIOB_peripheral_clock v="Disabled" />
              <GPIOC_peripheral_clock v="Enabled" />
              <GPIOD_peripheral_clock v="Enabled" />
              <GPIOE_peripheral_clock v="Disabled" />
              <GPIOF_peripheral_clock v="Enabled" />
              <GPIOG_peripheral_clock v="Enabled" />
              <Timer_A_Channel_0_peripheral_clock v="Enabled" />
              <Timer_A_Channel_1_peripheral_clock v="Enabled" />
              <Timer_A_Channel_2_peripheral_clock v="Enabled" />
              <Timer_A_Channel_3_peripheral_clock v="Enabled" />
              <Timer_B_Channel_0_peripheral_clock v="Enabled" />
              <Timer_B_Channel_1_peripheral_clock v="Enabled" />
              <Timer_B_Channel_2_peripheral_clock v="Enabled" />
              <Timer_B_Channel_3_peripheral_clock v="Enabled" />
              <CAN_peripheral_clock v="Disabled" />
              <I2C0_peripheral_clock v="Disabled" />
              <I2C1_peripheral_clock v="Disabled" />
              <QSPI0_peripheral_clock v="Disabled" />
              <QSPI1_peripheral_clock v="Disabled" />
              <QSPI2_peripheral_clock v="Disabled" />
              <QSCI0_peripheral_clock v="Disabled" />
              <QSCI1_peripheral_clock v="Enabled" />
              <QSCI2_peripheral_clock v="Disabled" />
              <DAC_peripheral_clock v="Disabled" />
              <PDB0_peripheral_clock v="Disabled" />
              <PDB1_peripheral_clock v="Disabled" />
              <PIT0_peripheral_clock v="Disabled" />
              <PIT1_peripheral_clock v="Disabled" />
              <ENC_peripheral_clock v="Disabled" />
              <CRC_peripheral_clock v="Disabled" />
              <ADC16_peripheral_clock v="Disabled" />
              <ADC12_peripheral_clock v="Enabled" />
              <CMPA_peripheral_clock v="Disabled" />
              <CMPB_peripheral_clock v="Disabled" />
              <CMPC_peripheral_clock v="Disabled" />
              <CMPD_peripheral_clock v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock v="Enabled" />
              <PWM_A_Channel_1_peripheral_clock v="Enabled" />
              <PWM_A_Channel_2_peripheral_clock v="Enabled" />
              <PWM_A_Channel_3_peripheral_clock v="Enabled" />
              <PWM_B_Channel_0_peripheral_clock v="Enabled" />
              <PWM_B_Channel_1_peripheral_clock v="Enabled" />
              <PWM_B_Channel_2_peripheral_clock v="Enabled" />
              <PWM_B_Channel_3_peripheral_clock v="Enabled" />
            </group>
            <group name="Peripheral protection">
              <Power_Mode_Control_Write v="Off" />
              <GPIO_Port_D v="Off" />
              <Peripheral_Clock_Enable v="Off" />
              <GPIO_and_Internal_Peripheral_Select v="Off" />
            </group>
          </group>
        </list>
        <list name="MCM module (included)" v="1">
          <group name="Miscellaneous control module">
            <group name="MRP settings">
              <Program_RAM_Base_Address v="0" />
              <Flash_Base_Address v="0" />
              <Resource_protection v="Disabled" />
              <Register_lock v="Disabled" />
            </group>
            <group name="Core settings">
              <Core_instruction_buffer v="Enabled" />
              <Core_new_shadow_region v="Enabled" />
              <Core_reverse_carry v="Enabled" />
              <_56800EX_instructions v="Enabled" />
            </group>
          </group>
        </list>
        <list name="PMC module (included)" v="1">
          <boolgroup name="Power management controller" v="Enabled">
            <group name="Settings">
              <Voltage_Reference_Buffer v="Disabled" />
              <boolgroup name="Initialize bandgap trim value" v="yes">
                <Trim_value_address v="58413" />
              </boolgroup>
            </group>
          </boolgroup>
        </list>
        <list name="FMC module (included)" v="1">
          <boolgroup name="Flexible memory controller" v="Disabled" />
        </list>
        <list name="GPIOA module (included)" v="1">
          <group name="GPIOA">
            <group name="GPIOA_Low">
              <Drive_strength_for_GPIOA0 v="Low" />
              <Slew_rate_for_GPIOA0 v="Slow" />
              <Drive_strength_for_GPIOA1 v="Low" />
              <Slew_rate_for_GPIOA1 v="Slow" />
              <Drive_strength_for_GPIOA2 v="Low" />
              <Slew_rate_for_GPIOA2 v="Slow" />
              <Drive_strength_for_GPIOA3 v="Low" />
              <Slew_rate_for_GPIOA3 v="Slow" />
              <Drive_strength_for_GPIOA4 v="Low" />
              <Slew_rate_for_GPIOA4 v="Slow" />
              <Drive_strength_for_GPIOA5 v="Low" />
              <Slew_rate_for_GPIOA5 v="Slow" />
              <Drive_strength_for_GPIOA6 v="Low" />
              <Slew_rate_for_GPIOA6 v="Slow" />
              <Drive_strength_for_GPIOA7 v="Low" />
              <Slew_rate_for_GPIOA7 v="Slow" />
            </group>
            <group name="GPIOA_High">
              <Drive_strength_for_GPIOA8 v="Low" />
              <Slew_rate_for_GPIOA8 v="Slow" />
              <Drive_strength_for_GPIOA9 v="Low" />
              <Slew_rate_for_GPIOA9 v="Slow" />
              <Drive_strength_for_GPIOA10 v="Low" />
              <Slew_rate_for_GPIOA10 v="Slow" />
              <Drive_strength_for_GPIOA11 v="Low" />
              <Slew_rate_for_GPIOA11 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOB module (included)" v="1">
          <group name="GPIOB">
            <group name="GPIOB_Low">
              <Drive_strength_for_GPIOB0 v="Low" />
              <Slew_rate_for_GPIOB0 v="Slow" />
              <Drive_strength_for_GPIOB1 v="Low" />
              <Slew_rate_for_GPIOB1 v="Slow" />
              <Drive_strength_for_GPIOB2 v="Low" />
              <Slew_rate_for_GPIOB2 v="Slow" />
              <Drive_strength_for_GPIOB3 v="Low" />
              <Slew_rate_for_GPIOB3 v="Slow" />
              <Drive_strength_for_GPIOB4 v="Low" />
              <Slew_rate_for_GPIOB4 v="Slow" />
              <Drive_strength_for_GPIOB5 v="Low" />
              <Slew_rate_for_GPIOB5 v="Slow" />
              <Drive_strength_for_GPIOB6 v="Low" />
              <Slew_rate_for_GPIOB6 v="Slow" />
              <Drive_strength_for_GPIOB7 v="Low" />
              <Slew_rate_for_GPIOB7 v="Slow" />
            </group>
            <group name="GPIOB_High">
              <Drive_strength_for_GPIOB8 v="Low" />
              <Slew_rate_for_GPIOB8 v="Slow" />
              <Drive_strength_for_GPIOB9 v="Low" />
              <Slew_rate_for_GPIOB9 v="Slow" />
              <Drive_strength_for_GPIOB10 v="Low" />
              <Slew_rate_for_GPIOB10 v="Slow" />
              <Drive_strength_for_GPIOB11 v="Low" />
              <Slew_rate_for_GPIOB11 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOC module (included)" v="1">
          <group name="GPIOC">
            <group name="GPIOC_Low">
              <Drive_strength_for_GPIOC0 v="Low" />
              <Slew_rate_for_GPIOC0 v="Slow" />
              <Drive_strength_for_GPIOC1 v="Low" />
              <Slew_rate_for_GPIOC1 v="Slow" />
              <Drive_strength_for_GPIOC2 v="Low" />
              <Slew_rate_for_GPIOC2 v="Slow" />
              <Drive_strength_for_GPIOC3 v="Low" />
              <Slew_rate_for_GPIOC3 v="Slow" />
              <Drive_strength_for_GPIOC4 v="Low" />
              <Slew_rate_for_GPIOC4 v="Slow" />
              <Drive_strength_for_GPIOC5 v="Low" />
              <Slew_rate_for_GPIOC5 v="Slow" />
              <Drive_strength_for_GPIOC6 v="Low" />
              <Slew_rate_for_GPIOC6 v="Slow" />
              <Drive_strength_for_GPIOC7 v="Low" />
              <Slew_rate_for_GPIOC7 v="Slow" />
            </group>
            <group name="GPIOC_High">
              <Drive_strength_for_GPIOC8 v="Low" />
              <Slew_rate_for_GPIOC8 v="Slow" />
              <Drive_strength_for_GPIOC9 v="Low" />
              <Slew_rate_for_GPIOC9 v="Slow" />
              <Drive_strength_for_GPIOC10 v="Low" />
              <Slew_rate_for_GPIOC10 v="Slow" />
              <Drive_strength_for_GPIOC11 v="Low" />
              <Slew_rate_for_GPIOC11 v="Slow" />
              <Drive_strength_for_GPIOC12 v="Low" />
              <Slew_rate_for_GPIOC12 v="Slow" />
              <Drive_strength_for_GPIOC13 v="Low" />
              <Slew_rate_for_GPIOC13 v="Slow" />
              <Drive_strength_for_GPIOC14 v="Low" />
              <Slew_rate_for_GPIOC14 v="Slow" />
              <Drive_strength_for_GPIOC15 v="Low" />
              <Slew_rate_for_GPIOC15 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOD module (included)" v="1">
          <group name="GPIOD">
            <Drive_strength_for_GPIOD0 v="Low" />
            <Slew_rate_for_GPIOD0 v="Slow" />
            <Drive_strength_for_GPIOD1 v="Low" />
            <Slew_rate_for_GPIOD1 v="Fast" />
            <Drive_strength_for_GPIOD2 v="Low" />
            <Slew_rate_for_GPIOD2 v="Slow" />
            <Drive_strength_for_GPIOD3 v="Low" />
            <Slew_rate_for_GPIOD3 v="Fast" />
            <Drive_strength_for_GPIOD4 v="Low" />
            <Slew_rate_for_GPIOD4 v="Slow" />
            <Drive_strength_for_GPIOD5 v="Low" />
            <Slew_rate_for_GPIOD5 v="Slow" />
            <Drive_strength_for_GPIOD6 v="Low" />
            <Slew_rate_for_GPIOD6 v="Slow" />
            <Drive_strength_for_GPIOD7 v="Low" />
            <Slew_rate_for_GPIOD7 v="Slow" />
          </group>
        </list>
        <list name="GPIOE module (included)" v="1">
          <group name="GPIOE">
            <group name="GPIOE_Low">
              <Drive_strength_for_GPIOE0 v="Low" />
              <Slew_rate_for_GPIOE0 v="Slow" />
              <Drive_strength_for_GPIOE1 v="Low" />
              <Slew_rate_for_GPIOE1 v="Slow" />
              <Drive_strength_for_GPIOE2 v="Low" />
              <Slew_rate_for_GPIOE2 v="Slow" />
              <Drive_strength_for_GPIOE3 v="Low" />
              <Slew_rate_for_GPIOE3 v="Slow" />
              <Drive_strength_for_GPIOE4 v="Low" />
              <Slew_rate_for_GPIOE4 v="Slow" />
              <Drive_strength_for_GPIOE5 v="Low" />
              <Slew_rate_for_GPIOE5 v="Slow" />
              <Drive_strength_for_GPIOE6 v="Low" />
              <Slew_rate_for_GPIOE6 v="Slow" />
              <Drive_strength_for_GPIOE7 v="Low" />
              <Slew_rate_for_GPIOE7 v="Slow" />
            </group>
            <group name="GPIOE_High">
              <Drive_strength_for_GPIOE8 v="Low" />
              <Slew_rate_for_GPIOE8 v="Slow" />
              <Drive_strength_for_GPIOE9 v="Low" />
              <Slew_rate_for_GPIOE9 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOF module (included)" v="1">
          <group name="GPIOF">
            <group name="GPIOF_Low">
              <Drive_strength_for_GPIOF0 v="Low" />
              <Slew_rate_for_GPIOF0 v="Slow" />
              <Drive_strength_for_GPIOF1 v="Low" />
              <Slew_rate_for_GPIOF1 v="Slow" />
              <Drive_strength_for_GPIOF2 v="Low" />
              <Slew_rate_for_GPIOF2 v="Slow" />
              <Drive_strength_for_GPIOF3 v="Low" />
              <Slew_rate_for_GPIOF3 v="Slow" />
              <Drive_strength_for_GPIOF4 v="Low" />
              <Slew_rate_for_GPIOF4 v="Slow" />
              <Drive_strength_for_GPIOF5 v="Low" />
              <Slew_rate_for_GPIOF5 v="Slow" />
              <Drive_strength_for_GPIOF6 v="Low" />
              <Slew_rate_for_GPIOF6 v="Slow" />
              <Drive_strength_for_GPIOF7 v="Low" />
              <Slew_rate_for_GPIOF7 v="Slow" />
            </group>
            <group name="GPIOF_High">
              <Drive_strength_for_GPIOF8 v="Low" />
              <Slew_rate_for_GPIOF8 v="Slow" />
              <Drive_strength_for_GPIOF9 v="Low" />
              <Slew_rate_for_GPIOF9 v="Slow" />
              <Drive_strength_for_GPIOF10 v="Low" />
              <Slew_rate_for_GPIOF10 v="Slow" />
              <Drive_strength_for_GPIOF11 v="Low" />
              <Slew_rate_for_GPIOF11 v="Slow" />
              <Drive_strength_for_GPIOF12 v="Low" />
              <Slew_rate_for_GPIOF12 v="Slow" />
              <Drive_strength_for_GPIOF13 v="Low" />
              <Slew_rate_for_GPIOF13 v="Slow" />
              <Drive_strength_for_GPIOF14 v="Low" />
              <Slew_rate_for_GPIOF14 v="Slow" />
              <Drive_strength_for_GPIOF15 v="Low" />
              <Slew_rate_for_GPIOF15 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOG module (included)" v="1">
          <group name="GPIOG">
            <group name="GPIOG_Low">
              <Drive_strength_for_GPIOG0 v="Low" />
              <Slew_rate_for_GPIOG0 v="Slow" />
              <Drive_strength_for_GPIOG1 v="Low" />
              <Slew_rate_for_GPIOG1 v="Slow" />
              <Drive_strength_for_GPIOG2 v="Low" />
              <Slew_rate_for_GPIOG2 v="Slow" />
              <Drive_strength_for_GPIOG3 v="Low" />
              <Slew_rate_for_GPIOG3 v="Slow" />
              <Drive_strength_for_GPIOG4 v="Low" />
              <Slew_rate_for_GPIOG4 v="Slow" />
              <Drive_strength_for_GPIOG5 v="Low" />
              <Slew_rate_for_GPIOG5 v="Slow" />
              <Drive_strength_for_GPIOG6 v="Low" />
              <Slew_rate_for_GPIOG6 v="Slow" />
              <Drive_strength_for_GPIOG7 v="Low" />
              <Slew_rate_for_GPIOG7 v="Slow" />
            </group>
            <group name="GPIOG_High">
              <Drive_strength_for_GPIOG8 v="Low" />
              <Slew_rate_for_GPIOG8 v="Slow" />
              <Drive_strength_for_GPIOG9 v="Low" />
              <Slew_rate_for_GPIOG9 v="Slow" />
              <Drive_strength_for_GPIOG10 v="Low" />
              <Slew_rate_for_GPIOG10 v="Slow" />
              <Drive_strength_for_GPIOG11 v="Low" />
              <Slew_rate_for_GPIOG11 v="Slow" />
            </group>
          </group>
        </list>
      </group>
      <group name="CPU interrupts">
        <boolgroup name="Interrupt SW0" v="Disabled" />
        <boolgroup name="Interrupt SW1" v="Disabled" />
        <boolgroup name="Interrupt SW2" v="Disabled" />
        <boolgroup name="Interrupt SW3" v="Disabled" />
        <boolgroup name="Interrupt LP" v="Disabled" />
        <boolgroup name="Interrupt PLL" v="Disabled" />
        <boolgroup name="Interrupt LVI" v="Disabled" />
        <boolgroup name="Interrupt Illegal Instruction" v="Disabled" />
        <boolgroup name="Interrupt Misalign Access" v="Disabled" />
        <boolgroup name="Interrupt HW Stack Overflow" v="Disabled" />
        <list name="MCM module (included)" v="1">
          <boolgroup name="Interrupt Core Fault" v="Disabled" />
        </list>
      </group>
      <list name="Enabled speed modes (included)" v="1">
        <group name="Enabled speed modes">
          <boolgroup name="High speed mode" v="Enabled">
            <Input_clock_source_ v="Internal oscillator 8MHz" />
            <Clock_output_divider__Postscaler_ v="Auto select" />
            <System_clock__IP_Bus___MHz_ v="100" />
            <boolgroup name="PLL clock" v="Enabled">
              <PLL_multiplier v="Auto select" />
              <PLL_clock_frequency v="400" />
              <Enable_PLL_after_reset v="yes" />
              <Number_of_lock_checks v="1" />
            </boolgroup>
          </boolgroup>
          <boolgroup name="Low speed mode" v="Disabled" />
          <boolgroup name="Slow speed mode" v="Disabled" />
        </group>
      </list>
    </Properties>
    <Methods>
      <list name="CPUCond0" v="1">
        <SetHighSpeed v="don&amp;apos;t generate code" />
        <SetLowSpeed v="don&amp;apos;t generate code" />
        <SetSlowSpeed v="don&amp;apos;t generate code" />
        <GetSpeedMode v="don&amp;apos;t generate code" />
        <EnableInt v="generate code" />
        <DisableInt v="generate code" />
        <GetResetSource v="don&amp;apos;t generate code" />
        <SetWaitMode v="generate code" />
        <SetStopMode v="generate code" />
        <GetBusFreqHz v="don&amp;apos;t generate code" />
        <OpenBackDoor v="don&amp;apos;t generate code" />
        <SetFlexRAMFunction v="don&amp;apos;t generate code" />
        <SetFlexNVMPartition v="don&amp;apos;t generate code" />
        <InitShadowRegs v="don&amp;apos;t generate code" />
        <Delay100US v="generate code" />
        <EnablePLL v="don&amp;apos;t generate code" />
      </list>
    </Methods>
    <Events>
      <Event_module_name v="Events" />
      <list name="CPUCond" v="1">
        <event name="OnReset" v="don&amp;apos;t generate code" />
        <event name="OnSwINT0" v="don&amp;apos;t generate code" />
        <event name="OnSwINT1" v="don&amp;apos;t generate code" />
        <event name="OnSwINT2" v="don&amp;apos;t generate code" />
        <event name="OnSwINT3" v="don&amp;apos;t generate code" />
        <event name="OnSwINTLP" v="don&amp;apos;t generate code" />
        <event name="OnPLLError" v="don&amp;apos;t generate code" />
        <event name="OnIllegalOpcode" v="don&amp;apos;t generate code" />
        <event name="OnMisalignData" v="don&amp;apos;t generate code" />
        <event name="OnHWStackError" v="don&amp;apos;t generate code" />
        <event name="OnLVI22" v="don&amp;apos;t generate code" />
        <event name="OnLVI27" v="don&amp;apos;t generate code" />
        <event name="OnCoreFault" v="don&amp;apos;t generate code" />
      </list>
    </Events>
    <Compiler v="CodeWarrior DSP C Compiler" />
    <CompilerProperties>
      <Compiler v="CodeWarrior DSP C Compiler" />
      <PESL_support v="no" />
      <Unhandled_interrupts v="One handler for all" />
      <Unhandled_int_code>
        <StrgList><![CDATA[/* This code can be changed using the CPU bean property "Build Options / Unhandled int code" */
  asm(DEBUGHLT);                       /* Halt the core and placing it in the debug processing state. */
  /* Here should be two NOPs if DEBUGHLT is removed.
  asm(nop);
  asm(nop); */
]]></StrgList>
      </Unhandled_int_code>
      <group name="User initialization">
        <User_data_declarations>
          <StrgList></StrgList>
        </User_data_declarations>
        <User_code_before_PE_initialization>
          <StrgList></StrgList>
        </User_code_before_PE_initialization>
        <User_code_after_PE_initialization>
          <StrgList></StrgList>
        </User_code_after_PE_initialization>
      </group>
      <boolgroup name="Generate debugger files" v="yes">
        <Generate_mem_file v="yes" />
      </boolgroup>
      <boolgroup name="Generate linker file" v="no" />
      <list name="System paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="Libraries" v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User directories" v="0">
        <EmptySection_DummyValue />
      </list>
    </CompilerProperties>
  </CPU_Bean>
  <CPU_Bean name="Cpu" type="MC56F84789VLL">
    <Enabled v="N" />
    <Properties>
      <Component_name v="Cpu" />
      <CPU_type v="MC56F84789VLL" />
      <list name="Clock settings (included)" v="1">
        <group name="Clock settings">
          <group name="Internal oscillator">
            <boolgroup name="Internal 32kHz relaxation oscillator (ROSC_32K)" v="Disabled" />
            <boolgroup name="Internal 8MHz relaxation oscillator (ROSC_8M)" v="Enabled">
              <Fast_internal_reference_clock__MHz_ v="8" />
              <boolgroup name="Initialize frequency trim" v="yes">
                <Frequency_trim_value_address v="58412" />
              </boolgroup>
              <boolgroup name="Initialize temperature trim" v="no" />
            </boolgroup>
          </group>
          <boolgroup name="External reference clock" v="Disabled" />
          <group name="Clock protection">
            <Frequency v="Off" />
            <Oscillator v="Off" />
            <Phase_locked_loop v="Off" />
          </group>
        </group>
      </list>
      <list name="Common settings (included)" v="1">
        <group name="Common settings">
          <Initialization_priority v="minimal priority" />
          <Watchdog v="No initialization" />
          <Saturation_mode v="Disabled" />
        </group>
      </list>
      <list name="Initialize shadow registers (included)" v="1">
        <boolgroup name="Initialize shadow registers" v="yes">
          <R0 v="0" />
          <R1 v="0" />
          <R2 v="0" />
          <R3 v="0" />
          <R4 v="0" />
          <R5 v="0" />
          <N v="0" />
          <N3 v="65535" />
          <M01 v="65535" />
        </boolgroup>
      </list>
      <list name="Initialize unused I/O pins (included)" v="1">
        <enumgroup name="Initialize unused I/O pins" v="No initialization">
          <Pull_resistor v="No initialization" />
          <Open_drain v="No initialization" />
          <Output_value v="no initialization" />
          <Include_Reset_pin v="no" />
          <Include_JTAG_pins v="no" />
        </enumgroup>
      </list>
      <group name="Internal peripherals">
        <list name="Shared Reset settings" v="1">
          <boolgroup name="Reset pin" v="Enabled">
            <Reset_Pin v="GPIOD4/RESETB" />
          </boolgroup>
        </list>
        <list name="Flash memory organization (included)" v="1">
          <group name="Flash memory organization">
            <list name="Shared FLASH settings" v="1">
              <group name="FlexNVM settings">
                <FlexNVM_size v="16 kW" />
                <D_flash_size v="16 kW" />
                <EEE_data_size v="0 words" />
                <boolgroup name="FlexRAM" v="Disabled" />
              </group>
            </list>
            <list name="Flash blocks" v="2">
              <group name="Flash block 0">
                <Address v="0" />
                <Size v="131072" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="1024" />
                <Protection_unit_size v="4096" />
              </group>
              <group name="Flash block 1">
                <Address v="32768" />
                <Size v="16384" />
                <Write_unit_size v="2" />
                <Erase_unit_size v="512" />
                <Protection_unit_size v="2048" />
              </group>
            </list>
          </group>
        </list>
        <list name="Flash config settings (included)" v="1">
          <boolgroup name="Flash configuration field" v="Disabled" />
        </list>
        <list name="Memory resource protection (include)" v="1">
          <enumgroup name="Memory resource protection" v="Disabled">
            <EmptySection_DummyValue />
          </enumgroup>
        </list>
        <group name="Peripheral clock rates">
          <QSCI0_clock_rate v="Auto select" />
          <QSCI1_clock_rate v="Auto select" />
          <QSCI2_clock_rate v="Auto select" />
        </group>
        <list name="SIM module (included)" v="1">
          <group name="System integration module">
            <group name="Common CPU settings">
              <WAIT_disable_mode v="Enabled" />
              <STOP_disable_mode v="Enabled" />
              <DMA_disable_mode v="All modes" />
              <OnCE_clock_to_core v="Enabled when core TAP is enabled" />
              <Reset_filter v="Disabled" />
              <Select_master_PIT v="Master 0 and slave 1" />
            </group>
            <group name="Power controls">
              <Regulator_1_2_V_standby v="normal mode" />
              <Regulator_2_7_V_powerdown v="normal mode" />
              <Regulator_2_7_V_standby v="normal mode" />
              <Large_regulator_standby v="normal mode" />
            </group>
            <group name="Clock output selectors">
              <CLKOUT_divide_factor v="Divide by 1" />
              <CLKOUT0_select v="System clock" />
              <boolgroup name="CLKOUT0" v="Disabled" />
              <CLKOUT1_select v="System clock" />
              <boolgroup name="CLKOUT1" v="Disabled" />
            </group>
            <group name="Clock gating control in stop mode">
              <GPIOA_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOB_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOC_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOD_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOE_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOF_peripheral_clock_in_stop_mode v="Disabled" />
              <GPIOG_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <CAN_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C0_peripheral_clock_in_stop_mode v="Disabled" />
              <I2C1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSPI2_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI0_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI1_peripheral_clock_in_stop_mode v="Disabled" />
              <QSCI2_peripheral_clock_in_stop_mode v="Disabled" />
              <DAC_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB0_peripheral_clock_in_stop_mode v="Disabled" />
              <PDB1_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT0_peripheral_clock_in_stop_mode v="Disabled" />
              <PIT1_peripheral_clock_in_stop_mode v="Disabled" />
              <ENC_peripheral_clock_in_stop_mode v="Disabled" />
              <CRC_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC16_peripheral_clock_in_stop_mode v="Disabled" />
              <ADC12_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPA_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPB_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPC_peripheral_clock_in_stop_mode v="Disabled" />
              <CMPD_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock_in_stop_mode v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock_in_stop_mode v="Disabled" />
            </group>
            <group name="Clock gating control">
              <GPIOA_peripheral_clock v="Disabled" />
              <GPIOB_peripheral_clock v="Disabled" />
              <GPIOC_peripheral_clock v="Disabled" />
              <GPIOD_peripheral_clock v="Disabled" />
              <GPIOE_peripheral_clock v="Disabled" />
              <GPIOF_peripheral_clock v="Disabled" />
              <GPIOG_peripheral_clock v="Disabled" />
              <Timer_A_Channel_0_peripheral_clock v="Disabled" />
              <Timer_A_Channel_1_peripheral_clock v="Disabled" />
              <Timer_A_Channel_2_peripheral_clock v="Disabled" />
              <Timer_A_Channel_3_peripheral_clock v="Disabled" />
              <Timer_B_Channel_0_peripheral_clock v="Disabled" />
              <Timer_B_Channel_1_peripheral_clock v="Disabled" />
              <Timer_B_Channel_2_peripheral_clock v="Disabled" />
              <Timer_B_Channel_3_peripheral_clock v="Disabled" />
              <CAN_peripheral_clock v="Disabled" />
              <I2C0_peripheral_clock v="Disabled" />
              <I2C1_peripheral_clock v="Disabled" />
              <QSPI0_peripheral_clock v="Disabled" />
              <QSPI1_peripheral_clock v="Disabled" />
              <QSPI2_peripheral_clock v="Disabled" />
              <QSCI0_peripheral_clock v="Disabled" />
              <QSCI1_peripheral_clock v="Disabled" />
              <QSCI2_peripheral_clock v="Disabled" />
              <DAC_peripheral_clock v="Disabled" />
              <PDB0_peripheral_clock v="Disabled" />
              <PDB1_peripheral_clock v="Disabled" />
              <PIT0_peripheral_clock v="Disabled" />
              <PIT1_peripheral_clock v="Disabled" />
              <ENC_peripheral_clock v="Disabled" />
              <CRC_peripheral_clock v="Disabled" />
              <ADC16_peripheral_clock v="Disabled" />
              <ADC12_peripheral_clock v="Disabled" />
              <CMPA_peripheral_clock v="Disabled" />
              <CMPB_peripheral_clock v="Disabled" />
              <CMPC_peripheral_clock v="Disabled" />
              <CMPD_peripheral_clock v="Disabled" />
              <PWM_A_Channel_0_peripheral_clock v="Disabled" />
              <PWM_A_Channel_1_peripheral_clock v="Disabled" />
              <PWM_A_Channel_2_peripheral_clock v="Disabled" />
              <PWM_A_Channel_3_peripheral_clock v="Disabled" />
              <PWM_B_Channel_0_peripheral_clock v="Disabled" />
              <PWM_B_Channel_1_peripheral_clock v="Disabled" />
              <PWM_B_Channel_2_peripheral_clock v="Disabled" />
              <PWM_B_Channel_3_peripheral_clock v="Disabled" />
            </group>
            <group name="Peripheral protection">
              <Power_Mode_Control_Write v="Off" />
              <GPIO_Port_D v="Off" />
              <Peripheral_Clock_Enable v="Off" />
              <GPIO_and_Internal_Peripheral_Select v="Off" />
            </group>
            <boolgroup name="hidden properties" v="Disabled" />
          </group>
        </list>
        <list name="MCM module (included)" v="1">
          <group name="Miscellaneous control module">
            <group name="MRP settings">
              <Program_RAM_Base_Address v="0" />
              <Flash_Base_Address v="0" />
              <Resource_protection v="Disabled" />
              <Register_lock v="Disabled" />
            </group>
            <group name="Core settings">
              <Core_instruction_buffer v="Enabled" />
              <Core_new_shadow_region v="Enabled" />
              <Core_reverse_carry v="Enabled" />
              <_56800EX_instructions v="Enabled" />
            </group>
          </group>
        </list>
        <list name="PMC module (included)" v="1">
          <boolgroup name="Power management controller" v="Enabled">
            <group name="Settings">
              <Voltage_Reference_Buffer v="Disabled" />
              <boolgroup name="Initialize bandgap trim value" v="yes">
                <Trim_value_address v="58413" />
              </boolgroup>
            </group>
          </boolgroup>
        </list>
        <list name="FMC module (included)" v="1">
          <boolgroup name="Flexible memory controller" v="Disabled" />
        </list>
        <list name="GPIOA module (included)" v="1">
          <group name="GPIOA">
            <group name="GPIOA_Low">
              <Drive_strength_for_GPIOA0 v="Low" />
              <Slew_rate_for_GPIOA0 v="Slow" />
              <Drive_strength_for_GPIOA1 v="Low" />
              <Slew_rate_for_GPIOA1 v="Slow" />
              <Drive_strength_for_GPIOA2 v="Low" />
              <Slew_rate_for_GPIOA2 v="Slow" />
              <Drive_strength_for_GPIOA3 v="Low" />
              <Slew_rate_for_GPIOA3 v="Slow" />
              <Drive_strength_for_GPIOA4 v="Low" />
              <Slew_rate_for_GPIOA4 v="Slow" />
              <Drive_strength_for_GPIOA5 v="Low" />
              <Slew_rate_for_GPIOA5 v="Slow" />
              <Drive_strength_for_GPIOA6 v="Low" />
              <Slew_rate_for_GPIOA6 v="Slow" />
              <Drive_strength_for_GPIOA7 v="Low" />
              <Slew_rate_for_GPIOA7 v="Slow" />
            </group>
            <group name="GPIOA_High">
              <Drive_strength_for_GPIOA8 v="Low" />
              <Slew_rate_for_GPIOA8 v="Slow" />
              <Drive_strength_for_GPIOA9 v="Low" />
              <Slew_rate_for_GPIOA9 v="Slow" />
              <Drive_strength_for_GPIOA10 v="Low" />
              <Slew_rate_for_GPIOA10 v="Slow" />
              <Drive_strength_for_GPIOA11 v="Low" />
              <Slew_rate_for_GPIOA11 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOB module (included)" v="1">
          <group name="GPIOB">
            <group name="GPIOB_Low">
              <Drive_strength_for_GPIOB0 v="Low" />
              <Slew_rate_for_GPIOB0 v="Slow" />
              <Drive_strength_for_GPIOB1 v="Low" />
              <Slew_rate_for_GPIOB1 v="Slow" />
              <Drive_strength_for_GPIOB2 v="Low" />
              <Slew_rate_for_GPIOB2 v="Slow" />
              <Drive_strength_for_GPIOB3 v="Low" />
              <Slew_rate_for_GPIOB3 v="Slow" />
              <Drive_strength_for_GPIOB4 v="Low" />
              <Slew_rate_for_GPIOB4 v="Slow" />
              <Drive_strength_for_GPIOB5 v="Low" />
              <Slew_rate_for_GPIOB5 v="Slow" />
              <Drive_strength_for_GPIOB6 v="Low" />
              <Slew_rate_for_GPIOB6 v="Slow" />
              <Drive_strength_for_GPIOB7 v="Low" />
              <Slew_rate_for_GPIOB7 v="Slow" />
            </group>
            <group name="GPIOB_High">
              <Drive_strength_for_GPIOB8 v="Low" />
              <Slew_rate_for_GPIOB8 v="Slow" />
              <Drive_strength_for_GPIOB9 v="Low" />
              <Slew_rate_for_GPIOB9 v="Slow" />
              <Drive_strength_for_GPIOB10 v="Low" />
              <Slew_rate_for_GPIOB10 v="Slow" />
              <Drive_strength_for_GPIOB11 v="Low" />
              <Slew_rate_for_GPIOB11 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOC module (included)" v="1">
          <group name="GPIOC">
            <group name="GPIOC_Low">
              <Drive_strength_for_GPIOC0 v="Low" />
              <Slew_rate_for_GPIOC0 v="Slow" />
              <Drive_strength_for_GPIOC1 v="Low" />
              <Slew_rate_for_GPIOC1 v="Slow" />
              <Drive_strength_for_GPIOC2 v="Low" />
              <Slew_rate_for_GPIOC2 v="Slow" />
              <Drive_strength_for_GPIOC3 v="Low" />
              <Slew_rate_for_GPIOC3 v="Slow" />
              <Drive_strength_for_GPIOC4 v="Low" />
              <Slew_rate_for_GPIOC4 v="Slow" />
              <Drive_strength_for_GPIOC5 v="Low" />
              <Slew_rate_for_GPIOC5 v="Slow" />
              <Drive_strength_for_GPIOC6 v="Low" />
              <Slew_rate_for_GPIOC6 v="Slow" />
              <Drive_strength_for_GPIOC7 v="Low" />
              <Slew_rate_for_GPIOC7 v="Slow" />
            </group>
            <group name="GPIOC_High">
              <Drive_strength_for_GPIOC8 v="Low" />
              <Slew_rate_for_GPIOC8 v="Slow" />
              <Drive_strength_for_GPIOC9 v="Low" />
              <Slew_rate_for_GPIOC9 v="Slow" />
              <Drive_strength_for_GPIOC10 v="Low" />
              <Slew_rate_for_GPIOC10 v="Slow" />
              <Drive_strength_for_GPIOC11 v="Low" />
              <Slew_rate_for_GPIOC11 v="Slow" />
              <Drive_strength_for_GPIOC12 v="Low" />
              <Slew_rate_for_GPIOC12 v="Slow" />
              <Drive_strength_for_GPIOC13 v="Low" />
              <Slew_rate_for_GPIOC13 v="Slow" />
              <Drive_strength_for_GPIOC14 v="Low" />
              <Slew_rate_for_GPIOC14 v="Slow" />
              <Drive_strength_for_GPIOC15 v="Low" />
              <Slew_rate_for_GPIOC15 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOD module (included)" v="1">
          <group name="GPIOD">
            <Drive_strength_for_GPIOD0 v="Low" />
            <Slew_rate_for_GPIOD0 v="Slow" />
            <Drive_strength_for_GPIOD1 v="Low" />
            <Slew_rate_for_GPIOD1 v="Fast" />
            <Drive_strength_for_GPIOD2 v="Low" />
            <Slew_rate_for_GPIOD2 v="Slow" />
            <Drive_strength_for_GPIOD3 v="Low" />
            <Slew_rate_for_GPIOD3 v="Fast" />
            <Drive_strength_for_GPIOD4 v="Low" />
            <Slew_rate_for_GPIOD4 v="Slow" />
            <Drive_strength_for_GPIOD5 v="Low" />
            <Slew_rate_for_GPIOD5 v="Slow" />
            <Drive_strength_for_GPIOD6 v="Low" />
            <Slew_rate_for_GPIOD6 v="Slow" />
            <Drive_strength_for_GPIOD7 v="Low" />
            <Slew_rate_for_GPIOD7 v="Slow" />
          </group>
        </list>
        <list name="GPIOE module (included)" v="1">
          <group name="GPIOE">
            <group name="GPIOE_Low">
              <Drive_strength_for_GPIOE0 v="Low" />
              <Slew_rate_for_GPIOE0 v="Slow" />
              <Drive_strength_for_GPIOE1 v="Low" />
              <Slew_rate_for_GPIOE1 v="Slow" />
              <Drive_strength_for_GPIOE2 v="Low" />
              <Slew_rate_for_GPIOE2 v="Slow" />
              <Drive_strength_for_GPIOE3 v="Low" />
              <Slew_rate_for_GPIOE3 v="Slow" />
              <Drive_strength_for_GPIOE4 v="Low" />
              <Slew_rate_for_GPIOE4 v="Slow" />
              <Drive_strength_for_GPIOE5 v="Low" />
              <Slew_rate_for_GPIOE5 v="Slow" />
              <Drive_strength_for_GPIOE6 v="Low" />
              <Slew_rate_for_GPIOE6 v="Slow" />
              <Drive_strength_for_GPIOE7 v="Low" />
              <Slew_rate_for_GPIOE7 v="Slow" />
            </group>
            <group name="GPIOE_High">
              <Drive_strength_for_GPIOE8 v="Low" />
              <Slew_rate_for_GPIOE8 v="Slow" />
              <Drive_strength_for_GPIOE9 v="Low" />
              <Slew_rate_for_GPIOE9 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOF module (included)" v="1">
          <group name="GPIOF">
            <group name="GPIOF_Low">
              <Drive_strength_for_GPIOF0 v="Low" />
              <Slew_rate_for_GPIOF0 v="Slow" />
              <Drive_strength_for_GPIOF1 v="Low" />
              <Slew_rate_for_GPIOF1 v="Slow" />
              <Drive_strength_for_GPIOF2 v="Low" />
              <Slew_rate_for_GPIOF2 v="Slow" />
              <Drive_strength_for_GPIOF3 v="Low" />
              <Slew_rate_for_GPIOF3 v="Slow" />
              <Drive_strength_for_GPIOF4 v="Low" />
              <Slew_rate_for_GPIOF4 v="Slow" />
              <Drive_strength_for_GPIOF5 v="Low" />
              <Slew_rate_for_GPIOF5 v="Slow" />
              <Drive_strength_for_GPIOF6 v="Low" />
              <Slew_rate_for_GPIOF6 v="Slow" />
              <Drive_strength_for_GPIOF7 v="Low" />
              <Slew_rate_for_GPIOF7 v="Slow" />
            </group>
            <group name="GPIOF_High">
              <Drive_strength_for_GPIOF8 v="Low" />
              <Slew_rate_for_GPIOF8 v="Slow" />
              <Drive_strength_for_GPIOF9 v="Low" />
              <Slew_rate_for_GPIOF9 v="Slow" />
              <Drive_strength_for_GPIOF10 v="Low" />
              <Slew_rate_for_GPIOF10 v="Slow" />
              <Drive_strength_for_GPIOF11 v="Low" />
              <Slew_rate_for_GPIOF11 v="Slow" />
              <Drive_strength_for_GPIOF12 v="Low" />
              <Slew_rate_for_GPIOF12 v="Slow" />
              <Drive_strength_for_GPIOF13 v="Low" />
              <Slew_rate_for_GPIOF13 v="Slow" />
              <Drive_strength_for_GPIOF14 v="Low" />
              <Slew_rate_for_GPIOF14 v="Slow" />
              <Drive_strength_for_GPIOF15 v="Low" />
              <Slew_rate_for_GPIOF15 v="Slow" />
            </group>
          </group>
        </list>
        <list name="GPIOG module (included)" v="1">
          <group name="GPIOG">
            <group name="GPIOG_Low">
              <Drive_strength_for_GPIOG0 v="Low" />
              <Slew_rate_for_GPIOG0 v="Slow" />
              <Drive_strength_for_GPIOG1 v="Low" />
              <Slew_rate_for_GPIOG1 v="Slow" />
              <Drive_strength_for_GPIOG2 v="Low" />
              <Slew_rate_for_GPIOG2 v="Slow" />
              <Drive_strength_for_GPIOG3 v="Low" />
              <Slew_rate_for_GPIOG3 v="Slow" />
              <Drive_strength_for_GPIOG4 v="Low" />
              <Slew_rate_for_GPIOG4 v="Slow" />
              <Drive_strength_for_GPIOG5 v="Low" />
              <Slew_rate_for_GPIOG5 v="Slow" />
              <Drive_strength_for_GPIOG6 v="Low" />
              <Slew_rate_for_GPIOG6 v="Slow" />
              <Drive_strength_for_GPIOG7 v="Low" />
              <Slew_rate_for_GPIOG7 v="Slow" />
            </group>
            <group name="GPIOG_High">
              <Drive_strength_for_GPIOG8 v="Low" />
              <Slew_rate_for_GPIOG8 v="Slow" />
              <Drive_strength_for_GPIOG9 v="Low" />
              <Slew_rate_for_GPIOG9 v="Slow" />
              <Drive_strength_for_GPIOG10 v="Low" />
              <Slew_rate_for_GPIOG10 v="Slow" />
              <Drive_strength_for_GPIOG11 v="Low" />
              <Slew_rate_for_GPIOG11 v="Slow" />
            </group>
          </group>
        </list>
      </group>
      <group name="CPU interrupts">
        <boolgroup name="Interrupt SW0" v="Disabled" />
        <boolgroup name="Interrupt SW1" v="Disabled" />
        <boolgroup name="Interrupt SW2" v="Disabled" />
        <boolgroup name="Interrupt SW3" v="Disabled" />
        <boolgroup name="Interrupt LP" v="Disabled" />
        <boolgroup name="Interrupt PLL" v="Disabled" />
        <boolgroup name="Interrupt LVI" v="Disabled" />
        <boolgroup name="Interrupt Illegal Instruction" v="Disabled" />
        <boolgroup name="Interrupt Misalign Access" v="Disabled" />
        <boolgroup name="Interrupt HW Stack Overflow" v="Disabled" />
        <list name="MCM module (included)" v="1">
          <boolgroup name="Interrupt Core Fault" v="Disabled" />
        </list>
      </group>
      <list name="Enabled speed modes (included)" v="1">
        <group name="Enabled speed modes">
          <boolgroup name="High speed mode" v="Enabled">
            <Input_clock_source_ v="Internal oscillator 8MHz" />
            <Clock_output_divider__Postscaler_ v="Auto select" />
            <System_clock__IP_Bus___MHz_ v="100" />
            <boolgroup name="PLL clock" v="Enabled">
              <PLL_multiplier v="Auto select" />
              <PLL_clock_frequency v="400" />
              <Enable_PLL_after_reset v="yes" />
              <Number_of_lock_checks v="1" />
            </boolgroup>
          </boolgroup>
          <boolgroup name="Low speed mode" v="Disabled" />
          <boolgroup name="Slow speed mode" v="Disabled" />
        </group>
      </list>
    </Properties>
    <Methods>
      <list name="CPUCond0" v="1">
        <SetHighSpeed v="don&amp;apos;t generate code" />
        <SetLowSpeed v="don&amp;apos;t generate code" />
        <SetSlowSpeed v="don&amp;apos;t generate code" />
        <GetSpeedMode v="don&amp;apos;t generate code" />
        <EnableInt v="generate code" />
        <DisableInt v="generate code" />
        <GetResetSource v="don&amp;apos;t generate code" />
        <SetWaitMode v="generate code" />
        <SetStopMode v="generate code" />
        <GetBusFreqHz v="don&amp;apos;t generate code" />
        <OpenBackDoor v="don&amp;apos;t generate code" />
        <SetFlexRAMFunction v="don&amp;apos;t generate code" />
        <SetFlexNVMPartition v="don&amp;apos;t generate code" />
        <InitShadowRegs v="don&amp;apos;t generate code" />
        <Delay100US v="don&amp;apos;t generate code" />
        <EnablePLL v="don&amp;apos;t generate code" />
      </list>
    </Methods>
    <Events>
      <Event_module_name v="Events" />
      <list name="CPUCond" v="1">
        <event name="OnReset" v="don&amp;apos;t generate code" />
        <event name="OnSwINT0" v="don&amp;apos;t generate code" />
        <event name="OnSwINT1" v="don&amp;apos;t generate code" />
        <event name="OnSwINT2" v="don&amp;apos;t generate code" />
        <event name="OnSwINT3" v="don&amp;apos;t generate code" />
        <event name="OnSwINTLP" v="don&amp;apos;t generate code" />
        <event name="OnPLLError" v="don&amp;apos;t generate code" />
        <event name="OnIllegalOpcode" v="don&amp;apos;t generate code" />
        <event name="OnMisalignData" v="don&amp;apos;t generate code" />
        <event name="OnHWStackError" v="don&amp;apos;t generate code" />
        <event name="OnLVI22" v="don&amp;apos;t generate code" />
        <event name="OnLVI27" v="don&amp;apos;t generate code" />
        <event name="OnCoreFault" v="don&amp;apos;t generate code" />
      </list>
    </Events>
    <Compiler v="CodeWarrior DSP C Compiler" />
    <CompilerProperties>
      <Compiler v="CodeWarrior DSP C Compiler" />
      <Unhandled_interrupts v="One handler for all" />
      <Unhandled_int_code>
        <StrgList><![CDATA[/* This code can be changed using the CPU bean property "Build Options / Unhandled int code" */
  asm(DEBUGHLT);                       /* Halt the core and placing it in the debug processing state. */
  /* Here should be two NOPs if DEBUGHLT is removed.
  asm(nop);
  asm(nop); */
]]></StrgList>
      </Unhandled_int_code>
      <boolgroup name="Generate debugger files" v="yes">
        <Generate_mem_file v="yes" />
      </boolgroup>
      <boolgroup name="Generate linker file" v="yes">
        <Constants_in_xROM v="no" />
        <xROM_xRAM_mode v="no" />
        <pROM_xRAM_mode v="yes" />
        <boolgroup name="Serial bootloader support" v="no" />
        <Stack_size v="512" />
        <Heap_size v="256" />
        <list name="ROM/RAM Areas" v="4">
          <group name="MemoryArea0">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_Interrupts" />
              <Address v="0" />
              <Size v="222" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
          <group name="MemoryArea1">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_Code" />
              <Address v="520" />
              <Size v="130552" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
          <group name="MemoryArea2">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".x_Data" />
              <Address v="0" />
              <Size v="16384" />
              <Qualifier v="RW" />
            </boolgroup>
          </group>
          <group name="MemoryArea3">
            <boolgroup name="ROM/RAM Area" v="Enabled">
              <Name v=".p_reserved_FCF" />
              <Address v="512" />
              <Size v="8" />
              <Qualifier v="RWX" />
            </boolgroup>
          </group>
        </list>
      </boolgroup>
      <list name="System paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User paths " v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="Libraries" v="0">
        <EmptySection_DummyValue />
      </list>
      <list name="User directories" v="0">
        <EmptySection_DummyValue />
      </list>
    </CompilerProperties>
  </CPU_Bean>
  <Bean name="FMSTR1" type="FreeMaster">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="FMSTR1" />
      <Interrupt_mode v="Poll driven" />
      <enumgroup name="Device" v="SCI">
        <inhrbean type="Init_SCI">
          <Enabled v="Y" />
          <Template v="Init_SCI_56800" />
          <Properties>
            <Component_name v="FMSTR_SCI1" />
            <Device v="QSCI1" />
            <group name="Settings">
              <group name="Clock setting">
                <Baud_rate_divisor v="651" />
                <Fractional_baud_rate_divisor v="0" />
                <SCI_baud_rate v="19201.228879 Bd" />
              </group>
              <boolgroup name="Loop mode" v="Disabled" />
              <LIN_slave_mode v="Disabled" />
              <Data_format v="8 bits" />
              <Wake_up v="by idle line" />
              <Polarity v="normal" />
              <Parity v="none" />
              <SCI_in_Wait_mode v="Enabled" />
              <Stop_mode_entry_hold_off v="Disabled" />
              <Tx_FIFO_Watermark v="0" />
              <Rx_FIFO_Watermark v="0" />
              <FIFO_enable v="Disabled" />
              <Receiver_DMA_support_ v="Enabled" />
              <Transmitter_DMA_support_ v="Enabled" />
            </group>
            <group name="Pins">
              <RxD_pin v="GPIOF5/RXD1/XB_OUT9" />
              <TxD_pin v="GPIOF4/TXD1/XB_OUT8" />
            </group>
            <group name="Interrupts">
              <group name="Receiver full">
                <Interrupt v="INT_QSCI1_RCV" />
                <Receiver_full_interrupt v="Disabled" />
                <Interrupt_priority v="medium priority" />
                <ISR_name v="FMSTR1_Isr" />
              </group>
              <group name="Receiver error">
                <Interrupt v="INT_QSCI1_RERR" />
                <Receiver_error_interrupt v="Disabled" />
                <Interrupt_priority v="medium priority" />
                <ISR_name v="" />
              </group>
              <group name="Transmitter complete">
                <Interrupt v="INT_QSCI1_TIDLE" />
                <Transmitter_idle_interrupt v="Disabled" />
                <Interrupt_priority v="medium priority" />
                <ISR_name v="" />
              </group>
              <group name="Transmitter ready">
                <Interrupt v="INT_QSCI1_TDRE" />
                <Transmitter_empty_interrupt v="Disabled" />
                <Interrupt_priority v="medium priority" />
                <ISR_name v="FMSTR1_Isr" />
              </group>
            </group>
            <group name="Initialization">
              <Call_Init_method v="yes" />
              <Enable_peripheral_clock v="yes" />
              <Enable_SCI_Transmitter v="yes" />
              <Enable_SCI_Receiver v="yes" />
              <Receiver_wake_up_mode v="normal operation" />
            </group>
          </Properties>
          <Methods>
            <Init v="generate code" />
          </Methods>
          <Events>
            <EmptySection_DummyValue />
          </Events>
        </inhrbean>
      </enumgroup>
      <boolgroup name="Oscilloscope" v="Enabled">
        <Maximum_scope_variables v="8" />
      </boolgroup>
      <boolgroup name="Recorder" v="Enabled">
        <Maximum_recorder_variables v="8" />
        <boolgroup name="User-allocated recorder buffer" v="Disabled">
          <EmptySection_DummyValue />
        </boolgroup>
        <Recorder_buffer_length v="16384" />
        <Fast_Recorder v="Disabled" />
        <boolgroup name="Recorder timebase" v="Enabled">
          <Time_unit v="us" />
          <Recorder_timebase v="62" />
        </boolgroup>
      </boolgroup>
      <boolgroup name="Application command" v="Disabled" />
      <boolgroup name="Target-side addressing" v="Disabled" />
      <group name="Initialization">
        <boolgroup name="Read/write memory commands" v="Enabled">
          <Read_memory v="Enabled" />
          <Write_memory v="Enabled" />
          <Write_memory_bits v="Enabled" />
        </boolgroup>
        <boolgroup name="Read/write variable commands" v="Disabled" />
        <Data_buffer_length v="128" />
        <Interrupt_callback_function v="" />
      </group>
    </Properties>
    <Methods>
      <Poll v="generate code" />
      <Recorder v="generate code" />
      <TriggerRec v="generate code" />
      <SetUpRecBuff v="don&amp;apos;t generate code" />
      <GetAppCmd v="don&amp;apos;t generate code" />
      <GetAppCmdData v="don&amp;apos;t generate code" />
      <RegisterAppCmdCall v="don&amp;apos;t generate code" />
      <AppCmdAck v="don&amp;apos;t generate code" />
      <AppCmdSetResponseData v="don&amp;apos;t generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="PWMA" type="Init_eFlexPWM">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="PWMA" />
      <Device v="PWMA" />
      <group name="Settings">
        <boolgroup name="Submodule 0" v="Enabled">
          <group name="Clock setting">
            <PWM_clock_source v="IP Bus clock" />
            <PWM_generator_clock v="Disabled" />
            <PWM_prescaler v="1" />
            <Module_clock v="100 MHz" />
            <Init_counter_value v="62411" />
            <PWM_value_0___half_cycle_point v="0" />
            <PWM_value_1___counter_modulo v="3124" />
            <Fractional_circuit_power_up v="Disabled" />
            <Fractional_value_1_circuit v="Disabled" />
            <Fractional_value_1 v="0" />
            <Dead_time_value_0 v="30" />
            <Dead_time_value_1 v="30" />
            <PWM_frequency v="16.0000 kHz" />
            <PWM_period v="62.5000 us" />
            <PWM_dead_time_0 v="0.300 us" />
            <PWM_dead_time_1 v="0.300 us" />
          </group>
          <Enabled_in_Wait_mode v="no" />
          <Enabled_in_Debug_mode v="no" />
          <group name="Channel settings">
            <Mode_of_PWM_ch_A_and_B v="Complementary" />
            <Complementary_PWM_source v="PWM23" />
            <Double_switching v="Disabled" />
            <group name="Channel A (PWM23)">
              <group name="PWM function">
                <PWM_value_2 v="63974" />
                <Fractional_value_2_and_3_circuit v="Disabled" />
                <Fractional_value_2 v="0" />
                <PWM_value_3 v="1562" />
                <Fractional_value_3 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_A v="Raw PWMA input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel B (PWM45)">
              <group name="PWM function">
                <PWM_value_4 v="0" />
                <Fractional_value_4_and_5_circuit v="Disabled" />
                <Fractional_value_4 v="0" />
                <PWM_value_5 v="3000" />
                <Fractional_value_5 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_B v="Raw PWMB input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel X (PWM01)">
              <group name="PWM function">
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <X_Double_switching v="Disabled" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_X v="Raw PWMX input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
          </group>
          <group name="Output trigger settings">
            <Output_trigger_0_source_select v="OUT_TRIG0 signal" />
            <Output_trigger_1_source_select v="OUT_TRIG1 signal" />
            <group name="OUT_TRIG0 signal settings">
              <Output_trigger_for_Val_0 v="Enabled" />
              <Output_trigger_for_Val_2 v="Disabled" />
              <Output_trigger_for_Val_4 v="Disabled" />
            </group>
            <group name="OUT_TRIG1 signal settings">
              <Output_trigger_for_Val_1 v="Disabled" />
              <Output_trigger_for_Val_3 v="Disabled" />
              <Output_trigger_for_Val_5 v="Disabled" />
            </group>
          </group>
          <group name="Reload settings">
            <Reload_source v="Local reload signal" />
            <Reload_frequency v="1" />
            <Half_cycle_reload v="Enabled" />
            <Full_cycle_reload v="Disabled" />
            <Load_mode v="Load at next PWM reload if LDOK is set" />
          </group>
          <group name="Force and initialization settings">
            <Initialization_source v="Local sync signal" />
            <Force_initialization v="Enabled" />
            <Force_source v="Local force signal" />
            <Init_value_ch_A v="Low" />
            <Init_value_ch_B v="Low" />
            <Init_value_ch_X v="Low" />
          </group>
        </boolgroup>
        <boolgroup name="Submodule 1" v="Enabled">
          <group name="Clock setting">
            <PWM_clock_source v="Submodule 0&amp;apos;s clock" />
            <PWM_generator_clock v="Disabled" />
            <PWM_prescaler v="1" />
            <Module_clock v="100 MHz" />
            <Init_counter_value v="62411" />
            <PWM_value_0___half_cycle_point v="0" />
            <PWM_value_1___counter_modulo v="3124" />
            <Fractional_circuit_power_up v="Disabled" />
            <Fractional_value_1_circuit v="Disabled" />
            <Fractional_value_1 v="0" />
            <Dead_time_value_0 v="30" />
            <Dead_time_value_1 v="30" />
            <PWM_frequency v="16.0000 kHz" />
            <PWM_period v="62.5000 us" />
            <PWM_dead_time_0 v="0.300 us" />
            <PWM_dead_time_1 v="0.300 us" />
          </group>
          <Enabled_in_Wait_mode v="no" />
          <Enabled_in_Debug_mode v="no" />
          <group name="Channel settings">
            <Mode_of_PWM_ch_A_and_B v="Complementary" />
            <Complementary_PWM_source v="PWM23" />
            <Double_switching v="Disabled" />
            <group name="Channel A (PWM23)">
              <group name="PWM function">
                <PWM_value_2 v="63974" />
                <Fractional_value_2_and_3_circuit v="Disabled" />
                <Fractional_value_2 v="0" />
                <PWM_value_3 v="1562" />
                <Fractional_value_3 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_A v="Raw PWMA input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel B (PWM45)">
              <group name="PWM function">
                <PWM_value_4 v="62442" />
                <Fractional_value_4_and_5_circuit v="Disabled" />
                <Fractional_value_4 v="0" />
                <PWM_value_5 v="62586" />
                <Fractional_value_5 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_B v="Raw PWMB input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel X (PWM01)">
              <group name="PWM function">
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <X_Double_switching v="Disabled" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_X v="Raw PWMX input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
          </group>
          <group name="Output trigger settings">
            <Output_trigger_0_source_select v="OUT_TRIG0 signal" />
            <Output_trigger_1_source_select v="OUT_TRIG1 signal" />
            <group name="OUT_TRIG0 signal settings">
              <Output_trigger_for_Val_0 v="Disabled" />
              <Output_trigger_for_Val_2 v="Disabled" />
              <Output_trigger_for_Val_4 v="Enabled" />
            </group>
            <group name="OUT_TRIG1 signal settings">
              <Output_trigger_for_Val_1 v="Disabled" />
              <Output_trigger_for_Val_3 v="Disabled" />
              <Output_trigger_for_Val_5 v="Disabled" />
            </group>
          </group>
          <group name="Reload settings">
            <Reload_source v="Master reload signal" />
            <Reload_frequency v="1" />
            <Half_cycle_reload v="Enabled" />
            <Full_cycle_reload v="Disabled" />
            <Load_mode v="Load at next PWM reload if LDOK is set" />
          </group>
          <group name="Force and initialization settings">
            <Initialization_source v="Master sync signal" />
            <Force_initialization v="Enabled" />
            <Force_source v="Master force signal" />
            <Init_value_ch_A v="Low" />
            <Init_value_ch_B v="Low" />
            <Init_value_ch_X v="Low" />
          </group>
        </boolgroup>
        <boolgroup name="Submodule 2" v="Enabled">
          <group name="Clock setting">
            <PWM_clock_source v="Submodule 0&amp;apos;s clock" />
            <PWM_generator_clock v="Disabled" />
            <PWM_prescaler v="1" />
            <Module_clock v="100 MHz" />
            <Init_counter_value v="62411" />
            <PWM_value_0___half_cycle_point v="0" />
            <PWM_value_1___counter_modulo v="3124" />
            <Fractional_circuit_power_up v="Disabled" />
            <Fractional_value_1_circuit v="Disabled" />
            <Fractional_value_1 v="0" />
            <Dead_time_value_0 v="30" />
            <Dead_time_value_1 v="30" />
            <PWM_frequency v="16.0000 kHz" />
            <PWM_period v="62.5000 us" />
            <PWM_dead_time_0 v="0.300 us" />
            <PWM_dead_time_1 v="0.300 us" />
          </group>
          <Enabled_in_Wait_mode v="no" />
          <Enabled_in_Debug_mode v="no" />
          <group name="Channel settings">
            <Mode_of_PWM_ch_A_and_B v="Complementary" />
            <Complementary_PWM_source v="PWM23" />
            <Double_switching v="Disabled" />
            <group name="Channel A (PWM23)">
              <group name="PWM function">
                <PWM_value_2 v="63974" />
                <Fractional_value_2_and_3_circuit v="Disabled" />
                <Fractional_value_2 v="0" />
                <PWM_value_3 v="1562" />
                <Fractional_value_3 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_A v="Raw PWMA input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel B (PWM45)">
              <group name="PWM function">
                <PWM_value_4 v="0" />
                <Fractional_value_4_and_5_circuit v="Disabled" />
                <Fractional_value_4 v="0" />
                <PWM_value_5 v="0" />
                <Fractional_value_5 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_B v="Raw PWMB input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel X (PWM01)">
              <group name="PWM function">
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <X_Double_switching v="Disabled" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_X v="Raw PWMX input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
          </group>
          <group name="Output trigger settings">
            <Output_trigger_0_source_select v="OUT_TRIG0 signal" />
            <Output_trigger_1_source_select v="OUT_TRIG1 signal" />
            <group name="OUT_TRIG0 signal settings">
              <Output_trigger_for_Val_0 v="Disabled" />
              <Output_trigger_for_Val_2 v="Disabled" />
              <Output_trigger_for_Val_4 v="Disabled" />
            </group>
            <group name="OUT_TRIG1 signal settings">
              <Output_trigger_for_Val_1 v="Disabled" />
              <Output_trigger_for_Val_3 v="Disabled" />
              <Output_trigger_for_Val_5 v="Disabled" />
            </group>
          </group>
          <group name="Reload settings">
            <Reload_source v="Master reload signal" />
            <Reload_frequency v="1" />
            <Half_cycle_reload v="Enabled" />
            <Full_cycle_reload v="Disabled" />
            <Load_mode v="Load at next PWM reload if LDOK is set" />
          </group>
          <group name="Force and initialization settings">
            <Initialization_source v="Master sync signal" />
            <Force_initialization v="Enabled" />
            <Force_source v="Master force signal" />
            <Init_value_ch_A v="Low" />
            <Init_value_ch_B v="Low" />
            <Init_value_ch_X v="Low" />
          </group>
        </boolgroup>
        <boolgroup name="Submodule 3" v="Disabled" />
        <group name="Fault channel 0 protection settings">
          <group name="Common fault settings">
            <boolgroup name="Input filter" v="Enabled">
              <Sample_count v="10" />
              <Sample_period v="15" />
            </boolgroup>
            <Fault_Glitch_Stretch v="Disabled" />
          </group>
          <group name="Fault 0">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="yes" />
          </group>
          <group name="Fault 1">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 2">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 3">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
        </group>
        <group name="Fault channel 1 protection settings">
          <group name="Common fault settings">
            <boolgroup name="Input filter" v="Disabled" />
            <Fault_Glitch_Stretch v="Disabled" />
          </group>
          <group name="Fault 0">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 1">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 2">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 3">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
        </group>
      </group>
      <group name="Pins">
        <boolgroup name="SM0 pins" v="Enabled">
          <group name="PWM/Input capture channels">
            <boolgroup name="Channel A" v="Enabled">
              <PWM_Input_capture_pin_A v="GPIOE1/PWMA_0A" />
            </boolgroup>
            <boolgroup name="Channel B" v="Enabled">
              <PWM_Input_capture_pin_B v="GPIOE0/PWMA_0B" />
            </boolgroup>
            <boolgroup name="Channel X" v="Disabled" />
          </group>
          <boolgroup name="External control A - EXTA" v="Disabled" />
          <boolgroup name="External control B - EXTB" v="Disabled" />
          <boolgroup name="External synchronization" v="Disabled" />
          <boolgroup name="Output trigger 0" v="Disabled" />
          <boolgroup name="Output trigger 1" v="Disabled" />
        </boolgroup>
        <boolgroup name="SM1 pins" v="Enabled">
          <group name="PWM/Input capture channels">
            <boolgroup name="Channel A" v="Enabled">
              <PWM_Input_capture_pin_A v="GPIOE3/PWMA_1A" />
            </boolgroup>
            <boolgroup name="Channel B" v="Enabled">
              <PWM_Input_capture_pin_B v="GPIOE2/PWMA_1B" />
            </boolgroup>
            <boolgroup name="Channel X" v="Disabled" />
          </group>
          <boolgroup name="External control A - EXTA" v="Disabled" />
          <boolgroup name="External control B - EXTB" v="Disabled" />
          <boolgroup name="External synchronization" v="Disabled" />
          <boolgroup name="Output trigger 0" v="Enabled">
            <PWM_OUT_TRIG0 v="GPIOC14/SDA0/XB_OUT4" />
          </boolgroup>
          <boolgroup name="Output trigger 1" v="Disabled" />
        </boolgroup>
        <boolgroup name="SM2 pins" v="Enabled">
          <group name="PWM/Input capture channels">
            <boolgroup name="Channel A" v="Enabled">
              <PWM_Input_capture_pin_A v="GPIOE5/PWMA_2A/XB_IN3" />
            </boolgroup>
            <boolgroup name="Channel B" v="Enabled">
              <PWM_Input_capture_pin_B v="GPIOE4/PWMA_2B/XB_IN2" />
            </boolgroup>
            <boolgroup name="Channel X" v="Disabled" />
          </group>
          <boolgroup name="External control A - EXTA" v="Disabled" />
          <boolgroup name="External control B - EXTB" v="Disabled" />
          <boolgroup name="External synchronization" v="Disabled" />
          <boolgroup name="Output trigger 0" v="Disabled" />
          <boolgroup name="Output trigger 1" v="Disabled" />
        </boolgroup>
        <boolgroup name="SM3 pins" v="Disabled" />
        <group name="PWM Faults">
          <group name="Fault channel 0">
            <boolgroup name="Fault 0" v="Enabled">
              <Fault_pin_0 v="GPIOB9/ANC21/XB_IN9/MISO2" />
            </boolgroup>
            <boolgroup name="Fault 1" v="Disabled" />
            <boolgroup name="Fault 2" v="Disabled" />
            <boolgroup name="Fault 3" v="Disabled" />
          </group>
          <group name="Fault channel 1">
            <boolgroup name="Fault 4" v="Disabled" />
            <boolgroup name="Fault 5" v="Disabled" />
            <boolgroup name="Fault 6" v="Disabled" />
            <boolgroup name="Fault 7" v="Disabled" />
          </group>
        </group>
        <group name="External clock">
          <boolgroup name="External clock" v="Disabled" />
          <External_clock_frequency v="1" />
        </group>
        <boolgroup name="External force" v="Disabled" />
      </group>
      <group name="Interrupts/DMA">
        <boolgroup name="SM0 Interrupts/DMA" v="Enabled">
          <group name="Compare interrupt">
            <Interrupt v="INT_eFlexPWMA_CMP0" />
            <Interrupt_priority v="1" />
            <ISR_Name v="Enable_Trig_isr" />
            <Compare_interrupt_0 v="Disabled" />
            <Compare_interrupt_1 v="Disabled" />
            <Compare_interrupt_2 v="Disabled" />
            <Compare_interrupt_3 v="Disabled" />
            <Compare_interrupt_4 v="Disabled" />
            <Compare_interrupt_5 v="Enabled" />
          </group>
          <group name="Capture interrupt">
            <Interrupt v="INT_eFlexPWMA_CAP" />
            <Interrupt_priority v="default" />
            <ISR_Name v="" />
            <Capture_A_0_interrupt v="Disabled" />
            <Capture_A_1_interrupt v="Disabled" />
            <Capture_B_0_interrupt v="Disabled" />
            <Capture_B_1_interrupt v="Disabled" />
            <Capture_X_0_interrupt v="Disabled" />
            <Capture_X_1_interrupt v="Disabled" />
          </group>
          <group name="Reload interrupt">
            <Interrupt v="INT_eFlexPWMA_RELOAD0" />
            <Interrupt_priority v="default" />
            <ISR_Name v="" />
            <Reload_interrupt v="Disabled" />
          </group>
          <group name="Reload error interrupt">
            <Interrupt v="INT_eFlexPWMA_RERR" />
            <Interrupt_priority v="default" />
            <ISR_Name v="" />
            <SM0_reload_error_interrupt v="Disabled" />
          </group>
          <group name="DMA settings">
            <DMA_for_value_registers v="Disabled" />
            <Selected_capture_FIFO_watermarks v="OR&amp;apos;ed together" />
            <Capture_FIFO_read_DMA_request v="Disabled" />
            <Capture_A_0_FIFO_DMA v="Disabled" />
            <Capture_A_1_FIFO_DMA v="Disabled" />
            <Capture_B_0_FIFO_DMA v="Disabled" />
            <Capture_B_1_FIFO_DMA v="Disabled" />
            <Capture_X_0_FIFO_DMA v="Disabled" />
            <Capture_X_1_FIFO_DMA v="Disabled" />
          </group>
        </boolgroup>
        <boolgroup name="SM1 Interrupts/DMA" v="Enabled">
          <group name="Compare interrupt">
            <Interrupt v="INT_eFlexPWMA_CMP1" />
            <Interrupt_priority v="1" />
            <ISR_Name v="M1_isr" />
            <Compare_interrupt_0 v="Disabled" />
            <Compare_interrupt_1 v="Disabled" />
            <Compare_interrupt_2 v="Disabled" />
            <Compare_interrupt_3 v="Disabled" />
            <Compare_interrupt_4 v="Disabled" />
            <Compare_interrupt_5 v="Enabled" />
          </group>
          <group name="Capture interrupt">
            <Interrupt v="INT_eFlexPWMA_CAP" />
            <Interrupt_priority v="default" />
            <ISR_Name v="" />
            <Capture_A_0_interrupt v="Disabled" />
            <Capture_A_1_interrupt v="Disabled" />
            <Capture_B_0_interrupt v="Disabled" />
            <Capture_B_1_interrupt v="Disabled" />
            <Capture_X_0_interrupt v="Disabled" />
            <Capture_X_1_interrupt v="Disabled" />
          </group>
          <group name="Reload interrupt">
            <Interrupt v="INT_eFlexPWMA_RELOAD1" />
            <Interrupt_priority v="default" />
            <ISR_Name v="" />
            <Reload_interrupt v="Disabled" />
          </group>
          <group name="Reload error interrupt">
            <Interrupt v="INT_eFlexPWMA_RERR" />
            <Interrupt_priority v="default" />
            <ISR_Name v="" />
            <SM1_reload_error_interrupt v="Disabled" />
          </group>
          <group name="DMA settings">
            <DMA_for_value_registers v="Disabled" />
            <Selected_capture_FIFO_watermarks v="OR&amp;apos;ed together" />
            <Capture_FIFO_read_DMA_request v="Disabled" />
            <Capture_A_0_FIFO_DMA v="Disabled" />
            <Capture_A_1_FIFO_DMA v="Disabled" />
            <Capture_B_0_FIFO_DMA v="Disabled" />
            <Capture_B_1_FIFO_DMA v="Disabled" />
            <Capture_X_0_FIFO_DMA v="Disabled" />
            <Capture_X_1_FIFO_DMA v="Disabled" />
          </group>
        </boolgroup>
        <boolgroup name="SM2 Interrupts/DMA" v="Disabled" />
        <boolgroup name="SM3 Interrupts/DMA" v="Disabled" />
        <group name="Fault interrupt">
          <Interrupt v="INT_eFlexPWMA_FAULT" />
          <Interrupt_priority v="2" />
          <ISR_Name v="PWMA_Fault_Isr" />
          <Channel_0_fault_0_interrupt v="Enabled" />
          <Channel_0_fault_1_interrupt v="Disabled" />
          <Channel_0_fault_2_interrupt v="Disabled" />
          <Channel_0_fault_3_interrupt v="Disabled" />
          <Channel_1_Fault_0_interrupt v="Disabled" />
          <Channel_1_Fault_1_interrupt v="Disabled" />
          <Channel_1_Fault_2_interrupt v="Disabled" />
          <Channel_1_Fault_3_interrupt v="Disabled" />
        </group>
      </group>
      <group name="Initialization">
        <Load_values_after_init_into_SM0 v="yes" />
        <Load_values_after_init_into_SM1 v="yes" />
        <Load_values_after_init_into_SM2 v="yes" />
        <Load_values_after_init_into_SM3 v="yes" />
        <Enable_peripheral_clock_for_SM0 v="yes" />
        <Enable_peripheral_clock_for_SM1 v="yes" />
        <Enable_peripheral_clock_for_SM2 v="yes" />
        <Enable_peripheral_clock_for_SM3 v="yes" />
        <Fault_channel_0_test v="No simulated fault" />
        <Fault_channel_1_test v="No simulated fault" />
        <group name="Fault flag clearing">
          <Fault_channel_0_flag_0 v="Clear" />
          <Fault_channel_0_flag_1 v="Clear" />
          <Fault_channel_0_flag_2 v="Clear" />
          <Fault_channel_0_flag_3 v="Clear" />
          <Fault_channel_1_flag_0 v="Clear" />
          <Fault_channel_1_flag_1 v="Clear" />
          <Fault_channel_1_flag_2 v="Clear" />
          <Fault_channel_1_flag_3 v="Clear" />
        </group>
        <Monitor_PLL_mode v="Do not monitor PLL" />
        <Call_Init_method v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="PWMB" type="Init_eFlexPWM">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="PWMB" />
      <Device v="PWMB" />
      <group name="Settings">
        <boolgroup name="Submodule 0" v="Enabled">
          <group name="Clock setting">
            <PWM_clock_source v="IP Bus clock" />
            <PWM_generator_clock v="Disabled" />
            <PWM_prescaler v="1" />
            <Module_clock v="100 MHz" />
            <Init_counter_value v="62411" />
            <PWM_value_0___half_cycle_point v="0" />
            <PWM_value_1___counter_modulo v="3124" />
            <Fractional_circuit_power_up v="Disabled" />
            <Fractional_value_1_circuit v="Disabled" />
            <Fractional_value_1 v="0" />
            <Dead_time_value_0 v="30" />
            <Dead_time_value_1 v="30" />
            <PWM_frequency v="16.0000 kHz" />
            <PWM_period v="62.5000 us" />
            <PWM_dead_time_0 v="0.300 us" />
            <PWM_dead_time_1 v="0.300 us" />
          </group>
          <Enabled_in_Wait_mode v="no" />
          <Enabled_in_Debug_mode v="no" />
          <group name="Channel settings">
            <Mode_of_PWM_ch_A_and_B v="Complementary" />
            <Complementary_PWM_source v="PWM23" />
            <Double_switching v="Disabled" />
            <group name="Channel A (PWM23)">
              <group name="PWM function">
                <PWM_value_2 v="63974" />
                <Fractional_value_2_and_3_circuit v="Disabled" />
                <Fractional_value_2 v="0" />
                <PWM_value_3 v="1562" />
                <Fractional_value_3 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_A v="Raw PWMA input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel B (PWM45)">
              <group name="PWM function">
                <PWM_value_4 v="62442" />
                <Fractional_value_4_and_5_circuit v="Disabled" />
                <Fractional_value_4 v="0" />
                <PWM_value_5 v="0" />
                <Fractional_value_5 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_B v="Raw PWMB input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel X (PWM01)">
              <group name="PWM function">
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <X_Double_switching v="Disabled" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_X v="Raw PWMX input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
          </group>
          <group name="Output trigger settings">
            <Output_trigger_0_source_select v="OUT_TRIG0 signal" />
            <Output_trigger_1_source_select v="OUT_TRIG1 signal" />
            <group name="OUT_TRIG0 signal settings">
              <Output_trigger_for_Val_0 v="Disabled" />
              <Output_trigger_for_Val_2 v="Disabled" />
              <Output_trigger_for_Val_4 v="Enabled" />
            </group>
            <group name="OUT_TRIG1 signal settings">
              <Output_trigger_for_Val_1 v="Disabled" />
              <Output_trigger_for_Val_3 v="Disabled" />
              <Output_trigger_for_Val_5 v="Disabled" />
            </group>
          </group>
          <group name="Reload settings">
            <Reload_source v="Local reload signal" />
            <Reload_frequency v="1" />
            <Half_cycle_reload v="Enabled" />
            <Full_cycle_reload v="Disabled" />
            <Load_mode v="Load at next PWM reload if LDOK is set" />
          </group>
          <group name="Force and initialization settings">
            <Initialization_source v="External sync signal" />
            <Force_initialization v="Enabled" />
            <Force_source v="Local force signal" />
            <Init_value_ch_A v="Low" />
            <Init_value_ch_B v="Low" />
            <Init_value_ch_X v="Low" />
          </group>
        </boolgroup>
        <boolgroup name="Submodule 1" v="Enabled">
          <group name="Clock setting">
            <PWM_clock_source v="Submodule 0&amp;apos;s clock" />
            <PWM_generator_clock v="Disabled" />
            <PWM_prescaler v="1" />
            <Module_clock v="100 MHz" />
            <Init_counter_value v="62411" />
            <PWM_value_0___half_cycle_point v="0" />
            <PWM_value_1___counter_modulo v="3124" />
            <Fractional_circuit_power_up v="Disabled" />
            <Fractional_value_1_circuit v="Disabled" />
            <Fractional_value_1 v="0" />
            <Dead_time_value_0 v="30" />
            <Dead_time_value_1 v="30" />
            <PWM_frequency v="16.0000 kHz" />
            <PWM_period v="62.5000 us" />
            <PWM_dead_time_0 v="0.300 us" />
            <PWM_dead_time_1 v="0.300 us" />
          </group>
          <Enabled_in_Wait_mode v="no" />
          <Enabled_in_Debug_mode v="no" />
          <group name="Channel settings">
            <Mode_of_PWM_ch_A_and_B v="Complementary" />
            <Complementary_PWM_source v="PWM23" />
            <Double_switching v="Disabled" />
            <group name="Channel A (PWM23)">
              <group name="PWM function">
                <PWM_value_2 v="63974" />
                <Fractional_value_2_and_3_circuit v="Disabled" />
                <Fractional_value_2 v="0" />
                <PWM_value_3 v="1562" />
                <Fractional_value_3 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_A v="Raw PWMA input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel B (PWM45)">
              <group name="PWM function">
                <PWM_value_4 v="0" />
                <Fractional_value_4_and_5_circuit v="Disabled" />
                <Fractional_value_4 v="0" />
                <PWM_value_5 v="0" />
                <Fractional_value_5 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_B v="Raw PWMB input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel X (PWM01)">
              <group name="PWM function">
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <X_Double_switching v="Disabled" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_X v="Raw PWMX input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
          </group>
          <group name="Output trigger settings">
            <Output_trigger_0_source_select v="OUT_TRIG0 signal" />
            <Output_trigger_1_source_select v="OUT_TRIG1 signal" />
            <group name="OUT_TRIG0 signal settings">
              <Output_trigger_for_Val_0 v="Disabled" />
              <Output_trigger_for_Val_2 v="Disabled" />
              <Output_trigger_for_Val_4 v="Disabled" />
            </group>
            <group name="OUT_TRIG1 signal settings">
              <Output_trigger_for_Val_1 v="Disabled" />
              <Output_trigger_for_Val_3 v="Disabled" />
              <Output_trigger_for_Val_5 v="Disabled" />
            </group>
          </group>
          <group name="Reload settings">
            <Reload_source v="Master reload signal" />
            <Reload_frequency v="1" />
            <Half_cycle_reload v="Enabled" />
            <Full_cycle_reload v="Disabled" />
            <Load_mode v="Load at next PWM reload if LDOK is set" />
          </group>
          <group name="Force and initialization settings">
            <Initialization_source v="External sync signal" />
            <Force_initialization v="Enabled" />
            <Force_source v="Master force signal" />
            <Init_value_ch_A v="Low" />
            <Init_value_ch_B v="Low" />
            <Init_value_ch_X v="Low" />
          </group>
        </boolgroup>
        <boolgroup name="Submodule 2" v="Enabled">
          <group name="Clock setting">
            <PWM_clock_source v="Submodule 0&amp;apos;s clock" />
            <PWM_generator_clock v="Disabled" />
            <PWM_prescaler v="1" />
            <Module_clock v="100 MHz" />
            <Init_counter_value v="62411" />
            <PWM_value_0___half_cycle_point v="0" />
            <PWM_value_1___counter_modulo v="3124" />
            <Fractional_circuit_power_up v="Disabled" />
            <Fractional_value_1_circuit v="Disabled" />
            <Fractional_value_1 v="0" />
            <Dead_time_value_0 v="30" />
            <Dead_time_value_1 v="30" />
            <PWM_frequency v="16.0000 kHz" />
            <PWM_period v="62.5000 us" />
            <PWM_dead_time_0 v="0.300 us" />
            <PWM_dead_time_1 v="0.300 us" />
          </group>
          <Enabled_in_Wait_mode v="no" />
          <Enabled_in_Debug_mode v="no" />
          <group name="Channel settings">
            <Mode_of_PWM_ch_A_and_B v="Complementary" />
            <Complementary_PWM_source v="PWM23" />
            <Double_switching v="Disabled" />
            <group name="Channel A (PWM23)">
              <group name="PWM function">
                <PWM_value_2 v="63974" />
                <Fractional_value_2_and_3_circuit v="Disabled" />
                <Fractional_value_2 v="0" />
                <PWM_value_3 v="1562" />
                <Fractional_value_3 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_A v="Raw PWMA input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel B (PWM45)">
              <group name="PWM function">
                <PWM_value_4 v="0" />
                <Fractional_value_4_and_5_circuit v="Disabled" />
                <Fractional_value_4 v="0" />
                <PWM_value_5 v="0" />
                <Fractional_value_5 v="0" />
                <SW_output v="Logic 0" />
                <Deadtime_source v="Generated PWM" />
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="no" />
                  <Disable_by_fault_1 v="no" />
                  <Disable_by_fault_2 v="no" />
                  <Disable_by_fault_3 v="no" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_B v="Raw PWMB input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
            <group name="Channel X (PWM01)">
              <group name="PWM function">
                <Output_fault_state v="Forced to 0 prior to output polarity" />
                <Output_polarity v="Not inverted" />
                <Channel_masked v="no" />
                <X_Double_switching v="Disabled" />
                <Channel_output v="Disabled" />
                <group name="Fault channel 0">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
                <group name="Fault channel 1">
                  <Disable_by_fault_0 v="yes" />
                  <Disable_by_fault_1 v="yes" />
                  <Disable_by_fault_2 v="yes" />
                  <Disable_by_fault_3 v="yes" />
                </group>
              </group>
              <group name="E-capture function">
                <FIFOs_water_mark_level v="0" />
                <Edge_counter v="Disabled" />
                <Edge_compare v="0" />
                <Input_select_X v="Raw PWMX input signal" />
                <Capture_0_circuitry v="Disabled" />
                <Capture_1_circuitry v="Disabled" />
                <Capture_circuitry_mode v="Free running" />
                <Input_capture_process v="Disabled" />
              </group>
            </group>
          </group>
          <group name="Output trigger settings">
            <Output_trigger_0_source_select v="OUT_TRIG0 signal" />
            <Output_trigger_1_source_select v="OUT_TRIG1 signal" />
            <group name="OUT_TRIG0 signal settings">
              <Output_trigger_for_Val_0 v="Disabled" />
              <Output_trigger_for_Val_2 v="Disabled" />
              <Output_trigger_for_Val_4 v="Disabled" />
            </group>
            <group name="OUT_TRIG1 signal settings">
              <Output_trigger_for_Val_1 v="Disabled" />
              <Output_trigger_for_Val_3 v="Disabled" />
              <Output_trigger_for_Val_5 v="Disabled" />
            </group>
          </group>
          <group name="Reload settings">
            <Reload_source v="Master reload signal" />
            <Reload_frequency v="1" />
            <Half_cycle_reload v="Enabled" />
            <Full_cycle_reload v="Disabled" />
            <Load_mode v="Load at next PWM reload if LDOK is set" />
          </group>
          <group name="Force and initialization settings">
            <Initialization_source v="External sync signal" />
            <Force_initialization v="Enabled" />
            <Force_source v="Master force signal" />
            <Init_value_ch_A v="Low" />
            <Init_value_ch_B v="Low" />
            <Init_value_ch_X v="Low" />
          </group>
        </boolgroup>
        <boolgroup name="Submodule 3" v="Disabled" />
        <group name="Fault channel 0 protection settings">
          <group name="Common fault settings">
            <boolgroup name="Input filter" v="Enabled">
              <Sample_count v="10" />
              <Sample_period v="15" />
            </boolgroup>
            <Fault_Glitch_Stretch v="Disabled" />
          </group>
          <group name="Fault 0">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 1">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="yes" />
          </group>
          <group name="Fault 2">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 3">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
        </group>
        <group name="Fault channel 1 protection settings">
          <group name="Common fault settings">
            <boolgroup name="Input filter" v="Disabled" />
            <Fault_Glitch_Stretch v="Disabled" />
          </group>
          <group name="Fault 0">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 1">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 2">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
          <group name="Fault 3">
            <Fault_active_level v="Logic 0" />
            <No_combinational_path v="no" />
            <Fault_clearing_mode v="Manual" />
            <Fault_safety_mode v="Normal" />
            <Half_cycle_recovery v="no" />
            <Full_cycle_recovery v="no" />
          </group>
        </group>
      </group>
      <group name="Pins">
        <boolgroup name="SM0 pins" v="Enabled">
          <group name="PWM/Input capture channels">
            <boolgroup name="Channel A" v="Enabled">
              <PWM_Input_capture_pin_A v="GPIOG3/PWMB_0A/XB_OUT5" />
            </boolgroup>
            <boolgroup name="Channel B" v="Enabled">
              <PWM_Input_capture_pin_B v="GPIOG2/PWMB_0B/XB_OUT4" />
            </boolgroup>
            <boolgroup name="Channel X" v="Disabled" />
          </group>
          <boolgroup name="External control A - EXTA" v="Disabled" />
          <boolgroup name="External control B - EXTB" v="Disabled" />
          <boolgroup name="External synchronization" v="Enabled">
            <External_sync_input v="PWMA0_TRG0" />
          </boolgroup>
          <boolgroup name="Output trigger 0 or 1" v="Enabled">
            <PWM_OUT_TRIG0_OR_PWM_OUT_TRIG1 v="GPIOC15/SCL0/XB_OUT5" />
          </boolgroup>
        </boolgroup>
        <boolgroup name="SM1 pins" v="Enabled">
          <group name="PWM/Input capture channels">
            <boolgroup name="Channel A" v="Enabled">
              <PWM_Input_capture_pin_A v="GPIOG1/PWMB_1A/XB_OUT7" />
            </boolgroup>
            <boolgroup name="Channel B" v="Enabled">
              <PWM_Input_capture_pin_B v="GPIOG0/PWMB_1B/XB_OUT6" />
            </boolgroup>
            <boolgroup name="Channel X" v="Disabled" />
          </group>
          <boolgroup name="External control A - EXTA" v="Disabled" />
          <boolgroup name="External control B - EXTB" v="Disabled" />
          <boolgroup name="External synchronization" v="Enabled">
            <External_sync_input v="PWMA0_TRG0" />
          </boolgroup>
          <boolgroup name="Output trigger 0 or 1" v="Disabled" />
        </boolgroup>
        <boolgroup name="SM2 pins" v="Enabled">
          <group name="PWM/Input capture channels">
            <boolgroup name="Channel A" v="Enabled">
              <PWM_Input_capture_pin_A v="GPIOE9/PWMB_2A/PWMA_FAULT1" />
            </boolgroup>
            <boolgroup name="Channel B" v="Enabled">
              <PWM_Input_capture_pin_B v="GPIOE8/PWMB_2B/PWMA_FAULT0" />
            </boolgroup>
            <boolgroup name="Channel X" v="Disabled" />
          </group>
          <boolgroup name="External control A - EXTA" v="Disabled" />
          <boolgroup name="External control B - EXTB" v="Disabled" />
          <boolgroup name="External synchronization" v="Enabled">
            <External_sync_input v="PWMA0_TRG0" />
          </boolgroup>
          <boolgroup name="Output trigger 0 or 1" v="Disabled" />
        </boolgroup>
        <boolgroup name="SM3 pins" v="Disabled" />
        <group name="PWM Faults">
          <group name="Fault channel 0">
            <boolgroup name="Fault 0" v="Disabled" />
            <boolgroup name="Fault 1" v="Enabled">
              <Fault_pin_1 v="GPIOB10/ANC22/XB_IN8/MOSI2" />
            </boolgroup>
            <boolgroup name="Fault 2" v="Disabled" />
            <boolgroup name="Fault 3" v="Disabled" />
          </group>
          <group name="Fault channel 1">
            <boolgroup name="Fault 4" v="Disabled" />
            <boolgroup name="Fault 5" v="Disabled" />
            <boolgroup name="Fault 6" v="Disabled" />
            <boolgroup name="Fault 7" v="Disabled" />
          </group>
        </group>
        <group name="External clock">
          <boolgroup name="External clock" v="Disabled" />
          <External_clock_frequency v="1" />
        </group>
        <boolgroup name="External force" v="Disabled" />
      </group>
      <group name="Interrupts/DMA">
        <boolgroup name="SM0 Interrupts/DMA" v="Disabled" />
        <boolgroup name="SM1 Interrupts/DMA" v="Disabled" />
        <boolgroup name="SM2 Interrupts/DMA" v="Disabled" />
        <boolgroup name="SM3 Interrupts/DMA" v="Disabled" />
        <group name="Fault interrupt">
          <Interrupt v="INT_eFlexPWMB_FAULT" />
          <Interrupt_priority v="2" />
          <ISR_Name v="PWMB_Fault_Isr" />
          <Channel_0_fault_0_interrupt v="Disabled" />
          <Channel_0_fault_1_interrupt v="Enabled" />
          <Channel_0_fault_2_interrupt v="Disabled" />
          <Channel_0_fault_3_interrupt v="Disabled" />
          <Channel_1_Fault_0_interrupt v="Disabled" />
          <Channel_1_Fault_1_interrupt v="Disabled" />
          <Channel_1_Fault_2_interrupt v="Disabled" />
          <Channel_1_Fault_3_interrupt v="Disabled" />
        </group>
      </group>
      <group name="Initialization">
        <Load_values_after_init_into_SM0 v="yes" />
        <Load_values_after_init_into_SM1 v="yes" />
        <Load_values_after_init_into_SM2 v="yes" />
        <Load_values_after_init_into_SM3 v="yes" />
        <Enable_peripheral_clock_for_SM0 v="yes" />
        <Enable_peripheral_clock_for_SM1 v="yes" />
        <Enable_peripheral_clock_for_SM2 v="yes" />
        <Enable_peripheral_clock_for_SM3 v="yes" />
        <Fault_channel_0_test v="No simulated fault" />
        <Fault_channel_1_test v="No simulated fault" />
        <group name="Fault flag clearing">
          <Fault_channel_0_flag_0 v="Clear" />
          <Fault_channel_0_flag_1 v="Clear" />
          <Fault_channel_0_flag_2 v="Clear" />
          <Fault_channel_0_flag_3 v="Clear" />
          <Fault_channel_1_flag_0 v="Clear" />
          <Fault_channel_1_flag_1 v="Clear" />
          <Fault_channel_1_flag_2 v="Clear" />
          <Fault_channel_1_flag_3 v="Clear" />
        </group>
        <Call_Init_method v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="ADC1" type="Init_ADC">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="ADC1" />
      <Device v="ADC12" />
      <group name="Settings">
        <group name="Clock setting">
          <Clock_divisor_select_value v="5" />
          <A_D_Frequency v="20 MHz" />
          <Speed_control v="clock frequency =&amp;lt; 20MHz" />
          <Clock_divisor_select_value_1 v="5" />
          <A_D_Frequency_1 v="20 MHz" />
          <Speed_control_1 v="clock frequency =&amp;lt; 20MHz" />
        </group>
        <Stop_mode__0_ v="no" />
        <Stop_mode_1 v="yes" />
        <ADC_mode v="Triggered Parallel" />
        <enumgroup name="Parallel mode" v="simultaneous">
          <EmptySection_DummyValue />
        </enumgroup>
        <Trigger_mode__0_ v="SYNC input or START bit" />
        <Trigger_mode_1 v="SYNC input or START bit" />
        <Sampling_time__0_ v="5 ADC clocks" />
        <Sampling_time_1 v="5 ADC clocks" />
        <Power_savings_mode v="Disabled" />
        <Power_up_delay v="26" />
        <Auto_standby v="Disabled" />
        <DMA_trigger_source v="EOSI" />
        <boolgroup name="High volt. ref. source 0" v="internal" />
        <boolgroup name="Low volt. ref. source 0" v="internal" />
        <boolgroup name="High volt. ref. source 1" v="internal" />
        <boolgroup name="Low volt. ref. source 1" v="internal" />
        <group name="A/D Channels">
          <group name="Channels configuration">
            <ANA0_ANA1 v="Single ended mode" />
            <ANA2_ANA3 v="Single ended mode" />
            <ANB0_ANB1 v="Single ended mode" />
            <ANB2_ANB3 v="Single ended mode" />
            <ANA4_ANA5 v="Single ended mode" />
            <ANA6_ANA7 v="Single ended mode" />
            <ANB4_ANB5 v="Single ended mode" />
            <ANB6_ANB7 v="Single ended mode" />
          </group>
          <boolgroup name="Sample 0" v="Enabled">
            <Channel v="GPIOA0/ANA0/CMPA_IN3/CMPC_O" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 1" v="Enabled">
            <Channel v="GPIOA1/ANA1/CMPA_IN0" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 2" v="Enabled">
            <Channel v="GPIOA0/ANA0/CMPA_IN3/CMPC_O" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 3" v="Enabled">
            <Channel v="GPIOA4/ANA4/ANC8/CMPD_IN0" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 4" v="Enabled">
            <Channel v="GPIOA5/ANA5/ANC9" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 5" v="Enabled">
            <Channel v="GPIOA5/ANA5/ANC9" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 6" v="Disabled" />
          <boolgroup name="Sample 7" v="Disabled" />
          <boolgroup name="Sample 8" v="Enabled">
            <Channel v="GPIOB0/ANB0/CMPB_IN3" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 9" v="Enabled">
            <Channel v="GPIOB1/ANB1/CMPB_IN0" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 10" v="Enabled">
            <Channel v="GPIOB2/ANB2/CMPC_IN3" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 11" v="Enabled">
            <Channel v="GPIOB4/ANB4/ANC12/CMPC_IN1" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 12" v="Enabled">
            <Channel v="GPIOB5/ANB5/ANC13/CMPC_IN2" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 13" v="Enabled">
            <Channel v="GPIOB6/ANB6/ANC14/CMPB_IN1" />
            <boolgroup name="Negative input" v="Disabled" />
          </boolgroup>
          <boolgroup name="Sample 14" v="Disabled" />
          <boolgroup name="Sample 15" v="Disabled" />
          <boolgroup name="Internal trigger (0)" v="Enabled">
            <Trigger_input v="AOI_Function0_Out" />
          </boolgroup>
          <boolgroup name="Internal trigger 1" v="Disabled" />
        </group>
        <group name="Zero crossing">
          <Sample_0 v="disabled" />
          <Sample_1 v="disabled" />
          <Sample_2 v="disabled" />
          <Sample_3 v="disabled" />
          <Sample_4 v="disabled" />
          <Sample_5 v="disabled" />
          <Sample_6 v="disabled" />
          <Sample_7 v="disabled" />
          <Sample_8 v="disabled" />
          <Sample_9 v="disabled" />
          <Sample_10 v="disabled" />
          <Sample_11 v="disabled" />
          <Sample_12 v="disabled" />
          <Sample_13 v="disabled" />
          <Sample_14 v="disabled" />
          <Sample_15 v="disabled" />
        </group>
        <group name="Low limit">
          <Low_limit_register_0 v="0" />
          <Low_limit_register_1 v="0" />
          <Low_limit_register_2 v="0" />
          <Low_limit_register_3 v="0" />
          <Low_limit_register_4 v="0" />
          <Low_limit_register_5 v="0" />
          <Low_limit_register_6 v="0" />
          <Low_limit_register_7 v="0" />
          <Low_limit_register_8 v="0" />
          <Low_limit_register_9 v="0" />
          <Low_limit_register_10 v="0" />
          <Low_limit_register_11 v="0" />
          <Low_limit_register_12 v="0" />
          <Low_limit_register_13 v="0" />
          <Low_limit_register_14 v="0" />
          <Low_limit_register_15 v="0" />
        </group>
        <group name="High limit">
          <High_limit_register_0 v="32760" />
          <High_limit_register_1 v="32760" />
          <High_limit_register_2 v="32760" />
          <High_limit_register_3 v="32760" />
          <High_limit_register_4 v="32760" />
          <High_limit_register_5 v="32760" />
          <High_limit_register_6 v="32760" />
          <High_limit_register_7 v="32760" />
          <High_limit_register_8 v="32760" />
          <High_limit_register_9 v="32760" />
          <High_limit_register_10 v="32760" />
          <High_limit_register_11 v="32760" />
          <High_limit_register_12 v="32760" />
          <High_limit_register_13 v="32760" />
          <High_limit_register_14 v="32760" />
          <High_limit_register_15 v="32760" />
        </group>
        <group name="Offset">
          <Offset_register_0 v="0" />
          <Offset_register_1 v="0" />
          <Offset_register_2 v="0" />
          <Offset_register_3 v="0" />
          <Offset_register_4 v="0" />
          <Offset_register_5 v="0" />
          <Offset_register_6 v="0" />
          <Offset_register_7 v="0" />
          <Offset_register_8 v="0" />
          <Offset_register_9 v="0" />
          <Offset_register_10 v="0" />
          <Offset_register_11 v="0" />
          <Offset_register_12 v="0" />
          <Offset_register_13 v="0" />
          <Offset_register_14 v="0" />
          <Offset_register_15 v="0" />
        </group>
        <group name="Gain control">
          <ANA0 v="x1 amplification" />
          <ANA1 v="x1 amplification" />
          <ANA2 v="x1 amplification" />
          <ANA3 v="x1 amplification" />
          <ANA4 v="x1 amplification" />
          <ANA5 v="x1 amplification" />
          <ANA6 v="x1 amplification" />
          <ANA7 v="x1 amplification" />
          <ANB0 v="x1 amplification" />
          <ANB1 v="x1 amplification" />
          <ANB2 v="x1 amplification" />
          <ANB3 v="x1 amplification" />
          <ANB4 v="x1 amplification" />
          <ANB5 v="x1 amplification" />
          <ANB6 v="x1 amplification" />
          <ANB7 v="x1 amplification" />
        </group>
        <group name="Scan control">
          <Sample_0 v="Continue" />
          <Sample_1 v="Continue" />
          <Sample_2 v="Continue" />
          <Sample_3 v="Pause" />
          <Sample_4 v="Continue" />
          <Sample_5 v="Continue" />
          <Sample_6 v="Continue" />
          <Sample_7 v="Continue" />
          <Sample_8 v="Continue" />
          <Sample_9 v="Continue" />
          <Sample_10 v="Continue" />
          <Sample_11 v="Continue" />
          <Sample_12 v="Continue" />
          <Sample_13 v="Continue" />
          <Sample_14 v="Continue" />
          <Sample_15 v="Continue" />
        </group>
      </group>
      <group name="Interrupts/DMA">
        <group name="Conversion complete (0)">
          <Interrupt v="INT_ADC12_CC0" />
          <End_of_scan_interrupt v="Enabled" />
          <Interrupt_priority v="1" />
          <ISR_name v="M2_isr" />
          <DMA_request v="Disabled" />
        </group>
        <group name="Conversion complete 1">
          <Interrupt v="INT_ADC12_CC1" />
          <End_of_scan_interrupt v="Disabled" />
          <Interrupt_priority v="default" />
          <ISR_name v="" />
          <DMA_request v="Disabled" />
        </group>
        <group name="Scan halted interrupt enable">
          <Sample_0 v="Disabled" />
          <Sample_1 v="Disabled" />
          <Sample_2 v="Disabled" />
          <Sample_3 v="Disabled" />
          <Sample_4 v="Disabled" />
          <Sample_5 v="Disabled" />
          <Sample_6 v="Disabled" />
          <Sample_7 v="Disabled" />
          <Sample_8 v="Disabled" />
          <Sample_9 v="Disabled" />
          <Sample_10 v="Disabled" />
          <Sample_11 v="Disabled" />
          <Sample_12 v="Disabled" />
          <Sample_13 v="Disabled" />
          <Sample_14 v="Disabled" />
          <Sample_15 v="Disabled" />
        </group>
        <group name="Zero crossing or limit error">
          <Interrupt v="INT_ADC12_ERR" />
          <Zero_crossing_interrupt v="Disabled" />
          <Low_limit_error_interrupt v="Disabled" />
          <High_limit_error_interrupt v="Disabled" />
          <Interrupt_priority v="default" />
          <ISR_name v="" />
        </group>
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Start_ADC_conversion__0_ v="no" />
        <Start_ADC_conversion_1 v="no" />
        <Power_down_ADC_0 v="no" />
        <Power_down_ADC_1 v="no" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="AOI1" type="Init_AOI">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="AOI1" />
      <Device v="AOI" />
      <group name="Settings">
        <group name="Boolean Function 0 Configuration">
          <group name="Product Term 0">
            <A_input v="Pass" />
            <B_input v="Force logical one" />
            <C_input v="Force logical one" />
            <D_input v="Force logical one" />
          </group>
          <group name="Product Term 1">
            <A_input v="Force logical one" />
            <B_input v="Pass" />
            <C_input v="Force logical one" />
            <D_input v="Force logical one" />
          </group>
          <group name="Product Term 2">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
          <group name="Product Term 3">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
        </group>
        <group name="Boolean Function 1 Configuration">
          <group name="Product Term 0">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
          <group name="Product Term 1">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
          <group name="Product Term 2">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
          <group name="Product Term 3">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
        </group>
        <group name="Boolean Function 2 Configuration">
          <group name="Product Term 0">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
          <group name="Product Term 1">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
          <group name="Product Term 2">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
          <group name="Product Term 3">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
        </group>
        <group name="Boolean Function 3 Configuration">
          <group name="Product Term 0">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
          <group name="Product Term 1">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
          <group name="Product Term 2">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
          <group name="Product Term 3">
            <A_input v="Force logical zero" />
            <B_input v="Force logical zero" />
            <C_input v="Force logical zero" />
            <D_input v="Force logical zero" />
          </group>
        </group>
      </group>
      <group name="Pins">
        <group name="Term 0 pins">
          <boolgroup name="Boolean function A input" v="Enabled">
            <Pin v="PWMA1_TRG0_or_PWMA1_TRG1" />
          </boolgroup>
          <boolgroup name="Boolean function B input" v="Enabled">
            <Pin v="PWMB0_TRG0_or_PWMB0_TRG1" />
          </boolgroup>
          <boolgroup name="Boolean function C input" v="Disabled" />
          <boolgroup name="Boolean function D input" v="Disabled" />
          <boolgroup name="Boolean term output" v="Disabled" />
        </group>
        <group name="Term 1 pins">
          <boolgroup name="Boolean function A input" v="Disabled" />
          <boolgroup name="Boolean function B input" v="Disabled" />
          <boolgroup name="Boolean function C input" v="Disabled" />
          <boolgroup name="Boolean function D input" v="Disabled" />
          <boolgroup name="Boolean term output" v="Disabled" />
        </group>
        <group name="Term 2 pins">
          <boolgroup name="Boolean function A input" v="Disabled" />
          <boolgroup name="Boolean function B input" v="Disabled" />
          <boolgroup name="Boolean function C input" v="Disabled" />
          <boolgroup name="Boolean function D input" v="Disabled" />
          <boolgroup name="Boolean term output" v="Disabled" />
        </group>
        <group name="Term 3 pins">
          <boolgroup name="Boolean function A input" v="Disabled" />
          <boolgroup name="Boolean function B input" v="Disabled" />
          <boolgroup name="Boolean function C input" v="Disabled" />
          <boolgroup name="Boolean function D input" v="Disabled" />
          <boolgroup name="Boolean term output" v="Disabled" />
        </group>
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M1_ENC_A0" type="Init_TMR">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M1_ENC_A0" />
      <Device v="TMRA0" />
      <group name="Settings">
        <group name="Clock settings">
          <group name="Primary source">
            <Primary_source v="counter 1 input pin" />
          </group>
          <group name="Secondary source">
            <Secondary_source v="counter 0 input pin" />
          </group>
        </group>
        <Operation_mode v="Quadrature count mode" />
        <Count_once v="count repeatedly" />
        <Count_length v="count till compare, then reinitialize" />
        <Count_direction v="up" />
        <Master_mode v="Disabled" />
        <External_OFLAG_force v="Disabled" />
        <Forced_OFLAG_value v="0" />
        <Force_OFLAG_output v="no" />
        <Output_enable v="no" />
        <Output_polarity v="true" />
        <Input_polarity v="true" />
        <Co_channel_initialization v="Disabled" />
        <boolgroup name="Input capture mode" v="Enabled">
          <Load_capture_register v="on any edge of input" />
        </boolgroup>
        <Reload_on_capture v="no" />
        <Triggered_count_initialization v="Stop counter" />
        <OutputMode v="set on compare, cleared on secondary source input edge" />
        <boolgroup name="Compare load control 1" v="Disabled" />
        <boolgroup name="Compare load control 2" v="Disabled" />
        <Debug_mode_action v="Normal operation" />
        <Fault v="Disabled" />
        <Alternative_load v="Disabled" />
        <boolgroup name="Input filter" v="Disabled" />
      </group>
      <group name="Pins">
        <boolgroup name="Output" v="Disabled" />
        <boolgroup name="Input 0" v="Enabled">
          <Pin v="GPIOC9/SCK0/XB_IN4" />
        </boolgroup>
        <boolgroup name="Input 1" v="Enabled">
          <Pin v="GPIOC10/MOSI0/XB_IN5/MISO0" />
        </boolgroup>
        <boolgroup name="Input 2" v="Disabled" />
        <boolgroup name="Input 3" v="Disabled" />
      </group>
      <group name="Interrupts / DMA">
        <group name="Timer Channel">
          <Interrupt v="INT_TMRA_0" />
          <Timer_compare_interrupt v="Disabled" />
          <Timer_overflow_interrupt v="Disabled" />
          <Input_edge_interrupt v="Disabled" />
          <Compare_1_interrupt v="Disabled" />
          <Compare_2_interrupt v="Disabled" />
          <Interrupt_priority v="default" />
          <ISR_name v="" />
          <Input_edge_DMA v="Disabled" />
          <Compare_1_DMA v="Disabled" />
          <Compare_2_DMA v="Disabled" />
        </group>
      </group>
      <group name="Registers">
        <Timer_Compare_register_1 v="0" />
        <Timer_Compare_register_2 v="0" />
        <Timer_Capture_register v="0" />
        <Timer_Load_register v="0" />
        <Timer_Counter_register v="0" />
        <Timer_Comparator_Load_register_1 v="0" />
        <Timer_Comparator_Load_register_2 v="0" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Enable_channel v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M1_MTCap_A1" type="Init_TMR">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M1_MTCap_A1" />
      <Device v="TMRA1" />
      <group name="Settings">
        <group name="Clock settings">
          <group name="Primary source">
            <Primary_source v="prescaler (IP BUS clock / 128)" />
          </group>
          <group name="Secondary source">
            <Secondary_source v="counter 0 input pin" />
          </group>
        </group>
        <Operation_mode v="Count mode" />
        <Count_once v="count repeatedly" />
        <Count_length v="roll-over" />
        <Count_direction v="up" />
        <Master_mode v="Disabled" />
        <External_OFLAG_force v="Disabled" />
        <Forced_OFLAG_value v="0" />
        <Force_OFLAG_output v="no" />
        <Output_enable v="no" />
        <Output_polarity v="true" />
        <Input_polarity v="true" />
        <Co_channel_initialization v="Disabled" />
        <boolgroup name="Input capture mode" v="Enabled">
          <Load_capture_register v="on any edge of input" />
        </boolgroup>
        <Reload_on_capture v="no" />
        <Triggered_count_initialization v="Stop counter" />
        <OutputMode v="asserted while counter is active" />
        <boolgroup name="Compare load control 1" v="Disabled" />
        <boolgroup name="Compare load control 2" v="Disabled" />
        <Debug_mode_action v="Normal operation" />
        <Fault v="Disabled" />
        <Alternative_load v="Disabled" />
        <boolgroup name="Input filter" v="Disabled" />
      </group>
      <group name="Pins">
        <boolgroup name="Output" v="Disabled" />
        <boolgroup name="Input 0" v="Disabled" />
        <boolgroup name="Input 1" v="Disabled" />
        <boolgroup name="Input 2" v="Disabled" />
        <boolgroup name="Input 3" v="Disabled" />
      </group>
      <group name="Interrupts / DMA">
        <group name="Timer Channel">
          <Interrupt v="INT_TMRA_1" />
          <Timer_compare_interrupt v="Disabled" />
          <Timer_overflow_interrupt v="Disabled" />
          <Input_edge_interrupt v="Enabled" />
          <Compare_1_interrupt v="Disabled" />
          <Compare_2_interrupt v="Disabled" />
          <Interrupt_priority v="0" />
          <ISR_name v="M1_tmr_MTCap_isr" />
          <Input_edge_DMA v="Disabled" />
          <Compare_1_DMA v="Disabled" />
          <Compare_2_DMA v="Disabled" />
        </group>
      </group>
      <group name="Registers">
        <Timer_Compare_register_1 v="0" />
        <Timer_Compare_register_2 v="0" />
        <Timer_Capture_register v="0" />
        <Timer_Load_register v="0" />
        <Timer_Counter_register v="0" />
        <Timer_Comparator_Load_register_1 v="0" />
        <Timer_Comparator_Load_register_2 v="0" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Enable_channel v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M1_ZCnt_A2" type="Init_TMR">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M1_ZCnt_A2" />
      <Device v="TMRA2" />
      <group name="Settings">
        <group name="Clock settings">
          <group name="Primary source">
            <Primary_source v="counter 0 output pin" />
          </group>
          <group name="Secondary source">
            <Secondary_source v="counter 0 input pin" />
          </group>
        </group>
        <Operation_mode v="Count mode" />
        <Count_once v="count repeatedly" />
        <Count_length v="roll-over" />
        <Count_direction v="up" />
        <Master_mode v="Disabled" />
        <External_OFLAG_force v="Disabled" />
        <Forced_OFLAG_value v="0" />
        <Force_OFLAG_output v="no" />
        <Output_enable v="no" />
        <Output_polarity v="true" />
        <Input_polarity v="true" />
        <Co_channel_initialization v="Disabled" />
        <boolgroup name="Input capture mode" v="Disabled" />
        <Reload_on_capture v="no" />
        <Triggered_count_initialization v="Stop counter" />
        <OutputMode v="asserted while counter is active" />
        <boolgroup name="Compare load control 1" v="Disabled" />
        <boolgroup name="Compare load control 2" v="Disabled" />
        <Debug_mode_action v="Normal operation" />
        <Fault v="Disabled" />
        <Alternative_load v="Disabled" />
        <boolgroup name="Input filter" v="Disabled" />
      </group>
      <group name="Pins">
        <boolgroup name="Output" v="Disabled" />
        <boolgroup name="Input 0" v="Disabled" />
        <boolgroup name="Input 1" v="Disabled" />
        <boolgroup name="Input 2" v="Disabled" />
        <boolgroup name="Input 3" v="Disabled" />
      </group>
      <group name="Interrupts / DMA">
        <group name="Timer Channel">
          <Interrupt v="INT_TMRA_2" />
          <Timer_compare_interrupt v="Disabled" />
          <Timer_overflow_interrupt v="Disabled" />
          <Input_edge_interrupt v="Disabled" />
          <Compare_1_interrupt v="Disabled" />
          <Compare_2_interrupt v="Disabled" />
          <Interrupt_priority v="default" />
          <ISR_name v="" />
          <Input_edge_DMA v="Disabled" />
          <Compare_1_DMA v="Disabled" />
          <Compare_2_DMA v="Disabled" />
        </group>
      </group>
      <group name="Registers">
        <Timer_Compare_register_1 v="0" />
        <Timer_Compare_register_2 v="0" />
        <Timer_Capture_register v="0" />
        <Timer_Load_register v="0" />
        <Timer_Counter_register v="0" />
        <Timer_Comparator_Load_register_1 v="0" />
        <Timer_Comparator_Load_register_2 v="0" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Enable_channel v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M1_WatchDog_A3" type="Init_TMR">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M1_WatchDog_A3" />
      <Device v="TMRA3" />
      <group name="Settings">
        <group name="Clock settings">
          <group name="Primary source">
            <Primary_source v="prescaler (IP BUS clock / 128)" />
          </group>
          <group name="Secondary source">
            <Secondary_source v="counter 0 input pin" />
          </group>
        </group>
        <Operation_mode v="Count mode" />
        <Count_once v="count repeatedly" />
        <Count_length v="roll-over" />
        <Count_direction v="up" />
        <Master_mode v="Disabled" />
        <External_OFLAG_force v="Disabled" />
        <Forced_OFLAG_value v="0" />
        <Force_OFLAG_output v="no" />
        <Output_enable v="no" />
        <Output_polarity v="true" />
        <Input_polarity v="true" />
        <Co_channel_initialization v="Disabled" />
        <boolgroup name="Input capture mode" v="Enabled">
          <Load_capture_register v="on any edge of input" />
        </boolgroup>
        <Reload_on_capture v="yes" />
        <Triggered_count_initialization v="Stop counter" />
        <OutputMode v="asserted while counter is active" />
        <boolgroup name="Compare load control 1" v="Disabled" />
        <boolgroup name="Compare load control 2" v="Disabled" />
        <Debug_mode_action v="Normal operation" />
        <Fault v="Disabled" />
        <Alternative_load v="Disabled" />
        <boolgroup name="Input filter" v="Disabled" />
      </group>
      <group name="Pins">
        <boolgroup name="Output" v="Disabled" />
        <boolgroup name="Input 0" v="Disabled" />
        <boolgroup name="Input 1" v="Disabled" />
        <boolgroup name="Input 2" v="Disabled" />
        <boolgroup name="Input 3" v="Disabled" />
      </group>
      <group name="Interrupts / DMA">
        <group name="Timer Channel">
          <Interrupt v="INT_TMRA_3" />
          <Timer_compare_interrupt v="Disabled" />
          <Timer_overflow_interrupt v="Disabled" />
          <Input_edge_interrupt v="Disabled" />
          <Compare_1_interrupt v="Disabled" />
          <Compare_2_interrupt v="Disabled" />
          <Interrupt_priority v="default" />
          <ISR_name v="" />
          <Input_edge_DMA v="Disabled" />
          <Compare_1_DMA v="Disabled" />
          <Compare_2_DMA v="Disabled" />
        </group>
      </group>
      <group name="Registers">
        <Timer_Compare_register_1 v="60000" />
        <Timer_Compare_register_2 v="0" />
        <Timer_Capture_register v="0" />
        <Timer_Load_register v="0" />
        <Timer_Counter_register v="0" />
        <Timer_Comparator_Load_register_1 v="0" />
        <Timer_Comparator_Load_register_2 v="0" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Enable_channel v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M2_ENC_B0" type="Init_TMR">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M2_ENC_B0" />
      <Device v="TMRB0" />
      <group name="Settings">
        <group name="Clock settings">
          <group name="Primary source">
            <Primary_source v="counter 1 input pin" />
          </group>
          <group name="Secondary source">
            <Secondary_source v="counter 0 input pin" />
          </group>
        </group>
        <Operation_mode v="Quadrature count mode" />
        <Count_once v="count repeatedly" />
        <Count_length v="count till compare, then reinitialize" />
        <Count_direction v="up" />
        <Master_mode v="Disabled" />
        <External_OFLAG_force v="Disabled" />
        <Forced_OFLAG_value v="0" />
        <Force_OFLAG_output v="no" />
        <Output_enable v="no" />
        <Output_polarity v="true" />
        <Input_polarity v="true" />
        <Co_channel_initialization v="Disabled" />
        <boolgroup name="Input capture mode" v="Enabled">
          <Load_capture_register v="on any edge of input" />
        </boolgroup>
        <Reload_on_capture v="no" />
        <Triggered_count_initialization v="Stop counter" />
        <OutputMode v="set on compare, cleared on secondary source input edge" />
        <boolgroup name="Compare load control 1" v="Disabled" />
        <boolgroup name="Compare load control 2" v="Disabled" />
        <Debug_mode_action v="Normal operation" />
        <Fault v="Disabled" />
        <Alternative_load v="Disabled" />
        <boolgroup name="Input filter" v="Disabled" />
      </group>
      <group name="Pins">
        <boolgroup name="Output" v="Disabled" />
        <boolgroup name="Input 0" v="Enabled">
          <Pin v="GPIOF11/TXD0/XB_IN11" />
        </boolgroup>
        <boolgroup name="Input 1" v="Enabled">
          <Pin v="GPIOF15/RXD0/XB_IN10" />
        </boolgroup>
        <boolgroup name="Input 2" v="Disabled" />
        <boolgroup name="Input 3" v="Disabled" />
      </group>
      <group name="Interrupts / DMA">
        <group name="Timer Channel">
          <Interrupt v="INT_TMRB_0" />
          <Timer_compare_interrupt v="Disabled" />
          <Timer_overflow_interrupt v="Disabled" />
          <Input_edge_interrupt v="Disabled" />
          <Compare_1_interrupt v="Disabled" />
          <Compare_2_interrupt v="Disabled" />
          <Interrupt_priority v="default" />
          <ISR_name v="" />
          <Input_edge_DMA v="Disabled" />
          <Compare_1_DMA v="Disabled" />
          <Compare_2_DMA v="Disabled" />
        </group>
      </group>
      <group name="Registers">
        <Timer_Compare_register_1 v="0" />
        <Timer_Compare_register_2 v="0" />
        <Timer_Capture_register v="0" />
        <Timer_Load_register v="0" />
        <Timer_Counter_register v="0" />
        <Timer_Comparator_Load_register_1 v="0" />
        <Timer_Comparator_Load_register_2 v="0" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Enable_channel v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M2_MTCap_B1" type="Init_TMR">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M2_MTCap_B1" />
      <Device v="TMRB1" />
      <group name="Settings">
        <group name="Clock settings">
          <group name="Primary source">
            <Primary_source v="prescaler (IP BUS clock / 128)" />
          </group>
          <group name="Secondary source">
            <Secondary_source v="counter 0 input pin" />
          </group>
        </group>
        <Operation_mode v="Count mode" />
        <Count_once v="count repeatedly" />
        <Count_length v="roll-over" />
        <Count_direction v="up" />
        <Master_mode v="Disabled" />
        <External_OFLAG_force v="Disabled" />
        <Forced_OFLAG_value v="0" />
        <Force_OFLAG_output v="no" />
        <Output_enable v="no" />
        <Output_polarity v="true" />
        <Input_polarity v="true" />
        <Co_channel_initialization v="Disabled" />
        <boolgroup name="Input capture mode" v="Enabled">
          <Load_capture_register v="on rising edge of input" />
        </boolgroup>
        <Reload_on_capture v="no" />
        <Triggered_count_initialization v="Stop counter" />
        <OutputMode v="asserted while counter is active" />
        <boolgroup name="Compare load control 1" v="Disabled" />
        <boolgroup name="Compare load control 2" v="Disabled" />
        <Debug_mode_action v="Normal operation" />
        <Fault v="Disabled" />
        <Alternative_load v="Disabled" />
        <boolgroup name="Input filter" v="Disabled" />
      </group>
      <group name="Pins">
        <boolgroup name="Output" v="Disabled" />
        <boolgroup name="Input 0" v="Disabled" />
        <boolgroup name="Input 1" v="Disabled" />
        <boolgroup name="Input 2" v="Disabled" />
        <boolgroup name="Input 3" v="Disabled" />
      </group>
      <group name="Interrupts / DMA">
        <group name="Timer Channel">
          <Interrupt v="INT_TMRB_1" />
          <Timer_compare_interrupt v="Disabled" />
          <Timer_overflow_interrupt v="Disabled" />
          <Input_edge_interrupt v="Enabled" />
          <Compare_1_interrupt v="Disabled" />
          <Compare_2_interrupt v="Disabled" />
          <Interrupt_priority v="0" />
          <ISR_name v="M2_tmr_MTCap_isr" />
          <Input_edge_DMA v="Disabled" />
          <Compare_1_DMA v="Disabled" />
          <Compare_2_DMA v="Disabled" />
        </group>
      </group>
      <group name="Registers">
        <Timer_Compare_register_1 v="0" />
        <Timer_Compare_register_2 v="0" />
        <Timer_Capture_register v="0" />
        <Timer_Load_register v="0" />
        <Timer_Counter_register v="0" />
        <Timer_Comparator_Load_register_1 v="0" />
        <Timer_Comparator_Load_register_2 v="0" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Enable_channel v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M2_ZCnt_B2" type="Init_TMR">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M2_ZCnt_B2" />
      <Device v="TMRB2" />
      <group name="Settings">
        <group name="Clock settings">
          <group name="Primary source">
            <Primary_source v="counter 0 output pin" />
          </group>
          <group name="Secondary source">
            <Secondary_source v="counter 0 input pin" />
          </group>
        </group>
        <Operation_mode v="Count mode" />
        <Count_once v="count repeatedly" />
        <Count_length v="roll-over" />
        <Count_direction v="up" />
        <Master_mode v="Disabled" />
        <External_OFLAG_force v="Disabled" />
        <Forced_OFLAG_value v="0" />
        <Force_OFLAG_output v="no" />
        <Output_enable v="no" />
        <Output_polarity v="true" />
        <Input_polarity v="true" />
        <Co_channel_initialization v="Disabled" />
        <boolgroup name="Input capture mode" v="Disabled" />
        <Reload_on_capture v="no" />
        <Triggered_count_initialization v="Stop counter" />
        <OutputMode v="asserted while counter is active" />
        <boolgroup name="Compare load control 1" v="Disabled" />
        <boolgroup name="Compare load control 2" v="Disabled" />
        <Debug_mode_action v="Normal operation" />
        <Fault v="Disabled" />
        <Alternative_load v="Disabled" />
        <boolgroup name="Input filter" v="Disabled" />
      </group>
      <group name="Pins">
        <boolgroup name="Output" v="Disabled" />
        <boolgroup name="Input 0" v="Disabled" />
        <boolgroup name="Input 1" v="Disabled" />
        <boolgroup name="Input 2" v="Disabled" />
        <boolgroup name="Input 3" v="Disabled" />
      </group>
      <group name="Interrupts / DMA">
        <group name="Timer Channel">
          <Interrupt v="INT_TMRB_2" />
          <Timer_compare_interrupt v="Disabled" />
          <Timer_overflow_interrupt v="Disabled" />
          <Input_edge_interrupt v="Disabled" />
          <Compare_1_interrupt v="Disabled" />
          <Compare_2_interrupt v="Disabled" />
          <Interrupt_priority v="default" />
          <ISR_name v="" />
          <Input_edge_DMA v="Disabled" />
          <Compare_1_DMA v="Disabled" />
          <Compare_2_DMA v="Disabled" />
        </group>
      </group>
      <group name="Registers">
        <Timer_Compare_register_1 v="0" />
        <Timer_Compare_register_2 v="0" />
        <Timer_Capture_register v="0" />
        <Timer_Load_register v="0" />
        <Timer_Counter_register v="0" />
        <Timer_Comparator_Load_register_1 v="0" />
        <Timer_Comparator_Load_register_2 v="0" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Enable_channel v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M2_WatchDog_B3" type="Init_TMR">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M2_WatchDog_B3" />
      <Device v="TMRB3" />
      <group name="Settings">
        <group name="Clock settings">
          <group name="Primary source">
            <Primary_source v="prescaler (IP BUS clock / 128)" />
          </group>
          <group name="Secondary source">
            <Secondary_source v="counter 0 input pin" />
          </group>
        </group>
        <Operation_mode v="Count mode" />
        <Count_once v="count repeatedly" />
        <Count_length v="roll-over" />
        <Count_direction v="up" />
        <Master_mode v="Disabled" />
        <External_OFLAG_force v="Disabled" />
        <Forced_OFLAG_value v="0" />
        <Force_OFLAG_output v="no" />
        <Output_enable v="no" />
        <Output_polarity v="true" />
        <Input_polarity v="true" />
        <Co_channel_initialization v="Disabled" />
        <boolgroup name="Input capture mode" v="Enabled">
          <Load_capture_register v="on any edge of input" />
        </boolgroup>
        <Reload_on_capture v="yes" />
        <Triggered_count_initialization v="Stop counter" />
        <OutputMode v="asserted while counter is active" />
        <boolgroup name="Compare load control 1" v="Disabled" />
        <boolgroup name="Compare load control 2" v="Disabled" />
        <Debug_mode_action v="Normal operation" />
        <Fault v="Disabled" />
        <Alternative_load v="Disabled" />
        <boolgroup name="Input filter" v="Disabled" />
      </group>
      <group name="Pins">
        <boolgroup name="Output" v="Disabled" />
        <boolgroup name="Input 0" v="Disabled" />
        <boolgroup name="Input 1" v="Disabled" />
        <boolgroup name="Input 2" v="Disabled" />
        <boolgroup name="Input 3" v="Disabled" />
      </group>
      <group name="Interrupts / DMA">
        <group name="Timer Channel">
          <Interrupt v="INT_TMRB_3" />
          <Timer_compare_interrupt v="Disabled" />
          <Timer_overflow_interrupt v="Disabled" />
          <Input_edge_interrupt v="Disabled" />
          <Compare_1_interrupt v="Disabled" />
          <Compare_2_interrupt v="Disabled" />
          <Interrupt_priority v="default" />
          <ISR_name v="" />
          <Input_edge_DMA v="Disabled" />
          <Compare_1_DMA v="Disabled" />
          <Compare_2_DMA v="Disabled" />
        </group>
      </group>
      <group name="Registers">
        <Timer_Compare_register_1 v="60000" />
        <Timer_Compare_register_2 v="0" />
        <Timer_Capture_register v="0" />
        <Timer_Load_register v="0" />
        <Timer_Counter_register v="0" />
        <Timer_Comparator_Load_register_1 v="0" />
        <Timer_Comparator_Load_register_2 v="0" />
      </group>
      <group name="Initialization">
        <Call_Init_method v="yes" />
        <Enable_peripheral_clock v="yes" />
        <Enable_channel v="yes" />
      </group>
    </Properties>
    <Methods>
      <Init v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M1_HU_C4" type="InputPin">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M1_HU_C4" />
      <Pin_for_Input v="GPIOC4/TA1/CMPB_O/XB_IN8/EWM_OUT_B" />
    </Properties>
    <Methods>
      <GetVal v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M1_HV_G8" type="InputPin">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M1_HV_G8" />
      <Pin_for_Input v="GPIOG8/PWMB_0X/PWMA_0X/TA2/XB_OUT10" />
    </Properties>
    <Methods>
      <GetVal v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M1_HW_G9" type="InputPin">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M1_HW_G9" />
      <Pin_for_Input v="GPIOG9/PWMB_1X/PWMA_1X/TA3/XB_OUT11" />
    </Properties>
    <Methods>
      <GetVal v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M2_HU_F8" type="InputPin">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M2_HU_F8" />
      <Pin_for_Input v="GPIOF8/RXD0/TB1/CMPD_O" />
    </Properties>
    <Methods>
      <GetVal v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M2_HV_F6" type="InputPin">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M2_HV_F6" />
      <Pin_for_Input v="GPIOF6/TB2/PWMA_3X/PWMB_3X/XB_IN2" />
    </Properties>
    <Methods>
      <GetVal v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="M2_HW_G11" type="InputPin">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="M2_HW_G11" />
      <Pin_for_Input v="GPIOG11/TB3/CLKO0/MOSI1" />
    </Properties>
    <Methods>
      <GetVal v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="GF13" type="BitIO">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="GF13" />
      <Pin_for_I_O v="GPIOF13/MOSI1/PWMB_FAULT1" />
      <Pull_resistor sel_value="no pull resistor">
        
autoselected pull

        <EmptySection_DummyValue />
      </Pull_resistor>
      <Open_drain v="push-pull" />
      <Drive_strength_for_GPIOF13 v="Low" />
      <Slew_rate_for_GPIOF13 v="Slow" />
      <Direction v="Output" />
      <group name="Initialization">
        <Init__direction v="Output" />
        <Init__value v="0" />
      </group>
      <Safe_mode v="yes" />
      <Optimization_for v="speed" />
    </Properties>
    <Methods>
      <GetDir v="don&amp;apos;t generate code" />
      <SetDir v="don&amp;apos;t generate code" />
      <SetInput v="don&amp;apos;t generate code" />
      <SetOutput v="don&amp;apos;t generate code" />
      <GetVal v="generate code" />
      <PutVal v="generate code" />
      <ClrVal v="generate code" />
      <SetVal v="generate code" />
      <NegVal v="generate code" />
      <ConnectPin v="don&amp;apos;t generate code" />
      <GetRawVal v="don&amp;apos;t generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="GF12" type="BitIO">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="GF12" />
      <Pin_for_I_O v="GPIOF12/MISO1/PWMB_FAULT2" />
      <Pull_resistor sel_value="no pull resistor">
        
autoselected pull

        <EmptySection_DummyValue />
      </Pull_resistor>
      <Open_drain v="push-pull" />
      <Drive_strength_for_GPIOF12 v="Low" />
      <Slew_rate_for_GPIOF12 v="Slow" />
      <Direction v="Output" />
      <group name="Initialization">
        <Init__direction v="Output" />
        <Init__value v="0" />
      </group>
      <Safe_mode v="yes" />
      <Optimization_for v="speed" />
    </Properties>
    <Methods>
      <GetDir v="don&amp;apos;t generate code" />
      <SetDir v="don&amp;apos;t generate code" />
      <SetInput v="don&amp;apos;t generate code" />
      <SetOutput v="don&amp;apos;t generate code" />
      <GetVal v="generate code" />
      <PutVal v="generate code" />
      <ClrVal v="generate code" />
      <SetVal v="generate code" />
      <NegVal v="generate code" />
      <ConnectPin v="don&amp;apos;t generate code" />
      <GetRawVal v="don&amp;apos;t generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="GPIOD5" type="InputPin">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="GPIOD5" />
      <Pin_for_Input v="GPIOD5/RXD2/XB_IN5/XB_OUT9" />
    </Properties>
    <Methods>
      <GetVal v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
  <Bean name="GPIOD6" type="InputPin">
    <Enabled v="Y" />
    <Properties>
      <Component_name v="GPIOD6" />
      <Pin_for_Input v="GPIOD6/TXD2/XB_IN4/XB_OUT8" />
    </Properties>
    <Methods>
      <GetVal v="generate code" />
    </Methods>
    <Events>
      <EmptySection_DummyValue />
    </Events>
  </Bean>
</PE_PROJECT_SETTINGS_DOCUMENTATION>

