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-- Motorola PowerPC VGER (TM) Microprocessor Boundary Scan Description Language-
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-- Boundary Scan Description Language (IEEE 1149.1b) --
-- --
-- Device : MPC7448 Revision 1 --
-- File Version : A --
-- File Name : MPC7448.R1A --
-- File created : October 25, 2004 --
-- Package type : CBGA --
-- Voltage Level : 2.5V --
-- 1149.1 Device Test : untested --
-- System Level Test : untested --
-- --
--------------------------------------------------------------------------------
-- Revision History: --
-- 1A - Original version for MPC7448 --
-- --
-- --
-- NOTE: Active low ports are designated with a "_L" suffix. --
-- --
-- NOTE: The IEEE 1149.1 standard optional instructions CLAMP and HIGHZ are --
-- supported. --
-- --
-- NOTE: For assistance with this file, contact your sales office. --
-- --
--------------------------------------------------------------------------------
-- --
--============================================================================--
-- IMPORTANT NOTICE --
-- This information is provided on an AS IS basis and without warranty. --
-- IN NO EVENT SHALL FREESCALE BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL --
-- DAMAGES ARISING FROM USE OF THIS INFORMATION. THIS DISCLAIMER OF --
-- WARRANTY EXTENDS TO THE USER OF THE INFORMATION, AND TO THEIR CUSTOMERS --
-- OR USERS OF PRODUCTS AND IS IN LIEU OF ALL WARRANTIES WHETHER EXPRESS, --
-- IMPLIED, OR STATUTORY, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY --
-- OR FITNESS FOR PARTICULAR PURPOSE. --
-- --
-- FREESCALE does not represent or warrant that the information furnished --
-- hereunder is free of infringement of any third party patents, --
-- copyrights, trade secrets, or other intellectual property rights. --
-- FREESCALE does not represent or warrant that the information is free of --
-- defect, or that it meets any particular standard, requirements or need --
-- of the user of the infomation or their customers. --
-- --
-- FREESCALE reserves the right to change the information in this file --
-- without notice. The latest version of the file is available on the --
-- World Wide Web at: --
-- --
-- http://www.freescale.com --
-- --
--============================================================================--
entity MPC7448 is
generic (PHYSICAL_PIN_MAP : string := "BGA");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port ( BR_L: out bit;
BG_L: in bit;
TS_L: inout bit;
A: inout bit_vector(0 to 35);
AP: inout bit_vector(0 to 4);
TT: inout bit_vector(0 to 4);
TSIZ: out bit_vector(0 to 2);
TBST_L: inout bit;
CI_L: out bit;
WT_L: out bit;
GBL_L: inout bit;
AACK_L: in bit;
ARTRY_L: inout bit;
SHD0_L: inout bit;
SHD1_L: inout bit;
DBG_L: in bit;
DTI: in bit_vector(0 to 3);
DRDY_L: out bit;
HIT_L: out bit;
DX_L: in bit;
D: inout bit_vector(0 to 63);
DP: inout bit_vector(0 to 7);
TA_L: in bit;
TEA_L: in bit;
HPR_L: out bit;
IARTRY0_L: in bit;
BMODE_L: in bit_vector(0 to 1);
CHKS_L: in bit;
SRW_L: in bit_vector(0 to 1);
INT_L: in bit;
SMI_B: in bit;
MCP_L: in bit;
SRESET_L: in bit;
HRESET_L: in bit;
TBEN: in bit;
CKSTP_IN_L: in bit;
CKSTP_OUT_L: out bit;
PMON_OUT_L: out bit;
PMON_IN_L: in bit;
QREQ_L: out bit;
QACK_L: in bit;
SYSCLK: in bit;
PLL_CFG: in bit_vector(0 to 3);
PLL_EXT: in bit;
CLK_OUT: out bit;
EXT_QUAL: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
TCK: in bit;
TRST_L: in bit;
LSSD_MODE_L: in bit;
L1_TSTCLK: in bit;
L2_TSTCLK: in bit;
BVSEL: in bit;
GND: linkage bit_vector(0 to 68);
OVDD: linkage bit_vector(0 to 27);
VDD: linkage bit_vector(0 to 42);
AVDD: linkage bit;
NC: linkage bit_vector(0 to 38));
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of MPC7448 : entity is "STD_1149_1_1993";
attribute PIN_MAP of MPC7448 : entity is PHYSICAL_PIN_MAP;
constant BGA: PIN_MAP_STRING :=
-- CBGA PINOUT DIAGRAM
--
"BR_L: D2, "&
"BG_L: M1, "&
"TS_L: L4, "&
"A: (E11, H1 , C11, G3 , F10, L2 , D11, D1 , C10, G2,"&
"D12, L3 , G4 , T2 , F4 , V1 , J4 , R2 , K5 , W2,"&
"J2 , K4 , N4 , J3 , M5 , P5 , N3 , T1 , V2 , U1,"&
"N5 , W1 , B12, C4 , G10, B11), "&
"AP: (C1 , E3 , H6 , F5 , G7), "&
"TT: (E5 , E6 , F6 , E9 , C5), "&
"TSIZ: (G6 , F7 , E7), "&
"TBST_L: F11, "&
"CI_L: J1, "&
"WT_L: D3, "&
"GBL_L: E2, "&
"AACK_L: R1, "&
"ARTRY_L: N2, "&
"SHD0_L: E4, "&
"SHD1_L: H5, "&
"DBG_L: M2, "&
"DTI: (G1 , K1 , P1 , N1), "&
"DRDY_L: R3, "&
"HIT_L: B2, "&
"DX_L: D10, "&
"D: (R15, W15, T14, V16, W16, T15, U15, P14, V13, W13,"&
"T13, P13, U14, W14, R12, T12, W12, V12, N11, N10,"&
"R11, U11, W11, T11, R10, N9 , P10, U10, R9 , W10,"&
"U9 , V9 , W5 , U6 , T5 , U5 , W7 , R6 , P7 , V6, "&
"P17, R19, V18, R18, V19, T19, U19, W19, U18, W17,"&
"W18, T16, T18, T17, W3 , V17, U4 , U8 , U7 , R7, "&
"P6 , R8 , W8 , T8 ), "&
"DP: (T3 , W4 , T4 , W9 , M6 , V3 , N8 , W6 ), "&
"TA_L: K6, "&
"TEA_L: L1, "&
"HPR_L: A6, "&
"IARTRY0_L: B6, "&
"BMODE_L: (G9 , F8), "&
"CHKS_L: A12, "&
"SRW_L: (B10, E10), "&
"INT_L: D4, "&
"SMI_B: F9, "&
"MCP_L: C9, "&
"SRESET_L: A2, "&
"HRESET_L: D8, "&
"TBEN: E1, "&
"CKSTP_IN_L: A3, "&
"CKSTP_OUT_L: B1, "&
"PMON_OUT_L: A9, "&
"PMON_IN_L: D9, "&
"QREQ_L: P4, "&
"QACK_L: G5, "&
"SYSCLK: A10, "&
"PLL_CFG: (B8 , C8 , C7 , D7), "&
"PLL_EXT: A7, "&
"CLK_OUT: H2, "&
"TDI: B9, "&
"TDO: A4, "&
"TMS: F1, "&
"TCK: C6, "&
"TRST_L: A5, "&
"LSSD_MODE_L: E8, "&
"L1_TSTCLK: G8, "&
"L2_TSTCLK: B3, "&
"EXT_QUAL: A11, "&
"BVSEL: B7, "&
"AVDD: A8, "&
"GND: (A17 , A19 , B5 , B13 , B16 , B18 , C3 , D6 , D13 , E12 ,"&
"E17 , E19 , F3 , F13 , F16 , F18 , G17 , G19 , H4 , H7 ,"&
"H9 , H11 , H13 , H18 , J6 , J8 , J10 , J12 , J14 , K3 ,"&
"K7 , K9 , K11 , K13 , L6 , L8 , L10 , L12 , L14 , M4 ,"&
"M7 , M9 , M11 , M13 , M15 , M17 , M19 , N7 , N14 , N16 ,"&
"P3 , P9 , P12 , P15 , P19 , R5 , R14 , R17 , T7 , T10 ,"&
"U3 , U13 , U17 , V5 , V8 , V11 , V15 , N13 , G12), "&
"OVDD: (B4 , C2 , C12 , D5 , F2 , H3 , J5 , K2 , L5 , M3 ,"&
"N6 , P2 , P8 , P11 , R4 , R13 , R16 , T6 , T9 , U2 ,"&
"U12 , U16 , V4 , V7 , V10 , V14 , E18 , G18), "&
"VDD: (A13 , A16 , A18 , B17 , B19 , C13 , E13 , E16 , F12 , F17 ,"&
"F19 , G11 , G16 , H8 , H10 , H12 , H14 , H17 , H19 , J7 ,"&
"J9 , J11 , J13 , K8 , K10 , K12 , K14 , L7 , L9 , L11 ,"&
"L13 , M8 , M10 , M12 , M14 , M16 , M18 , N15 , N17 , P16 ,"&
"P18 , N12 , G13), "&
"NC: (A14 , C15 , D15 , E15 , F15 , G15 , H15 , J15 , K15 , L15 ,"&
"C16 , B14 , D16 , C17 , D17 , C18 , D18 , C19 , D19 , H16 ,"&
"J16 , K16 , C14 , L16 , J17 , K17 , L17 , J18 , K18 , L18 ,"&
"J19 , K19 , L19 , D14 , E14 , F14 , G14 , A15 , B15) ";
-- Other Pin Maps here when documented
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_RESET of TRST_L : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (30.0e6, BOTH);
attribute COMPLIANCE_PATTERNS of MPC7448: entity is
"(LSSD_MODE_L,L1_TSTCLK,L2_TSTCLK) (10X)";
attribute INSTRUCTION_LENGTH of MPC7448 : entity is 16;
attribute INSTRUCTION_OPCODE of MPC7448 : entity is
-- Public instructions:
"EXTEST (0000000000000000), "& -- Hex 0000
"SAMPLE (0000000011110000), "& -- Hex 00F0
"BYPASS (1111111111111111), "& -- Hex FFFF
"HIGHZ (0000000011110010), "& -- Hex 00F2
"CLAMP (0000000011110001), "& -- Hex 00F1
"IDCODE (0000000011110011), "& -- Hex 00F3
-- Private instructions:
"PRIVATE000(0000000000010000), "&
"PRIVATE001(0000000000010001), "&
"PRIVATE002(0000000000010010), "&
"PRIVATE003(0000000000010011), "&
"PRIVATE004(0000000000010100), "&
"PRIVATE005(0000000000010101), "&
"PRIVATE006(0000000000010110), "&
"PRIVATE007(0000000000010111), "&
"PRIVATE008(0000000000011000), "&
"PRIVATE009(0000000000001010), "&
"PRIVATE010(0000100000001010), "&
"PRIVATE011(0000100100001010), "&
"PRIVATE012(0000101000001010), "&
"PRIVATE013(0000101100001010), "&
"PRIVATE014(0001000000001010), "&
"PRIVATE015(0001000100001010), "&
"PRIVATE016(0001001000001010), "&
"PRIVATE017(0001001100001010), "&
"PRIVATE018(0001010000001010), "&
"PRIVATE019(0001010100001010), "&
"PRIVATE020(0001011000001010), "&
"PRIVATE021(0000000000110000), "&
"PRIVATE022(0000000000110001), "&
"PRIVATE023(0000000010001000), "&
"PRIVATE024(0000000000001110), "&
"PRIVATE025(0000000000001100), "&
"PRIVATE026(0000000000001011), "&
"PRIVATE027(0000000000001001), "&
"PRIVATE028(0000000000001000), "&
"PRIVATE029(0000000000000111), "&
"PRIVATE030(0000000000000110), "&
"PRIVATE031(0000000000000101), "&
"PRIVATE032(0000000000000011), "&
"PRIVATE033(0000000000000100)";
attribute INSTRUCTION_CAPTURE of MPC7448 : entity is "xxxxxxxxxxxxxx01";
-- Use of some private opcodes can result in damage to the circuit,
-- board, or system.
attribute INSTRUCTION_PRIVATE of MPC7448 : entity is
"PRIVATE000, PRIVATE001, PRIVATE002, PRIVATE003, "&
"PRIVATE004, PRIVATE005, PRIVATE006, PRIVATE007, "&
"PRIVATE008, PRIVATE009, PRIVATE010, PRIVATE011, "&
"PRIVATE012, PRIVATE013, PRIVATE014, PRIVATE015, "&
"PRIVATE016, PRIVATE017, PRIVATE018, PRIVATE019, "&
"PRIVATE020, PRIVATE021, PRIVATE022, PRIVATE023, "&
"PRIVATE024, PRIVATE025, PRIVATE026, PRIVATE027, "&
"PRIVATE028, PRIVATE029, PRIVATE030, PRIVATE031, "&
"PRIVATE032, PRIVATE033";
attribute IDCODE_REGISTER of MPC7448 : entity is
"0000" & -- Version
"0000000000000100" & -- Part number
"00000001110" & -- Manufacturer Identity
"1"; -- Manditory LSB
attribute REGISTER_ACCESS of MPC7448 : entity is
"BYPASS(BYPASS),"&
"BOUNDARY (SAMPLE)";
attribute BOUNDARY_LENGTH of MPC7448 : entity is 228;
attribute BOUNDARY_REGISTER of MPC7448 : entity is
-- PORT DESCRIPTION TERMS
-- cell type: BC_6 bidirectional else BC_2
-- port: port name with index if port description says bit_vector
-- function
-- input = input only
-- bidir = bidirectional
-- control = control cell
-- buffer = output only
-- output3 = three state ouput
-- observe_only = observe only
-- safe = value in control cell to make input = 0 for bidir and controlr
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt = result if disabled (input = Z)
-- tdo = first cell shifted out during ShiftDR
-- num cell port function safe ccell dsval rslt
"0 (BC_2, *, control, 0)," &
"1 (BC_6, AP(4), bidir, 0, 0, 0, Z)," &
"2 (BC_2, *, control, 0)," &
"3 (BC_1, CLK_OUT, output3, 0, 2, 0, Z)," &
"4 (BC_1, HPR_L, output3, 0, 5, 0, Z)," &
"5 (BC_2, *, control, 0)," &
"6 (BC_2, SMI_B, input, X)," &
"7 (BC_2, SRESET_L, input, X)," &
"8 (BC_2, CHKS_L, input, X)," &
"9 (BC_2, IARTRY0_L, input, X)," &
"10 (BC_2, CKSTP_IN_L, input, X)," &
"11 (BC_2, *, control, 0)," &
"12 (BC_1, CKSTP_OUT_L, output3, 0, 11, 0, Z)," &
"13 (BC_2, *, control, 0)," &
"14 (BC_1, HIT_L, output3, 0, 13, 0, Z)," &
"15 (BC_1, BR_L, output3, 0, 16, 0, Z)," &
"16 (BC_2, *, control, 0)," &
"17 (BC_6, A(2), bidir, 0, 18, 0, Z)," &
"18 (BC_2, *, control, 0)," &
"19 (BC_2, *, control, 0)," &
"20 (BC_6, TT(2), bidir, 0, 21, 0, Z)," &
"21 (BC_2, *, control, 0)," &
"22 (BC_6, TT(4), bidir, 0, 21, 0, Z)," &
"23 (BC_6, TT(3), bidir, 0, 21, 0, Z)," &
"24 (BC_2, *, control, 0)," &
"25 (BC_6, TT(1), bidir, 0, 24, 0, Z)," &
"26 (BC_6, TT(0), bidir, 0, 24, 0, Z)," &
"27 (BC_6, A(10), bidir, 0, 29, 0, Z)," &
"28 (BC_6, A(34), bidir, 0, 19, 0, Z)," &
"29 (BC_2, *, control, 0)," &
"30 (BC_6, A(32), bidir, 0, 19, 0, Z)," &
"31 (BC_6, SHD1_L, bidir, 0, 32, 0, Z)," &
"32 (BC_2, *, control, 0)," &
"33 (BC_2, QACK_L, input, X)," &
"34 (BC_6, A(33), bidir, 0, 19, 0, Z)," &
"35 (BC_6, AP(2), bidir, 0, 36, 0, Z)," &
"36 (BC_2, *, control, 0)," &
"37 (BC_6, A(9), bidir, 0, 29, 0, Z)," &
"38 (BC_6, A(7), bidir, 0, 29, 0, Z)," &
"39 (BC_6, A(12), bidir, 0, 45, 0, Z)," &
"40 (BC_2, *, control, 0)," &
"41 (BC_6, A(1), bidir, 0, 40, 0, Z)," &
"42 (BC_6, A(4), bidir, 0, 65, 0, Z)," &
"43 (BC_6, A(35), bidir, 0, 45, 0, Z)," &
"44 (BC_6, A(16), bidir, 0, 45, 0, Z)," &
"45 (BC_2, *, control, 0)," &
"46 (BC_6, A(23), bidir, 0, 40, 0, Z)," &
"47 (BC_6, A(0), bidir, 0, 45, 0, Z)," &
"48 (BC_2, *, control, 0)," &
"49 (BC_6, SHD0_L, bidir, 0, 48, 0, Z)," &
"50 (BC_6, A(8), bidir, 0, 40, 0, Z)," &
"51 (BC_6, A(6), bidir, 0, 52, 0, Z)," &
"52 (BC_2, *, control, 0)," &
"53 (BC_6, A(18), bidir, 0, 52, 0, Z)," &
"54 (BC_6, A(3), bidir, 0, 52, 0, Z)," &
"55 (BC_1, TSIZ(2), output3, 0, 59, 0, Z)," &
"56 (BC_2, *, control, 0)," &
"57 (BC_1, TSIZ(0), output3, 0, 59, 0, Z)," &
"58 (BC_6, A(14), bidir, 0, 56, 0, Z)," &
"59 (BC_2, *, control, 0)," &
"60 (BC_6, A(20), bidir, 0, 40, 0, Z)," &
"61 (BC_2, *, control, 0)," &
"62 (BC_6, ARTRY_L, bidir, 0, 61, 0, Z)," &
"63 (BC_1, TSIZ(1), output3, 0, 59, 0, Z)," &
"64 (BC_6, A(13), bidir, 0, 65, 0, Z)," &
"65 (BC_2, *, control, 0)," &
"66 (BC_6, GBL_L, bidir, 0, 67, 0, Z)," &
"67 (BC_2, *, control, 0)," &
"68 (BC_6, A(21), bidir, 0, 65, 0, Z)," &
"69 (BC_6, A(5), bidir, 0, 71, 0, Z)," &
"70 (BC_6, A(11), bidir, 0, 71, 0, Z)," &
"71 (BC_2, *, control, 0)," &
"72 (BC_6, A(19), bidir, 0, 71, 0, Z)," &
"73 (BC_6, A(15), bidir, 0, 75, 0, Z)," &
"74 (BC_6, A(29), bidir, 0, 75, 0, Z)," &
"75 (BC_2, *, control, 0)," &
"76 (BC_6, A(31), bidir, 0, 71, 0, Z)," &
"77 (BC_6, TS_L, bidir, 0, 78, 0, Z)," &
"78 (BC_2, *, control, 0)," &
"79 (BC_6, A(25), bidir, 0, 75, 0, Z)," &
"80 (BC_6, A(17), bidir, 0, 82, 0, Z)," &
"81 (BC_6, A(27), bidir, 0, 82, 0, Z)," &
"82 (BC_2, *, control, 0)," &
"83 (BC_2, TBEN, input, X)," &
"84 (BC_6, A(28), bidir, 0, 82, 0, Z)," &
"85 (BC_6, A(24), bidir, 0, 82, 0, Z)," &
"86 (BC_6, AP(1), bidir, 0, 89, 0, Z)," &
"87 (BC_6, AP(0), bidir, 0, 89, 0, Z)," &
"88 (BC_2, INT_L, input, X)," &
"89 (BC_2, *, control, 0)," &
"90 (BC_6, AP(3), bidir, 0, 89, 0, Z)," &
"91 (BC_6, A(26), bidir, 0, 93, 0, Z)," &
"92 (BC_6, A(22), bidir, 0, 93, 0, Z)," &
"93 (BC_2, *, control, 0)," &
"94 (BC_2, TEA_L, input, X)," &
"95 (BC_2, DBG_L, input, X)," &
"96 (BC_6, A(30), bidir, 0, 97, 0, Z)," &
"97 (BC_2, *, control, 0)," &
"98 (BC_2, DTI(0), input, X)," &
"99 (BC_2, BG_L, input, X)," &
"100 (BC_2, DTI(1), input, X)," &
"101 (BC_2, DTI(2), input, X)," &
"102 (BC_2, *, control, 0)," &
"103 (BC_1, WT_L, output3, 0, 102, 0, Z)," &
"104 (BC_2, AACK_L, input, X)," &
"105 (BC_6, DP(2), bidir, 0, 106, 0, Z)," &
"106 (BC_2, *, control, 0)," &
"107 (BC_1, CI_L, output3, 0, 108, 0, Z)," &
"108 (BC_2, *, control, 0)," &
"109 (BC_2, DTI(3), input, X)," &
"110 (BC_2, TA_L, input, X)," &
"111 (BC_6, DP(4), bidir, 0, 115, 0, Z)," &
"112 (BC_2, *, control, 0)," &
"113 (BC_1, QREQ_L, output3, 0, 112, 0, Z)," &
"114 (BC_6, D(56), bidir, 0, 118, 0, Z)," &
"115 (BC_2, *, control, 0)," &
"116 (BC_6, DP(0), bidir, 0, 115, 0, Z)," &
"117 (BC_6, D(59), bidir, 0, 118, 0, Z)," &
"118 (BC_2, *, control, 0)," &
"119 (BC_6, DP(1), bidir, 0, 115, 0, Z)," &
"120 (BC_1, DRDY_L, output3, 0, 121, 0, Z)," &
"121 (BC_2, *, control, 0)," &
"122 (BC_6, DP(7), bidir, 0, 124, 0, Z)," &
"123 (BC_6, D(60), bidir, 0, 127, 0, Z)," &
"124 (BC_2, *, control, 0)," &
"125 (BC_6, DP(5), bidir, 0, 124, 0, Z)," &
"126 (BC_6, D(34), bidir, 0, 130, 0, Z)," &
"127 (BC_2, *, control, 0)," &
"128 (BC_6, D(32), bidir, 0, 130, 0, Z)," &
"129 (BC_6, D(33), bidir, 0, 133, 0, Z)," &
"130 (BC_2, *, control, 0)," &
"131 (BC_6, D(37), bidir, 0, 133, 0, Z)," &
"132 (BC_6, D(39), bidir, 0, 130, 0, Z)," &
"133 (BC_2, *, control, 0)," &
"134 (BC_6, D(54), bidir, 0, 133, 0, Z)," &
"135 (BC_6, D(58), bidir, 0, 133, 0, Z)," &
"136 (BC_2, *, control, 0)," &
"137 (BC_6, DP(6), bidir, 0, 136, 0, Z)," &
"138 (BC_6, D(35), bidir, 0, 140, 0, Z)," &
"139 (BC_6, D(19), bidir, 0, 140, 0, Z)," &
"140 (BC_2, *, control, 0)," &
"141 (BC_6, D(57), bidir, 0, 140, 0, Z)," &
"142 (BC_6, D(36), bidir, 0, 145, 0, Z)," &
"143 (BC_6, DP(3), bidir, 0, 144, 0, Z)," &
"144 (BC_2, *, control, 0)," &
"145 (BC_2, *, control, 0)," &
"146 (BC_6, D(31), bidir, 0, 145, 0, Z)," &
"147 (BC_6, D(38), bidir, 0, 150, 0, Z)," &
"148 (BC_6, D(62), bidir, 0, 150, 0, Z)," &
"149 (BC_6, D(63), bidir, 0, 145, 0, Z)," &
"150 (BC_2, *, control, 0)," &
"151 (BC_6, D(61), bidir, 0, 150, 0, Z)," &
"152 (BC_6, D(22), bidir, 0, 150, 0, Z)," &
"153 (BC_6, D(25), bidir, 0, 155, 0, Z)," &
"154 (BC_6, D(29), bidir, 0, 155, 0, Z)," &
"155 (BC_2, *, control, 0)," &
"156 (BC_6, D(30), bidir, 0, 155, 0, Z)," &
"157 (BC_6, D(28), bidir, 0, 155, 0, Z)," &
"158 (BC_6, D(27), bidir, 0, 160, 0, Z)," &
"159 (BC_6, D(24), bidir, 0, 160, 0, Z)," &
"160 (BC_2, *, control, 0)," &
"161 (BC_6, D(18), bidir, 0, 160, 0, Z)," &
"162 (BC_6, D(21), bidir, 0, 165, 0, Z)," &
"163 (BC_6, D(26), bidir, 0, 165, 0, Z)," &
"164 (BC_6, D(23), bidir, 0, 160, 0, Z)," &
"165 (BC_2, *, control, 0)," &
"166 (BC_6, D(9), bidir, 0, 165, 0, Z)," &
"167 (BC_6, D(8), bidir, 0, 165, 0, Z)," &
"168 (BC_6, D(14), bidir, 0, 165, 0, Z)," &
"169 (BC_6, D(16), bidir, 0, 170, 0, Z)," &
"170 (BC_2, *, control, 0)," &
"171 (BC_6, D(40), bidir, 0, 170, 0, Z)," &
"172 (BC_6, D(15), bidir, 0, 170, 0, Z)," &
"173 (BC_6, D(20), bidir, 0, 174, 0, Z)," &
"174 (BC_2, *, control, 0)," &
"175 (BC_6, D(17), bidir, 0, 174, 0, Z)," &
"176 (BC_6, D(50), bidir, 0, 174, 0, Z)," &
"177 (BC_6, D(55), bidir, 0, 174, 0, Z)," &
"178 (BC_6, D(10), bidir, 0, 180, 0, Z)," &
"179 (BC_6, D(11), bidir, 0, 180, 0, Z)," &
"180 (BC_2, *, control, 0)," &
"181 (BC_6, D(13), bidir, 0, 185, 0, Z)," &
"182 (BC_6, D(2), bidir, 0, 180, 0, Z)," &
"183 (BC_6, D(49), bidir, 0, 180, 0, Z)," &
"184 (BC_6, D(6), bidir, 0, 185, 0, Z)," &
"185 (BC_2, *, control, 0)," &
"186 (BC_6, D(41), bidir, 0, 185, 0, Z)," &
"187 (BC_6, D(12), bidir, 0, 185, 0, Z)," &
"188 (BC_6, D(4), bidir, 0, 190, 0, Z)," &
"189 (BC_6, D(1), bidir, 0, 190, 0, Z)," &
"190 (BC_2, *, control, 0)," &
"191 (BC_6, D(52), bidir, 0, 190, 0, Z)," &
"192 (BC_6, D(5), bidir, 0, 195, 0, Z)," &
"193 (BC_6, D(3), bidir, 0, 195, 0, Z)," &
"194 (BC_6, D(0), bidir, 0, 190, 0, Z)," &
"195 (BC_2, *, control, 0)," &
"196 (BC_6, D(51), bidir, 0, 195, 0, Z)," &
"197 (BC_6, D(42), bidir, 0, 195, 0, Z)," &
"198 (BC_6, D(53), bidir, 0, 200, 0, Z)," &
"199 (BC_6, D(7), bidir, 0, 200, 0, Z)," &
"200 (BC_2, *, control, 0)," &
"201 (BC_6, D(47), bidir, 0, 205, 0, Z)," &
"202 (BC_6, D(43), bidir, 0, 200, 0, Z)," &
"203 (BC_6, D(44), bidir, 0, 200, 0, Z)," &
"204 (BC_6, D(48), bidir, 0, 205, 0, Z)," &
"205 (BC_2, *, control, 0)," &
"206 (BC_6, D(45), bidir, 0, 205, 0, Z)," &
"207 (BC_6, D(46), bidir, 0, 205, 0, Z)," &
"208 (BC_2, HRESET_L, input, X)," &
"209 (BC_2, MCP_L, input, X)," &
"210 (BC_2, PLL_EXT, input, X)," &
"211 (BC_2, PLL_CFG(1), input, X)," &
"212 (BC_2, PLL_CFG(0), input, X)," &
"213 (BC_2, *, control, 0)," &
"214 (BC_1, PMON_OUT_L, output3, 0, 213, 0, Z)," &
"215 (BC_2, PMON_IN_L, input, X)," &
"216 (BC_2, SRW_L(0), input, X)," &
"217 (BC_2, SRW_L(1), input, X)," &
"218 (BC_2, *, control, 0)," &
"219 (BC_6, TBST_L, bidir, 0, 218, 0, Z)," &
"220 (BC_2, DX_L, input, X)," &
"221 (BC_2, EXT_QUAL, input, X)," &
"222 (BC_2, BMODE_L(0), input, X)," &
"223 (BC_2, PLL_CFG(2), input, X)," &
"224 (BC_4, BVSEL, observe_only, 0)," &
"225 (BC_2, PLL_CFG(3), input, X)," &
"226 (BC_2, BMODE_L(1), input, X)," &
"227 (BC_2, SYSCLK, input, X)";
-- tdi
end MPC7448;