Defines used accross the whole SAM implementation for the status codes returned by Sam hardware. More...

Macros | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_OK 0x9000 |
| Correct execution. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_OK_1BIT 0x9001 |
| Correct execution, 1 bits received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_OK_2BIT 0x9002 |
| Correct execution, 2 bits received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_OK_3BIT 0x9003 |
| Correct execution, 3 bits received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_OK_4BIT 0x9004 |
| Correct execution, 4 bits received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_OK_5BIT 0x9005 |
| Correct execution, 5 bits received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_OK_6BIT 0x9006 |
| Correct execution, 7 bits received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_OK_7BIT 0x9007 |
| Correct execution, 7 bits received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_OK_CHAINING_ACTIVE 0x90AF |
| Correct execution - 2 Part Command. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COMM_IO_TIMEOUT 0x90E0 |
| no response from card (no card in field) | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COMM_BITCNT_PROTOCOL 0x90E1 |
| bit count error or protocol error | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COMM_PARITY 0x90E2 |
| parity error | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COMM_FIFO_BUF_OVERFLOW 0x90E3 |
| MFRC52X FIFO buffer overflow. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COMM_CRC_FAILURE 0x90E4 |
| CRC error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COMM_RF_FAILURE 0x90E5 |
| MFRC52X RF error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COMM_TEMP_FAILURE 0x90E6 |
| MFRC52X temperature error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COMM_FIFO_WRITE 0x90E7 |
| MFRC52X FIFO write error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COMM_COLLISION 0x90E8 |
| collision error | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COMM_INTERNAL_BUF_OVERFLOW 0x90E9 |
| internal transaction buffer overflow (more than 256 bytes received from the card) | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO_UID_BCC_INCORRECT 0x90EA |
| UID check byte (BCC) incorrect. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO_WRONG_BNR 0x90EB |
| Invalid Layer 4 Block number in PCB. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO_INVALID_FORMAT 0x90EC |
| invalid format received in any ISO command | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO_INVALID_PARAMETER 0x90ED |
| invalid parameter received in any ISO command | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO_UID_INCOMPLETE 0x90C0 |
| UID not yet complete in card selection. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_PROT_MIFARE_ERROR 0x90EF |
| MIFARE (R) protocol error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_PROT_MIFARE_NACK_0 0x90F0 |
| MIFARE (R) NACK 0 received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_PROT_MIFARE_NACK_1 0x90F1 |
| MIFARE (R) NACK 1 received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_PROT_MIFARE_NACK_2 0x90F2 |
| MIFARE (R) NACK 2 received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_PROT_MIFARE_NACK_3 0x90F3 |
| MIFARE (R) NACK 3 received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_PROT_MIFARE_NACK_4 0x90F4 |
| MIFARE (R) NACK 4 received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_PROT_MIFARE_NACK_5 0x90F5 |
| MIFARE (R) NACK 5 received. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_PROT_MIFARE_PLUS_ERROR 0x90BE |
| MIFARE PLUS (R) protocol error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_INS_MIFARE_PLUS_ERROR 0x90BF |
| MIFARE PLUS (R) return code error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_PROT_DESFIRE_ERROR 0x90DF |
| MIFARE DESFIRE (R) protocol error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_CRYPTO_FAILURE 0x901E |
| MAC verification failed, CRC/Padding failed, auth error, integrity error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO7816_WRONG_LENGTH_LC 0x6700 |
| Wrong Length or LC byte. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO7816_WRONG_P1P2 0x6A86 |
| Wrong P1 P2. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO7816_WRONG_LE 0x6C00 |
| Wrong LE. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO7816_UNKNOWN_INS 0x6D00 |
| Wrong Instruction. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO7816_WRONG_CLASS 0x6E00 |
| Wrong Class. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO7816_COMMAND_NOT_ALLOWED 0x6986 |
| Command not allowed. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_ISO7816_WRONG_PARAMS_FOR_INS 0x6A80 |
| Wrong parameters for current instruction. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_HW_EEPROM 0x6400 |
| Memory Range, EEProm busy or access collision in EEPROM module. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_HW_RC5XX 0x6401 |
| MFRC52X interface error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_HW_EE_HIGH_VOLTAGE 0x6581 |
| High voltage error in SAM EEprom module. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_KEY_CREATE_FAILED 0x6501 |
| Creation of key entry failed. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_KEY_REF_NO_INVALID 0x6502 |
| Invalid key reference number. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_KEY_KUC_NO_INVALID 0x6503 |
| Invalid key usage counter reference number. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_KEY_INTEGRITY_ERROR 0x6984 |
| Key integrity error, wrong key reference. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_KEY_VERSION_INVALID 0x6A82 |
| Invalid key version. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_COND_USE_NOT_SATISFIED 0x6985 |
| conditions of use not satisfied, invalid key type, invalid CID, key limit reached | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_INTEGRITY_ERROR 0x6982 |
| Integrity error. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_INCOMPLETE_CHAINING 0x6883 |
| Invalid chaining sequence. | |
| #define | PHHAL_HW_SAMAV2_RET_CODE_HOST_PROTECTION_ERROR 0x6A84 |
| SAM Host Protection Error. | |
Defines used accross the whole SAM implementation for the status codes returned by Sam hardware.