<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE topic PUBLIC "-//FSL//DTD DITA Topic//EN" "topic.dtd">
<topic id="Programming_Model" outputclass="crr.registerBlock" xmlns:ditaarch="http://dita.oasis-open.org/architecture/2005/">
  <title>Qixis Programming Model</title>
  <body>
    <data-about>
      <data name="author" value="QGen V1.31"/>
      <data name="date" value="2018_0719 15:48:51"/>
      <data name="revision" value="XML Output V1.6"/>
      <data name="source" value="::LS1088ARDB"/>
    </data-about>
    <p>This chapter describes the contents of the register block (the BCSR - Board Control / Status Registers).  These are contained within the system controller FPGA or CPLD, and may be used to control and monitor the target system.
These registers are accessible over one or more system-specific interfaces, typically I2C, JTAG or an embedded processor.  Refer to the system reference manual for these connection details.  In all cases, each interface will use the 12-bit base address supplied in the definitions below.</p>
    <p>This table shows the register memory map for Qixis.</p>
    <table frame="all" id="block_memoryMap" outputclass="crr.memoryMap">
      <title>Qixis Register Memory Map</title>
      <tgroup cols="5">
        <colspec align="center" colname="Offset" colwidth="0.88in"/>
        <colspec colname="Register" colwidth="3.92in"/>
        <colspec align="center" colname="Width" colwidth="0.60in"/>
        <colspec align="center" colname="Access" colwidth="0.60in"/>
        <colspec align="center" colname="Reset" colwidth="0.90in"/>
        <thead>
          <row>
            <entry colname="Offset">Offset</entry>
            <entry colname="Register">Register</entry>
            <entry colname="Width">
              <p>Width</p>
              <p>(In bits)</p>
            </entry>
            <entry colname="Access">Access</entry>
            <entry colname="Reset">Reset value</entry>
          </row>
        </thead>
        <tbody>
          <row>
            <entry colname="Offset">
              <p>000h</p>
            </entry>
            <entry colname="Register">
              <xref href="#ID_ID">
                Identification (ID)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">00111001b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>001h</p>
            </entry>
            <entry colname="Register">
              <xref href="#VER_ID">
                Board Version (VER)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">00010001b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>002h</p>
            </entry>
            <entry colname="Register">
              <xref href="#QVER_ID">
                Qixis Version (QVER)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">00000001b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>003h</p>
            </entry>
            <entry colname="Register">
              <xref href="#MODEL_ID">
                Programming Model (MODEL)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">00000001b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>004h</p>
            </entry>
            <entry colname="Register">
              <xref href="#MINOR_ID">
                Minor Revision (MINOR)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000101b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>005h</p>
            </entry>
            <entry colname="Register">
              <xref href="#CTL_ID">
                General Control (CTL)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>006h</p>
            </entry>
            <entry colname="Register">
              <xref href="#AUX_ID">
                Auxiliary (AUX)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>009h</p>
            </entry>
            <entry colname="Register">
              <xref href="#STAT_SYS_ID">
                System Status (STAT_SYS)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>00Ah</p>
            </entry>
            <entry colname="Register">
              <xref href="#ALARM_ID">
                Alarm (ALARM)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW1C</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>00Bh</p>
            </entry>
            <entry colname="Register">
              <xref href="#STAT_PRES1_ID">
                Presence Detect 1 (STAT_PRES1)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">01xx1111b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>00Ch</p>
            </entry>
            <entry colname="Register">
              <xref href="#STAT_PRES2_ID">
                Presence Detect 2 (STAT_PRES2)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">xxxxx1xxb</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>00Eh</p>
            </entry>
            <entry colname="Register">
              <xref href="#LED_ID">
                LED Control (LED)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>010h</p>
            </entry>
            <entry colname="Register">
              <xref href="#RCFG_ID">
                Reconfiguration Control (RCFG)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">0010x00xb</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>01Dh</p>
            </entry>
            <entry colname="Register">
              <xref href="#LOS_STAT_ID">
                Loss Of Signal (LOS_STAT)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>01Fh</p>
            </entry>
            <entry colname="Register">
              <xref href="#WATCH_ID">
                Watchdog (WATCH)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">xxxxxxxb</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>021h</p>
            </entry>
            <entry colname="Register">
              <xref href="#PWR_CTL2_ID">
                Power Control 2 (PWR_CTL2)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>022h</p>
            </entry>
            <entry colname="Register">
              <xref href="#PWR_EVENT_ID">
                Power Event Trace (PWR_EVENT)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>024h</p>
            </entry>
            <entry colname="Register">
              <xref href="#PWR_MSTAT_ID">
                Power Status 0 (PWR_MSTAT)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">110010xxb</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>025h</p>
            </entry>
            <entry colname="Register">
              <xref href="#PWR_STAT1_ID">
                Power Status 1 (PWR_STAT1)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">xx111111b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>026h</p>
            </entry>
            <entry colname="Register">
              <xref href="#PWR_STAT2_ID">
                Power Status 2 (PWR_STAT2)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">xx111111b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>030h</p>
            </entry>
            <entry colname="Register">
              <xref href="#CLK_SPD1_ID">
                Clock Speed 1 (CLK_SPD1)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>033h</p>
            </entry>
            <entry colname="Register">
              <xref href="#CLK_ID_ID">
                Clock ID/Status (CLK_ID)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">0000xxxxb</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>040h</p>
            </entry>
            <entry colname="Register">
              <xref href="#RST_CTL_ID">
                Reset Control (RST_CTL)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00xxx000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>041h</p>
            </entry>
            <entry colname="Register">
              <xref href="#RST_STAT_ID">
                Reset Status (RST_STAT)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>042h</p>
            </entry>
            <entry colname="Register">
              <xref href="#RST_REASON_ID">
                Reset Event Trace (RST_REASON)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">xxxx0000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>043h</p>
            </entry>
            <entry colname="Register">
              <xref href="#RST_FORCE1_ID">
                Reset Force 1 (RST_FORCE1)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>044h</p>
            </entry>
            <entry colname="Register">
              <xref href="#RST_FORCE2_ID">
                Reset Force 2 (RST_FORCE2)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>045h</p>
            </entry>
            <entry colname="Register">
              <xref href="#RST_FORCE3_ID">
                Reset Force 3 (RST_FORCE3)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>04Bh</p>
            </entry>
            <entry colname="Register">
              <xref href="#RST_MASK1_ID">
                Reset Mask 1 (RST_MASK1)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>04Ch</p>
            </entry>
            <entry colname="Register">
              <xref href="#RST_MASK2_ID">
                Reset Mask 2 (RST_MASK2)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>04Dh</p>
            </entry>
            <entry colname="Register">
              <xref href="#RST_MASK3_ID">
                Reset Mask 2 (RST_MASK3)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>050h</p>
            </entry>
            <entry colname="Register">
              <xref href="#BRDCFG0_ID">
                Board Configuration 0 (BRDCFG0)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">xxx00000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>051h</p>
            </entry>
            <entry colname="Register">
              <xref href="#BRDCFG1_ID">
                Board Configuration 1 (BRDCFG1)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">0001xxxxb</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>052h</p>
            </entry>
            <entry colname="Register">
              <xref href="#BRDCFG2_ID">
                Board Configuration 2 (BRDCFG2)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">00xxxxxxb</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>054h</p>
            </entry>
            <entry colname="Register">
              <xref href="#BRDCFG4_ID">
                Board Configuration 4 (BRDCFG4)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00011x00b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>055h</p>
            </entry>
            <entry colname="Register">
              <xref href="#BRDCFG5_ID">
                Board Configuration 5 (BRDCFG5)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">0000xx00b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>056h</p>
            </entry>
            <entry colname="Register">
              <xref href="#BRDCFG6_ID">
                Board Configuration 6 (BRDCFG6)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00110011b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>059h</p>
            </entry>
            <entry colname="Register">
              <xref href="#BRDCFG9_ID">
                Board Configuration 9 (BRDCFG9)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">000x0000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>060h</p>
            </entry>
            <entry colname="Register">
              <xref href="#DUTCFG0_ID">
                DUT Configuration 0 (DUTCFG0)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">xxxxxxxb</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>061h</p>
            </entry>
            <entry colname="Register">
              <xref href="#DUTCFG1_ID">
                DUT Configuration 1 (DUTCFG1)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">xxx1xxx1b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>062h</p>
            </entry>
            <entry colname="Register">
              <xref href="#DUTCFG2_ID">
                DUT Configuration 2 (DUTCFG2)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">xxxxxxx1b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>066h</p>
            </entry>
            <entry colname="Register">
              <xref href="#DUTCFG6_ID">
                DUT Configuration 6 (DUTCFG6)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">1xxxxxx1b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>06Bh</p>
            </entry>
            <entry colname="Register">
              <xref href="#DUTCFG11_ID">
                DUT Configuration 11 (DUTCFG11)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">xxxxxxxxb</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>06Ch</p>
            </entry>
            <entry colname="Register">
              <xref href="#DUTCFG12_ID">
                DUT Configuration 12 (DUTCFG12)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">xxxxxxxb</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>0D8h</p>
            </entry>
            <entry colname="Register">
              <xref href="#CMSA_ID">
                Core Management Address (CMSA)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>0D9h</p>
            </entry>
            <entry colname="Register">
              <xref href="#CMSD_ID">
                Core Management Data (CMSD)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000000b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>0DCh</p>
            </entry>
            <entry colname="Register">
              <xref href="#SWS_CTL_ID">
                Switch Control (SWS_CTL)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RW</entry>
            <entry colname="Reset">00000101b</entry>
          </row>
          <row>
            <entry colname="Offset">
              <p>0DDh</p>
            </entry>
            <entry colname="Register">
              <xref href="#SWS_STAT_ID">
                Switch Sample Status (SWS_STAT)
              </xref>
            </entry>
            <entry colname="Width">8</entry>
            <entry colname="Access">RO</entry>
            <entry colname="Reset">10000000b</entry>
          </row>
        </tbody>
      </tgroup>
    </table>
  </body>
  <topic id="RegiConv">
    <title>Register Conventions</title>
    <body>
      <section>
      <p>An undefined register address does not have any defined register value.  Reads and writes to such addresses should be avoided. If you attempt to read such addresses, undefined data is returned. Undefined register addresses may be defined in the future.</p>
      <p>For registers which do not define all bits, reserved bits behave as follows:</p>
      <title>Reserved Bits</title>
      <table frame="all" id="TT1" outputclass="crr.memoryMap">
        <tgroup cols="2">
          <colspec colname="Register" colwidth="1.0in" />
          <colspec colname="Recommended" colwidth="5.5in" />
          <thead>
            <row>
              <entry colname="Register">Register</entry>
              <entry colname="Recommended">Recommended Actions</entry>
            </row>
          </thead>
          <tbody>
            <row>
              <entry colname="Register">DUTCFG</entry>
              <entry colname="Recommended">Read as 1. Write ones to unused bits.</entry>
            </row>
            <row>
              <entry colname="Register">others</entry>
              <entry colname="Recommended">Read as 0. Write zeroes to unused bits.</entry>
            </row>
          </tbody>
        </tgroup>
      </table>
      <p>Future definitions of reserved bits will maintain backward compatibility with the above rules.</p>
      </section>
    </body>
  </topic>
  <topic id="Rese">
    <title>Resets</title>
    <body>
      <section>
      <p>The reset values for registers are defined as follows:</p>
      <title>Reset Actions</title>
      <table frame="all" id="TT2" outputclass="crr.memoryMap">
        <tgroup cols="2">
          <colspec colname="Term" colwidth="0.6in" />
          <colspec colname="Reset" colwidth="5.9in" />
          <thead>
            <row>
              <entry colname="Term">Term</entry>
              <entry colname="Reset">Reset Action</entry>
            </row>
          </thead>
          <tbody>
            <row>
              <entry colname="Term">NONE</entry>
              <entry colname="Reset">Register cannot be reset. Applies to read-only registers.</entry>
            </row>
            <row>
              <entry colname="Term">ARST</entry>
              <entry colname="Reset">Auxiliary Reset: registers are reset when the system powers up with standby power, and is never altered by hardware again.  Software writes are preserved.</entry>
            </row>
            <row>
              <entry colname="Term">CRST</entry>
              <entry colname="Reset">Control Reset: registers are not reset except under exceptional situations, such as power cycles or watchdog timeout.</entry>
            </row>
            <row>
              <entry colname="Term">RRST</entry>
              <entry colname="Reset">Reconfig Reset: configuration registers are reset as with CRST unless a reconfiguration reset has been requested.</entry>
            </row>
            <row>
              <entry colname="Term">GRST</entry>
              <entry colname="Reset">General Reset: always reset, for any reason.</entry>
            </row>
          </tbody>
        </tgroup>
      </table>
      <p>Generally, a register is wholly affected by only one reset source, however there are exceptions and these are shown with separate reset lines for each reset source.</p>
      </section>
    </body>
  </topic>
  <topic id="IdenRegi">
    <title>Identification Registers</title>
    <body>
      <section>
      <p>The ID block of registers contain values which identify the board, including major revisions to the board and/or system controller FPGA or CPLD.</p>
      </section>
    </body>
  </topic>
  <topic id="ID_ID" outputclass="crr.register">
    <title>Identification (ID)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="ID_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">ID</entry>
                <entry colname="Offset">000h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The ID register contains a unique classification number. This ID number is used by system software to identify board types. The ID number remains same for all board revisions.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="ID_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="0" valign="middle">ID</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="0" valign="middle">39h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="ID_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-0</p>
                <p>ID</p>
              </entry>
                <entry colname="Description">
                <p>The board-specific identifier for the system.</p>
                <p>39h= LS1088ARDB</p>
                <p>4Ah= LS1088ARDB</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="VER_ID" outputclass="crr.register">
    <title>Board Version (VER)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="VER_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">VER</entry>
                <entry colname="Offset">001h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The VER register records version information for the PCB board as well the board architecture. The PCB board version can change without impacting the board architecture version, and vice versa.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="VER_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="4" valign="middle">ARCH</entry>
                <entry namest="3" nameend="0" valign="middle">BRD</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="4" outputclass="shaded"></entry>
                <entry namest="3" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="4" valign="middle">0001</entry>
                <entry namest="3" nameend="0" valign="middle">0001</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="VER_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-4</p>
                <p>ARCH</p>
              </entry>
                <entry colname="Description">
                <p>Board architecture version:</p>
                <p>1= V1</p>
                <p>2= V2 (etc.)</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-0</p>
                <p>BRD</p>
              </entry>
                <entry colname="Description">
                <p>PCB board version:</p>
                <p>1= Rev A (or pre-release)</p>
                <p>2= Rev B (etc.)</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <p>The ARCH field is used by QIXIS and software to handle architecture changes. The ARCH field allows the use of a common QIXIS image across multiple board revisions, if supported by the device.</p>
      <p>The BRD field lets end users determine the version of the board. Software can use this field to print board version identification. For example:</p>
      <p><codeblock>printf("Board Version: %c", (get_pixis( VER ) &amp; 0Fh) + 'A' - 1 );</codeblock></p>
    </body>
  </topic>
  <topic id="QVER_ID" outputclass="crr.register">
    <title>Qixis Version (QVER)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="QVER_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">QVER</entry>
                <entry colname="Offset">002h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The QVER register contains the major version information of the Qixis system controller. Minor revision information may be found in the MINOR register.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="QVER_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="0" valign="middle">QVER</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="0" valign="middle">00000001</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="QVER_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-0</p>
                <p>QVER</p>
              </entry>
                <entry colname="Description">
                <p>Qixis version as a decimal value:</p>
                <p>1= Version 1</p>
                <p>2= Version 2</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="MODEL_ID" outputclass="crr.register">
    <title>Programming Model (MODEL)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="MODEL_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">MODEL</entry>
                <entry colname="Offset">003h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The MODEL register contains information about the software programming model version. The MODEL field is updated if a register or bit field is added to existing registers.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="MODEL_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle">MIN</entry>
                <entry colname="6" valign="middle" outputclass="shaded"></entry>
                <entry namest="5" nameend="4" valign="middle" outputclass="shaded"></entry>
                <entry namest="3" nameend="0" valign="middle">MODEL</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry colname="7" outputclass="shaded"></entry>
                <entry colname="6" outputclass="shaded"></entry>
                <entry namest="5" nameend="4" outputclass="shaded"></entry>
                <entry namest="3" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry colname="7" valign="middle">0</entry>
                <entry colname="6" valign="middle">0</entry>
                <entry namest="5" nameend="4" valign="middle">00</entry>
                <entry namest="3" nameend="0" valign="middle">0001</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="MODEL_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>MIN</p>
              </entry>
                <entry colname="Description">
                <p>Programming Model Type:</p>
                <p>0= Normal Qixis register set.</p>
                <p>1= Minimal Qixis register set (QixMin).</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5-4</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-0</p>
                <p>MODEL</p>
              </entry>
                <entry colname="Description">
                <p>Programming model version:</p>
                <p>1= Version 1</p>
                <p>2= Version 2</p>
                <p>etc.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="MINOR_ID" outputclass="crr.register">
    <title>Minor Revision (MINOR)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="MINOR_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">MINOR</entry>
                <entry colname="Offset">004h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The MINOR (or MINTAG) register can be used to obtain CPLD build information from software.  The register returns a subset of the Qixis QTAG facility but more than the limited MINOR facility on other RDBs.</p>
        <p>Writes to MINOR select various pieces of information for subsequent read. On reset, the 'minor revision' field is returned, for backward-compatiblity.</p>
        <p>Concatenated with the QVER register, it forms the full revision information for the CPLD device.  This is typically reported as:</p>
        <p><codeblock>qver = get_pixis( QVER );</codeblock></p>
        <p><codeblock>minor = get_pixis( MINOR );</codeblock></p>
        <p><codeblock>printf("FPGA: V%d", qver );</codeblock></p>
        <p><codeblock>if (minor != 0) {</codeblock></p>
        <p><codeblock>  printf(".%d", minor );</codeblock></p>
        <p><codeblock>}</codeblock></p>
        <p>Note: setting the MINOR/MINTAG register to 5h before reading is optional, as on every reset 05h is the default.</p>
        <p>Note: for harmonization with QDS-supporting code (e.g. uboot), if MINOR is zero, do not print it.</p>
        <p>Other information can be obtained by writing the corresponding address and reading the register.  Reserved fields are found only in QDS QTAG but are present for compatibility.  Contents are as follows:</p>
        <title>MINTAG Definition</title>
        <table frame="all" id="TT981" outputclass="crr.memoryMap">
          <tgroup cols="3">
            <colspec colname="Address" colwidth="0.97in" />
            <colspec colname="Name" colwidth="1.0in" />
            <colspec colname="Definition" colwidth="4.53in" />
            <thead>
              <row>
                <entry colname="Address">Address Range</entry>
                <entry colname="Name">Name</entry>
                <entry colname="Definition">Definition</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Address">0x00-0x03</entry>
                <entry colname="Name">TAG</entry>
                <entry colname="Definition">not implemented.</entry>
              </row>
              <row>
                <entry colname="Address">0x05-0x06</entry>
                <entry colname="Name">MINOR</entry>
                <entry colname="Definition">Minor build version: u16 value in little-endian order.</entry>
              </row>
              <row>
                <entry colname="Address">0x08-0x0B</entry>
                <entry colname="Name">DATE</entry>
                <entry colname="Definition">Date/time stamp: u32 Unix GMT time value in big-endian order.</entry>
              </row>
              <row>
                <entry colname="Address">0x0C</entry>
                <entry colname="Name">RELEASE</entry>
                <entry colname="Definition">Released flag: 0=unreleased, non-zero=released.</entry>
              </row>
              <row>
                <entry colname="Address">0x10-0x2F</entry>
                <entry colname="Name">NAME</entry>
                <entry colname="Definition">not implemented.</entry>
              </row>
              <row>
                <entry colname="Address">0x30-7F</entry>
                <entry colname="Name">reserved</entry>
                <entry colname="Definition">reserved</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="MINOR_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="0" valign="middle" morerows="1">MINOR</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="0" valign="middle">05h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="MINOR_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-0</p>
                <p>MINOR</p>
              </entry>
                <entry colname="Description">
                <p>Read:  Data to read from MINOR/MINTAG.</p>
                <p>Write: Address of data to read.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="ContandStatRegi">
    <title>Control and Status Registers</title>
    <body>
      <section>
      <p>This block of registers control the operation of Qixis itself (or other operations  which do not constitute controlling the board or the DUT, which are managed with  BRDCFG/DUTCFG registers) or monitor the status of various things.</p>
      </section>
    </body>
  </topic>
  <topic id="CTL_ID" outputclass="crr.register">
    <title>General Control (CTL)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="CTL_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">CTL</entry>
                <entry colname="Offset">005h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="CTL_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle" morerows="1">SWLED</entry>
                <entry colname="5" valign="middle" morerows="1">AMASK</entry>
                <entry colname="4" valign="middle" morerows="1">XTEST</entry>
                <entry namest="3" nameend="2" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="1" valign="middle" morerows="1">LED</entry>
                <entry colname="0" valign="middle" morerows="1">FAIL</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">CRST</entry>
                <entry namest="7" nameend="6" valign="middle">00</entry>
                <entry colname="5" valign="middle">0</entry>
                <entry colname="4" valign="middle">0</entry>
                <entry namest="3" nameend="2" valign="middle">00</entry>
                <entry colname="1" valign="middle">0</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="CTL_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>SWLED</p>
              </entry>
                <entry colname="Description">
                <p>Controls front-panel power-switch LEDs: when CTL.LED is set</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>AMASK</p>
              </entry>
                <entry colname="Description">
                <p>Alarm Mask Mode:</p>
                <p>0: ALARM register reads return alarm status (normal).</p>
                <p>1: ALARM register reads return the alarm mask.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>XTEST</p>
              </entry>
                <entry colname="Description">
                <p>This bit directly drives the XTEST signal, typically driving an SMA connector. The function is user-defined.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-2</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>LED</p>
              </entry>
                <entry colname="Description">
                <p>Software Diagnostic LED Enable:</p>
                <p>0= Diagnostic LEDs operate normally.</p>
                <p>1= Software can directly control the M3:M0 monitoring LEDs using the LED register.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>FAIL</p>
              </entry>
                <entry colname="Description">
                <p>Software Failure Diagnostic LED:</p>
                <p>0= FAIL LED is not asserted due to software (it might still be on due to hardware failures).</p>
                <p>1= FAIL LED is forced on. Generally, this indicates a software-diagnosed error.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="AUX_ID" outputclass="crr.register">
    <title>Auxiliary (AUX)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="AUX_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">AUX</entry>
                <entry colname="Offset">006h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The AUX register may be used by software to store information. The AUX register is initialized to zero when the system is powered-up, and never altered by hardware again.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="AUX_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="0" valign="middle" morerows="1">AUX</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">ARST</entry>
                <entry namest="7" nameend="0" valign="middle">00000000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="AUX_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-0</p>
                <p>AUX</p>
              </entry>
                <entry colname="Description">
                <p>User-defined value.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="STAT_SYS_ID" outputclass="crr.register">
    <title>System Status (STAT_SYS)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="STAT_SYS_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">STAT_SYS</entry>
                <entry colname="Offset">009h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The STAT_SYS register reports general system status.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="STAT_SYS_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="4" valign="middle" outputclass="shaded"></entry>
                <entry colname="3" valign="middle">ALTCPU</entry>
                <entry colname="2" valign="middle">ALTERED</entry>
                <entry colname="1" valign="middle">ASLEEP</entry>
                <entry colname="0" valign="middle" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="4" outputclass="shaded"></entry>
                <entry colname="3" outputclass="shaded"></entry>
                <entry colname="2" outputclass="shaded"></entry>
                <entry colname="1" outputclass="shaded"></entry>
                <entry colname="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="4" valign="middle">0000</entry>
                <entry colname="3" valign="middle">0</entry>
                <entry colname="2" valign="middle">0</entry>
                <entry colname="1" valign="middle">0</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="STAT_SYS_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-4</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>ALTCPU</p>
              </entry>
                <entry colname="Description">
                <p>Alternate CPU Installed:</p>
                <p>0= The standard DUT is installed.</p>
                <p>1= An alternate, pin-compatible, DUT has been installed.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>ALTERED</p>
              </entry>
                <entry colname="Description">
                <p>Reconfiguration Active:</p>
                <p>0= The system has been configured as normal.</p>
                <p>1= The system has been reconfigured by software.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>ASLEEP</p>
              </entry>
                <entry colname="Description">
                <p>ASLEEP Reporting:</p>
                <p>0= At least one core is actively operating.</p>
                <p>1= All cores are in sleep mode.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="ALARM_ID" outputclass="crr.register">
    <title>Alarm (ALARM)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="ALARM_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">ALARM</entry>
                <entry colname="Offset">00Ah</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The STAT_ALARM register detects and reports any alarms raised in the QIXIS system.</p>
        <p>Write 1 to a STAT_ALARM register bit to disable alarms handling.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="ALARM_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle" outputclass="shaded"></entry>
                <entry colname="5" valign="middle">CTL</entry>
                <entry colname="4" valign="middle">VTOFF</entry>
                <entry colname="3" valign="middle">ORIENT</entry>
                <entry colname="2" valign="middle">VCT</entry>
                <entry colname="1" valign="middle">TWARN</entry>
                <entry colname="0" valign="middle">TALERT</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="6" outputclass="shaded"></entry>
                <entry colname="5" outputclass="shaded"></entry>
                <entry colname="4" outputclass="shaded"></entry>
                <entry colname="3" outputclass="shaded"></entry>
                <entry colname="2" outputclass="shaded"></entry>
                <entry colname="1" outputclass="shaded"></entry>
                <entry colname="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">ARST</entry>
                <entry namest="7" nameend="6" valign="middle">00</entry>
                <entry colname="5" valign="middle">0</entry>
                <entry colname="4" valign="middle">0</entry>
                <entry colname="3" valign="middle">0</entry>
                <entry colname="2" valign="middle">0</entry>
                <entry colname="1" valign="middle">0</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="ALARM_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>CTL</p>
              </entry>
                <entry colname="Description">
                <p>Software Fault (CTL[FAIL] was set).</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>VTOFF</p>
              </entry>
                <entry colname="Description">
                <p>VCC Power Supply Temp Off Fault</p>
                <p>0= The system is powered normally.</p>
                <p>1= The system powers off due to overtemperature of the supply monitored by VT (see bit 5).</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>ORIENT</p>
              </entry>
                <entry colname="Description">
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>VCT</p>
              </entry>
                <entry colname="Description">
                <p>VCC/Core Power Supply Temperature Warning:</p>
                <p>0= The VCC power supply temperature is within normal limits.</p>
                <p>1= The VCC power supply temperature has exceeded warning limits.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>TWARN</p>
              </entry>
                <entry colname="Description">
                <p>Temperature Fault:</p>
                <p>0= The temperature is within normal limits.</p>
                <p>1= The temperature has exceeded warning limits.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>TALERT</p>
              </entry>
                <entry colname="Description">
                <p>Temperature Alert:</p>
                <p>0= The temperature is within normal limits.</p>
                <p>1= The temperature has exceeded fault limits.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="STAT_PRES1_ID" outputclass="crr.register">
    <title>Presence Detect 1 (STAT_PRES1)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="STAT_PRES1_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">STAT_PRES1</entry>
                <entry colname="Offset">00Bh</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The STAT_PRES1 detects the installation of various devices/cards.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="STAT_PRES1_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle">DUT</entry>
                <entry colname="6" valign="middle" outputclass="shaded"></entry>
                <entry namest="5" nameend="4" valign="middle">CPU_ID</entry>
                <entry colname="3" valign="middle" outputclass="shaded"></entry>
                <entry colname="2" valign="middle" outputclass="shaded"></entry>
                <entry colname="1" valign="middle">WP</entry>
                <entry colname="0" valign="middle">CD</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry colname="7" outputclass="shaded"></entry>
                <entry colname="6" outputclass="shaded"></entry>
                <entry namest="5" nameend="4" outputclass="shaded"></entry>
                <entry colname="3" outputclass="shaded"></entry>
                <entry colname="2" outputclass="shaded"></entry>
                <entry colname="1" outputclass="shaded"></entry>
                <entry colname="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry colname="7" valign="middle">0</entry>
                <entry colname="6" valign="middle">1</entry>
                <entry namest="5" nameend="4" valign="middle">11</entry>
                <entry colname="3" valign="middle">1</entry>
                <entry colname="2" valign="middle">1</entry>
                <entry colname="1" valign="middle">1</entry>
                <entry colname="0" valign="middle">1</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="STAT_PRES1_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>DUT</p>
              </entry>
                <entry colname="Description">
                <p>Processor Present:</p>
                <p>0= A processor is detected (soldered-in or socketed).</p>
                <p>1= No device detected.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5-4</p>
                <p>CPU_ID</p>
              </entry>
                <entry colname="Description">
                <p>Processor Installed:</p>
                <p>00= An unknown device is installed.</p>
                <p>01= An LS1043A is installed.</p>
                <p>10= An LS1047A is installed.</p>
                <p>11= An LS1088A is installed.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>WP</p>
              </entry>
                <entry colname="Description">
                <p>SDCard write-protect:</p>
                <p>0= A write-enabled card is installed in the slot.</p>
                <p>1= The card is write-protected, or no card is installed.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>CD</p>
              </entry>
                <entry colname="Description">
                <p>SDCard Present:</p>
                <p>0= A card is detected in the slot.</p>
                <p>1= No card detected.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="STAT_PRES2_ID" outputclass="crr.register">
    <title>Presence Detect 2 (STAT_PRES2)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="STAT_PRES2_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">STAT_PRES2</entry>
                <entry colname="Offset">00Ch</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The STAT_PRES2 detects the installation of cards in various PCI Express or SGMII slots.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="STAT_PRES2_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="3" valign="middle" outputclass="shaded"></entry>
                <entry colname="2" valign="middle" outputclass="shaded"></entry>
                <entry namest="1" nameend="0" valign="middle" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="3" outputclass="shaded"></entry>
                <entry colname="2" outputclass="shaded"></entry>
                <entry namest="1" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="3" valign="middle">11111</entry>
                <entry colname="2" valign="middle">1</entry>
                <entry namest="1" nameend="0" valign="middle">11</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="STAT_PRES2_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-3</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1-0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="LED_ID" outputclass="crr.register">
    <title>LED Control (LED)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="LED_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">LED</entry>
                <entry colname="Offset">00Eh</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The LED register can be used to directly control the monitoring LEDs (M7-M0) for software debugging and messaging purposes. Direct control of the LEDs is possible only when CTL[LED] is set to 1; otherwise Qixis uses them to display general system activity.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="LED_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="0" valign="middle" morerows="1">LED</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">GRST</entry>
                <entry namest="7" nameend="0" valign="middle">00000000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="LED_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-0</p>
                <p>LED</p>
              </entry>
                <entry colname="Description">
                <p>LED Status Control:</p>
                <p>0= LED M[bitno] is off.</p>
                <p>1= LED M[bitno] is on.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="RecoRegi">
    <title>Reconfiguration Registers</title>
    <body>
      <section>
      <p>---------------------------------------------------------------------------</p>
      </section>
    </body>
  </topic>
  <topic id="RCFG_ID" outputclass="crr.register">
    <title>Reconfiguration Control (RCFG)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="RCFG_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">RCFG</entry>
                <entry colname="Offset">010h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The RCFG_CTL register is used to control the reconfiguration sequencer.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="RCFG_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle" outputclass="shaded"></entry>
                <entry colname="5" valign="middle">LIVE</entry>
                <entry colname="4" valign="middle" outputclass="shaded"></entry>
                <entry colname="3" valign="middle" morerows="1">WDEN</entry>
                <entry namest="2" nameend="1" valign="middle" outputclass="shaded"></entry>
                <entry colname="0" valign="middle" morerows="1">GO</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="6" outputclass="shaded"></entry>
                <entry colname="5" outputclass="shaded"></entry>
                <entry colname="4" outputclass="shaded"></entry>
                <entry namest="2" nameend="1" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">CRST</entry>
                <entry namest="7" nameend="6" valign="middle">00</entry>
                <entry colname="5" valign="middle">1</entry>
                <entry colname="4" valign="middle">0</entry>
                <entry colname="3" valign="middle">SW_BOOTBOX_B</entry>
                <entry namest="2" nameend="1" valign="middle">00</entry>
                <entry colname="0" valign="middle"></entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry namest="7" nameend="6" valign="middle"></entry>
                <entry colname="5" valign="middle"></entry>
                <entry colname="4" valign="middle"></entry>
                <entry colname="3" valign="middle"></entry>
                <entry namest="2" nameend="1" valign="middle"></entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="RCFG_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>LIVE</p>
              </entry>
                <entry colname="Description">
                <p>Immediate changes for BRDCFG registers:</p>
                <p>1= BRDCFG registers outputs occur immediately.  For QixMin, LIVE is always 1.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>WDEN</p>
              </entry>
                <entry colname="Description">
                <p>Watchdog Enable:</p>
                <p>0= The watchdog is not enabled during reconfiguration.</p>
                <p>1= The watchdog is enabled during reconfiguration. If not disabled within 2^29 clock cycles (&gt; 8 minutes), the system is reset.</p>
                <p>NOTE: This is not a highly-secure watchdog; software can reset this bit at any time and disable the watchdog.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2-1</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>GO</p>
              </entry>
                <entry colname="Description">
                <p>Reconfiguration Start:</p>
                <p>0= Reconfiguration sequencer is idle.</p>
                <p>1= On the 0-to-1 transition, the reconfiguration process begins.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="LOS_STAT_ID" outputclass="crr.register">
    <title>Loss Of Signal (LOS_STAT)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="LOS_STAT_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">LOS_STAT</entry>
                <entry colname="Offset">01Dh</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The LOS_STAT reports loss of lock or fault status for various devices.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="LOS_STAT_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle">RT1LOL</entry>
                <entry colname="6" valign="middle">RTIMER</entry>
                <entry colname="5" valign="middle">RXLOS</entry>
                <entry colname="4" valign="middle">TXFLT</entry>
                <entry namest="3" nameend="0" valign="middle" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry colname="7" outputclass="shaded"></entry>
                <entry colname="6" outputclass="shaded"></entry>
                <entry colname="5" outputclass="shaded"></entry>
                <entry colname="4" outputclass="shaded"></entry>
                <entry namest="3" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry colname="7" valign="middle">0</entry>
                <entry colname="6" valign="middle">0</entry>
                <entry colname="5" valign="middle">0</entry>
                <entry colname="4" valign="middle">0</entry>
                <entry namest="3" nameend="0" valign="middle">0000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="LOS_STAT_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>RT1LOL</p>
              </entry>
                <entry colname="Description">
                <p>Retimer #1 (Lane D) Loss:</p>
                <p>0= Receive and transmit pathway(s) operating normally</p>
                <p>1= Receive or transmit pathway(s) pathway lost sync.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6</p>
                <p>RTIMER</p>
              </entry>
                <entry colname="Description">
                <p>Retimer Done Monitor:</p>
                <p>0= The retimer is in reset or loading configuration.</p>
                <p>1= The retimer has completed loading configuration data.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>RXLOS</p>
              </entry>
                <entry colname="Description">
                <p>SFP TX LOS:</p>
                <p>0= The SFP tranceiver is receiving normally.</p>
                <p>1= The SFP tranceiver is reporting a receive loss.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>TXFLT</p>
              </entry>
                <entry colname="Description">
                <p>SFP TX FAULT:</p>
                <p>0= The SFP tranceiver is transmitting normally.</p>
                <p>1= The SFP tranceiver is reporting a transmit fault.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="WATCH_ID" outputclass="crr.register">
    <title>Watchdog (WATCH)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="WATCH_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">WATCH</entry>
                <entry colname="Offset">01Fh</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The WATCH register selects the watchdog timer value used during the reconfiguration processes. When RCFG[WDEN] enables the watchdog timer, a count down timer begins. If the DUT software does not disable or restart the watchdog timer within the specified limits, the system restarts.</p>
        <p>Note that the watchdog timer is not dependent upon a reconfiguration sequence being active. While it is typically enabled along with RCFG[GO] as part of a reconfiguration sequence; in fact, it is independent and can be enabled for any reason.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="WATCH_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="0" valign="middle" morerows="1">WATCH</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">CRST</entry>
                <entry namest="7" nameend="0" valign="middle">00011111</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="WATCH_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-0</p>
                <p>WATCH</p>
              </entry>
                <entry colname="Description">
                <p>Watchdog timer value, as determined by the formula:</p>
                <p><codeblock>    time-out = [ WATCH * (2.0sec) ] + 2.0sec</codeblock></p>
                <p>Examples:</p>
                <p><codeblock>  11111111=   8 min</codeblock></p>
                <p><codeblock>  00111111=   2 min</codeblock></p>
                <p><codeblock>  00001111=  32 sec</codeblock></p>
                <p><codeblock>  00000011=   8 sec</codeblock></p>
                <p><codeblock>  00000000=   2 sec</codeblock></p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="PoweContRegi">
    <title>Power Control/Status Registers</title>
    <body>
      <section>
      <p>This block of registers controls the operation of the reconfiguration system, which is used to alter the configuration of the board or processor into different voltages, SYSCLK frequencies, boot device selections, or any other configuration controlled by a BRDCFG or DUTCFG register.</p>
      </section>
    </body>
  </topic>
  <topic id="PWR_CTL2_ID" outputclass="crr.register">
    <title>Power Control 2 (PWR_CTL2)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="PWR_CTL2_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">PWR_CTL2</entry>
                <entry colname="Offset">021h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The PWR_CTL2 register is used to control system power-on/power-off events.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="PWR_CTL2_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle" morerows="1">PWR</entry>
                <entry namest="6" nameend="0" valign="middle" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="6" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">CRST</entry>
                <entry colname="7" valign="middle">0</entry>
                <entry namest="6" nameend="0" valign="middle">0000000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="PWR_CTL2_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>PWR</p>
              </entry>
                <entry colname="Description">
                <p>Toggle System Power</p>
                <p>0= No action.</p>
                <p>1= On the 0-to-1 transition, toggle the system power supply. The bit must be reset to zero before additional power cycles can occur.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6-0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="PWR_EVENT_ID" outputclass="crr.register">
    <title>Power Event Trace (PWR_EVENT)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="PWR_EVENT_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">PWR_EVENT</entry>
                <entry colname="Offset">022h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The PWR_EVENT register records which events caused power-on or -off events.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="PWR_EVENT_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="4" valign="middle">PPEVENT</entry>
                <entry namest="3" nameend="0" valign="middle">PEVENT</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="4" outputclass="shaded"></entry>
                <entry namest="3" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="4" valign="middle">0000</entry>
                <entry namest="3" nameend="0" valign="middle">0000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="PWR_EVENT_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-4</p>
                <p>PPEVENT</p>
              </entry>
                <entry colname="Description">
                <p>Previous Power Event:</p>
                <p>This field contains the previous value stored in the PEVENT field.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-0</p>
                <p>PEVENT</p>
              </entry>
                <entry colname="Description">
                <p>Power Event:</p>
                <p>The field will contain one of the following codes, indicating the event</p>
                <p>which caused the power change:</p>
                <p>0000= None (never powered up).</p>
                <p>0001= Forced power-off (fault, temp, etc).</p>
                <p>0010= Automatic power-up (SW_AUTO_ON is set).</p>
                <p>0011= POWER switch used to power on.</p>
                <p>0100= RST_CTL2[PWR] used to power on.</p>
                <p>0101= DCM used to power on.</p>
                <p>0110= ATX PSU dropped power (external event).</p>
                <p>0111= POWER switch used to power off.</p>
                <p>1000= RST_CTL2[PWR] used to power off.</p>
                <p>1001= DCM used to power off.</p>
                <p>1010= Thermal fault forced power off.</p>
                <p>1111= Unknown (PSEQ fault).</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="PWR_MSTAT_ID" outputclass="crr.register">
    <title>Power Status 0 (PWR_MSTAT)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="PWR_MSTAT_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">PWR_MSTAT</entry>
                <entry colname="Offset">024h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The PWR_MSTAT register monitors the overall power status of the board, including that of the main (ATX or other) power supply used to power all other rails.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="PWR_MSTAT_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle">ATXON</entry>
                <entry colname="6" valign="middle">ATXGD</entry>
                <entry colname="5" valign="middle" outputclass="shaded"></entry>
                <entry colname="4" valign="middle">FAULT</entry>
                <entry colname="3" valign="middle">PWROK</entry>
                <entry colname="2" valign="middle" outputclass="shaded"></entry>
                <entry namest="1" nameend="0" valign="middle">SSTATE</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry colname="7" outputclass="shaded"></entry>
                <entry colname="6" outputclass="shaded"></entry>
                <entry colname="5" outputclass="shaded"></entry>
                <entry colname="4" outputclass="shaded"></entry>
                <entry colname="3" outputclass="shaded"></entry>
                <entry colname="2" outputclass="shaded"></entry>
                <entry namest="1" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry colname="7" valign="middle">1</entry>
                <entry colname="6" valign="middle">1</entry>
                <entry colname="5" valign="middle">0</entry>
                <entry colname="4" valign="middle">0</entry>
                <entry colname="3" valign="middle">1</entry>
                <entry colname="2" valign="middle">0</entry>
                <entry namest="1" nameend="0" valign="middle">11</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="PWR_MSTAT_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>ATXON</p>
              </entry>
                <entry colname="Description">
                <p>Main Power Supply Control Status:</p>
                <p>0= Power supply is set to off.</p>
                <p>1= Power supply is set to on.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6</p>
                <p>ATXGD</p>
              </entry>
                <entry colname="Description">
                <p>Main Power Supply Status:</p>
                <p>0= Power supply is off or not yet stable.</p>
                <p>1= Power supply is on and stable.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>FAULT</p>
              </entry>
                <entry colname="Description">
                <p>Faulted:</p>
                <p>0= Power supply system operating normally.</p>
                <p>1= Power supply system was shutdown for some reason. Check the ALARM register for details.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>PWROK</p>
              </entry>
                <entry colname="Description">
                <p>General Power Status:</p>
                <p>0= One or more power supplies are off or not yet stable.</p>
                <p>1= All power supplies are on and stable.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1-0</p>
                <p>SSTATE</p>
              </entry>
                <entry colname="Description">
                <p>Reports the current power savings level, for those devices which support it.</p>
                <p>11= S3 - completely on</p>
                <p>Note: If a device does not support hardware (i.e external) power savings modes, S3 is always reported.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="PWR_STAT1_ID" outputclass="crr.register">
    <title>Power Status 1 (PWR_STAT1)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="PWR_STAT1_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">PWR_STAT1</entry>
                <entry colname="Offset">025h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The PWR_STATn registers are used to monitor the status of individual power supplies. If a bit is set to '1', the respective power supply is operating correctly.</p>
        <p>Note that unassigned bits default to one, allowing power failure detection to be easily performed (if the value is not FFh, at least one supply is not operating).</p>
        <p>Due to the high variability of the hardware devices used, PWR_STATn register bits are not assigned any universally fixed values. For more details, see the target platform documentation.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="PWR_STAT1_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle" outputclass="shaded"></entry>
                <entry colname="5" valign="middle">XVDD</entry>
                <entry colname="4" valign="middle">TA_BB</entry>
                <entry colname="3" valign="middle" outputclass="shaded"></entry>
                <entry colname="2" valign="middle">V0.85</entry>
                <entry colname="1" valign="middle">VPP</entry>
                <entry colname="0" valign="middle">VDD</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="6" outputclass="shaded"></entry>
                <entry colname="5" outputclass="shaded"></entry>
                <entry colname="4" outputclass="shaded"></entry>
                <entry colname="3" outputclass="shaded"></entry>
                <entry colname="2" outputclass="shaded"></entry>
                <entry colname="1" outputclass="shaded"></entry>
                <entry colname="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="6" valign="middle">11</entry>
                <entry colname="5" valign="middle">1</entry>
                <entry colname="4" valign="middle">1</entry>
                <entry colname="3" valign="middle">1</entry>
                <entry colname="2" valign="middle">1</entry>
                <entry colname="1" valign="middle">1</entry>
                <entry colname="0" valign="middle">1</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="PWR_STAT1_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>XVDD</p>
              </entry>
                <entry colname="Description">
                <p>XVDD (SerDes IO Voltage) Monitor.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>TA_BB</p>
              </entry>
                <entry colname="Description">
                <p>TA_BB Monitor</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>V0.85</p>
              </entry>
                <entry colname="Description">
                <p>VCC_0.85V Monitor.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>VPP</p>
              </entry>
                <entry colname="Description">
                <p>DDR4 Interface VPP Monitor</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>VDD</p>
              </entry>
                <entry colname="Description">
                <p>Core Power Monitor</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="PWR_STAT2_ID" outputclass="crr.register">
    <title>Power Status 2 (PWR_STAT2)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="PWR_STAT2_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">PWR_STAT2</entry>
                <entry colname="Offset">026h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>Monitors various power statuses; see PWR_STAT1 for details.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="PWR_STAT2_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle" outputclass="shaded"></entry>
                <entry colname="5" valign="middle">VCC1P2</entry>
                <entry colname="4" valign="middle">OVDD</entry>
                <entry colname="3" valign="middle" outputclass="shaded"></entry>
                <entry colname="2" valign="middle">VCC_2V5</entry>
                <entry colname="1" valign="middle">VTT1</entry>
                <entry colname="0" valign="middle">GVDD</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="6" outputclass="shaded"></entry>
                <entry colname="5" outputclass="shaded"></entry>
                <entry colname="4" outputclass="shaded"></entry>
                <entry colname="3" outputclass="shaded"></entry>
                <entry colname="2" outputclass="shaded"></entry>
                <entry colname="1" outputclass="shaded"></entry>
                <entry colname="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="6" valign="middle">11</entry>
                <entry colname="5" valign="middle">1</entry>
                <entry colname="4" valign="middle">1</entry>
                <entry colname="3" valign="middle">1</entry>
                <entry colname="2" valign="middle">1</entry>
                <entry colname="1" valign="middle">1</entry>
                <entry colname="0" valign="middle">1</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="PWR_STAT2_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>VCC1P2</p>
              </entry>
                <entry colname="Description">
                <p>VCC_1.2V Monitor</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>OVDD</p>
              </entry>
                <entry colname="Description">
                <p>OVDD Monitor</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>VCC_2V5</p>
              </entry>
                <entry colname="Description">
                <p>2V5 Monitor</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>VTT1</p>
              </entry>
                <entry colname="Description">
                <p>DDR termination power #1</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>GVDD</p>
              </entry>
                <entry colname="Description">
                <p>DDR Power.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="ClocContRegi">
    <title>Clock Control Registers</title>
    <body>
      <section>
      <p>The power registers provide the ability to monitor general power status, as well as individual power status (for those supplies that have reporting capability). Other registers provide limited power control features (most power control is through the PMBus/I2C interface).</p>
      </section>
    </body>
  </topic>
  <topic id="CLK_SPD1_ID" outputclass="crr.register">
    <title>Clock Speed 1 (CLK_SPD1)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="CLK_SPD1_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">CLK_SPD1</entry>
                <entry colname="Offset">030h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The CLK_SPD1 register is used to report the user-selectable speed settings (typically from switches) for the SYSCLK and DDRCLK clocks.</p>
        <p>Values in the CLK_SPD1 register are used by boot software accurately initialize timing-dependent parameters, such as for UART baud rates, I2C clock rates, and DDR memory timing.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="CLK_SPD1_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="4" valign="middle">DDRCLK</entry>
                <entry namest="3" nameend="0" valign="middle">SYSCLK</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="4" outputclass="shaded"></entry>
                <entry namest="3" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="4" valign="middle">0000</entry>
                <entry namest="3" nameend="0" valign="middle">0000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="CLK_SPD1_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-4</p>
                <p>DDRCLK</p>
              </entry>
                <entry colname="Description">
                <p>DDRCLK Rate Selection:</p>
                <p><codeblock>0001= 100.00 MHz (fixed)</codeblock></p>
                <p><codeblock>Other values are reserved.</codeblock></p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-0</p>
                <p>SYSCLK</p>
              </entry>
                <entry colname="Description">
                <p>SYSCLK Rate Selection:</p>
                <p><codeblock>0010= 100.00 MHz (fixed)</codeblock></p>
                <p><codeblock>Other values are reserved.</codeblock></p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="CLK_ID_ID" outputclass="crr.register">
    <title>Clock ID/Status (CLK_ID)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="CLK_ID_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">CLK_ID</entry>
                <entry colname="Offset">033h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The CLK_ID register is used to identify the arrangement of the clock control registers. Software should check CLK_ID register before attempting to interpret/control the clock control registers.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="CLK_ID_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="4" valign="middle" outputclass="shaded"></entry>
                <entry namest="3" nameend="0" valign="middle">ID</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="4" outputclass="shaded"></entry>
                <entry namest="3" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="4" valign="middle">0000</entry>
                <entry namest="3" nameend="0" valign="middle">0100</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="CLK_ID_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-4</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-0</p>
                <p>ID</p>
              </entry>
                <entry colname="Description">
                <p>System Clock ID = 0000 (NONE)</p>
                <p>CLK0= SYSCLK is fixed on this system.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="ReseContRegi">
    <title>Reset Control Registers</title>
    <body>
      <section>
      <p>The clock control registers control programmable clock synthesizers used to supply clocks to the processor and associated peripherals.</p>
      </section>
    </body>
  </topic>
  <topic id="RST_CTL_ID" outputclass="crr.register">
    <title>Reset Control (RST_CTL)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="RST_CTL_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">RST_CTL</entry>
                <entry colname="Offset">040h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The RST_CTL register is used configure or trigger reset actions.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="RST_CTL_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry namest="5" nameend="4" valign="middle" morerows="1">REQMD</entry>
                <entry colname="3" valign="middle" morerows="1">DDRLK</entry>
                <entry namest="2" nameend="1" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="0" valign="middle" morerows="1">RST</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">ARST</entry>
                <entry namest="7" nameend="6" valign="middle"></entry>
                <entry namest="5" nameend="4" valign="middle"></entry>
                <entry colname="3" valign="middle">0</entry>
                <entry namest="2" nameend="1" valign="middle"></entry>
                <entry colname="0" valign="middle"></entry>
              </row>
              <row>
                <entry colname="8">CRST</entry>
                <entry namest="7" nameend="6" valign="middle">00</entry>
                <entry namest="5" nameend="4" valign="middle">SW_RSTMD</entry>
                <entry colname="3" valign="middle"></entry>
                <entry namest="2" nameend="1" valign="middle">00</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="RST_CTL_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5-4</p>
                <p>REQMD</p>
              </entry>
                <entry colname="Description">
                <p>00= Disabled - do nothing.</p>
                <p>11= Normal   - assert PORESET_B to DUT to begin normal reset sequence.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>DDRLK</p>
              </entry>
                <entry colname="Description">
                <p>DDR Reset Lock:</p>
                <p>0= Reset is asserted to the DDR DIMMs/devices normally.</p>
                <p>1= Reset will not be asserted to the DDR DIMMs/devices. With proper DDR controller setup and careful software setup DDR contents can survive resets.</p>
                <p>This bit is not cleared with a general reset, but is preserved, as long as power is available. It is expected that software that sets this bit is also responsible for clearing it.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2-1</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>RST</p>
              </entry>
                <entry colname="Description">
                <p>Reset:</p>
                <p>0= Reset sequencer operates normally.</p>
                <p>1= Upon transition from 0 to 1, restart the reset sequence.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="RST_STAT_ID" outputclass="crr.register">
    <title>Reset Status (RST_STAT)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="RST_STAT_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">RST_STAT</entry>
                <entry colname="Offset">041h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The RST_STAT register reports the current status of various reset-related signals.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="RST_STAT_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle">WAIT</entry>
                <entry colname="6" valign="middle">SYSRST</entry>
                <entry namest="5" nameend="3" valign="middle" outputclass="shaded"></entry>
                <entry colname="2" valign="middle">HRST</entry>
                <entry colname="1" valign="middle">PORST</entry>
                <entry colname="0" valign="middle">RREQ</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry colname="7" outputclass="shaded"></entry>
                <entry colname="6" outputclass="shaded"></entry>
                <entry namest="5" nameend="3" outputclass="shaded"></entry>
                <entry colname="2" outputclass="shaded"></entry>
                <entry colname="1" outputclass="shaded"></entry>
                <entry colname="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry colname="7" valign="middle">0</entry>
                <entry colname="6" valign="middle">0</entry>
                <entry namest="5" nameend="3" valign="middle">000</entry>
                <entry colname="2" valign="middle">0</entry>
                <entry colname="1" valign="middle">0</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="RST_STAT_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>WAIT</p>
              </entry>
                <entry colname="Description">
                <p>Reset Waiting:</p>
                <p>0= Reset sequencer is operating normally.</p>
                <p>1= Reset sequencer is in RMT-WAIT state, waiting for permission to proceed.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6</p>
                <p>SYSRST</p>
              </entry>
                <entry colname="Description">
                <p>System Reset:</p>
                <p>0= System is operating normally.</p>
                <p>1= System is in reset.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5-3</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>HRST</p>
              </entry>
                <entry colname="Description">
                <p>HRESET_B status:</p>
                <p>0= HRESET_B is not asserted.</p>
                <p>1= HRESET_B is asserted.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>PORST</p>
              </entry>
                <entry colname="Description">
                <p>PORESET_B status:</p>
                <p>0= PORESET_B is not asserted.</p>
                <p>1= PORESET_B is asserted.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>RREQ</p>
              </entry>
                <entry colname="Description">
                <p>RESET_REQ_B status:</p>
                <p>0= RESET_REQ_B is not asserted.</p>
                <p>1= RESET_REQ_B is asserted.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="RST_REASON_ID" outputclass="crr.register">
    <title>Reset Event Trace (RST_REASON)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="RST_REASON_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">RST_REASON</entry>
                <entry colname="Offset">042h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The RST_REASON register is used to report the cause of the most-recent reset cycle.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="RST_REASON_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="4" valign="middle">PREV</entry>
                <entry namest="3" nameend="0" valign="middle">REASON</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="4" outputclass="shaded"></entry>
                <entry namest="3" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry namest="7" nameend="4" valign="middle">1111</entry>
                <entry namest="3" nameend="0" valign="middle">0000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="RST_REASON_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-4</p>
                <p>PREV</p>
              </entry>
                <entry colname="Description">
                <p>Previous reset reason:</p>
                <p>See REASON field codes.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-0</p>
                <p>REASON</p>
              </entry>
                <entry colname="Description">
                <p>Reset Reason:</p>
                <p><codeblock>0000= Power-on reset</codeblock></p>
                <p><codeblock>0001= COP/JTAG HRESET_B was asserted</codeblock></p>
                <p><codeblock>0010= (reserved)</codeblock></p>
                <p><codeblock>0011= RST_CTL[RST] was set</codeblock></p>
                <p><codeblock>0100= Reset switch (chassis or on-board) was pushed.</codeblock></p>
                <p><codeblock>0101= RCFG_CTL[GO] (that is, reconfiguration reset) was asserted.</codeblock></p>
                <p><codeblock>0110= RESET_REQ_B assertion (from processor) was asserted.</codeblock></p>
                <p><codeblock>1111= No event recorded yet.</codeblock></p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="RST_FORCE1_ID" outputclass="crr.register">
    <title>Reset Force 1 (RST_FORCE1)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="RST_FORCE1_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">RST_FORCE1</entry>
                <entry colname="Offset">043h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The RST_FORCEn registers are used to force reset to a particular device, independent of the general reset sequencer. As long as a bit is set to 1, the reset signal to grouped devices will be asserted.</p>
        <p>Due to the high variability of hardware devices used, RST_FORCEn registers do not have a universally-defined purpose. Consult the target platform documentation for details; a table of customary assignments is shown below, but keep in mind it is only a reference.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="RST_FORCE1_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="5" valign="middle" morerows="1">QSPI</entry>
                <entry colname="4" valign="middle" morerows="1">I2C</entry>
                <entry colname="3" valign="middle" morerows="1">EPHY3</entry>
                <entry colname="2" valign="middle" morerows="1">EPHY2</entry>
                <entry colname="1" valign="middle" morerows="1">EPHY1</entry>
                <entry colname="0" valign="middle" morerows="1">MEM</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">GRST</entry>
                <entry namest="7" nameend="6" valign="middle">00</entry>
                <entry colname="5" valign="middle">0</entry>
                <entry colname="4" valign="middle">0</entry>
                <entry colname="3" valign="middle">0</entry>
                <entry colname="2" valign="middle">0</entry>
                <entry colname="1" valign="middle">0</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="RST_FORCE1_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>QSPI</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert RST_QSPI_B.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>I2C</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert RST_I2C_B.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>EPHY3</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert RST_EPHY3_B</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>EPHY2</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert RST_EPHY2_B</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>EPHY1</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert RST_EPHY1_B</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>MEM</p>
              </entry>
                <entry colname="Description">
                <p>Reset all DDR slots.</p>
                <p>1= Assert RST_MEM_B (RST_MEM_DRV_B translated to DDR voltage level).</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="RST_FORCE2_ID" outputclass="crr.register">
    <title>Reset Force 2 (RST_FORCE2)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="RST_FORCE2_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">RST_FORCE2</entry>
                <entry colname="Offset">044h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>Assert selected reset sources.  See RST_FORCE1 for details.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="RST_FORCE2_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle" morerows="1">IEEE</entry>
                <entry colname="6" valign="middle" morerows="1">RTIME</entry>
                <entry colname="5" valign="middle" morerows="1">CLK</entry>
                <entry colname="4" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="3" valign="middle" morerows="1">EMMC</entry>
                <entry colname="2" valign="middle" morerows="1">TRST</entry>
                <entry colname="1" valign="middle" morerows="1">HRST</entry>
                <entry colname="0" valign="middle" morerows="1">PORST</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">GRST</entry>
                <entry colname="7" valign="middle">0</entry>
                <entry colname="6" valign="middle">0</entry>
                <entry colname="5" valign="middle">0</entry>
                <entry colname="4" valign="middle">0</entry>
                <entry colname="3" valign="middle">0</entry>
                <entry colname="2" valign="middle">0</entry>
                <entry colname="1" valign="middle">0</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="RST_FORCE2_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>IEEE</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert RST_IEEE_B / RST_1588_B for IEEE-1588 test cards.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6</p>
                <p>RTIME</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert RST_RETIMER_B</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>CLK</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert RST_CLK.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>EMMC</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert RST_EMMC_B.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>TRST</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert DUT_TRST_B.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>HRST</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert DUT_HRESET_B.</p>
                <p>NOTE: This bit only asserts the signal to the DUT; it is not intended to be used as a general system reset.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>PORST</p>
              </entry>
                <entry colname="Description">
                <p>1= Assert DUT_PORESET_B.</p>
                <p>NOTE: This bit only asserts the signal to the DUT; it is not intended to be used as a general system reset.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="RST_FORCE3_ID" outputclass="crr.register">
    <title>Reset Force 3 (RST_FORCE3)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="RST_FORCE3_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">RST_FORCE3</entry>
                <entry colname="Offset">045h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>Assert selected reset sources.  See RST_FORCE1 for details.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="RST_FORCE3_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="5" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry namest="4" nameend="0" valign="middle" morerows="1" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">GRST</entry>
                <entry namest="7" nameend="5" valign="middle">000</entry>
                <entry namest="4" nameend="0" valign="middle">00000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="RST_FORCE3_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-5</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4-0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="RST_MASK1_ID" outputclass="crr.register">
    <title>Reset Mask 1 (RST_MASK1)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="RST_MASK1_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">RST_MASK1</entry>
                <entry colname="Offset">04Bh</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The RST_MASKn registers are used to block reset to a particular device, independent of the general reset sequencer. As long as a bit is set to 1, the reset signal to that device or devices will be blocked.</p>
        <p>RST_MASKn bits have the same bit definition as their counterparts in RST_FORCEn; refer to Table 5-53 for details.</p>
        <p>Note that RST_MASK bits are cleared on AUX reset, and so are usually only cleared by software. This is very different from the RST_FORCE registers.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="RST_MASK1_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="5" valign="middle" morerows="1">QSPI</entry>
                <entry colname="4" valign="middle" morerows="1">I2C</entry>
                <entry colname="3" valign="middle" morerows="1">EPHY3</entry>
                <entry colname="2" valign="middle" morerows="1">EPHY2</entry>
                <entry colname="1" valign="middle" morerows="1">EPHY1</entry>
                <entry colname="0" valign="middle" morerows="1">MEM</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">ARST</entry>
                <entry namest="7" nameend="6" valign="middle">00</entry>
                <entry colname="5" valign="middle">0</entry>
                <entry colname="4" valign="middle">0</entry>
                <entry colname="3" valign="middle">0</entry>
                <entry colname="2" valign="middle">0</entry>
                <entry colname="1" valign="middle">0</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="RST_MASK1_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>QSPI</p>
              </entry>
                <entry colname="Description">
                <p>1= Mast RST_QSPI_B.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>I2C</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask RST_I2C_B.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>EPHY3</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask RST_EPHY3_B</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>EPHY2</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask RST_EPHY3_B</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>EPHY1</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask RST_EPHY1_B</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>MEM</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask RST_MEM_B (DDR slots, etc.)</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="RST_MASK2_ID" outputclass="crr.register">
    <title>Reset Mask 2 (RST_MASK2)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="RST_MASK2_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">RST_MASK2</entry>
                <entry colname="Offset">04Ch</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>Mask selected reset sources.  See RST_FORCE1 for details.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="RST_MASK2_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle" morerows="1">IEEE</entry>
                <entry colname="6" valign="middle" morerows="1">RTIME</entry>
                <entry colname="5" valign="middle" morerows="1">CLK</entry>
                <entry colname="4" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="3" valign="middle" morerows="1">EMMC</entry>
                <entry colname="2" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="1" valign="middle" morerows="1">HRST</entry>
                <entry colname="0" valign="middle" morerows="1">PORST</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">ARST</entry>
                <entry colname="7" valign="middle">0</entry>
                <entry colname="6" valign="middle">0</entry>
                <entry colname="5" valign="middle">0</entry>
                <entry colname="4" valign="middle">0</entry>
                <entry colname="3" valign="middle">0</entry>
                <entry colname="2" valign="middle">0</entry>
                <entry colname="1" valign="middle">0</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="RST_MASK2_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>IEEE</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask RST_IEEE_B.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6</p>
                <p>RTIME</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask RST_RTIMER_B.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>CLK</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask RST_CLK.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>EMMC</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask RST_EMMC_B.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>HRST</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask DUT_HRESET_B.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>PORST</p>
              </entry>
                <entry colname="Description">
                <p>1= Mask DUT_PORESET_B.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="RST_MASK3_ID" outputclass="crr.register">
    <title>Reset Mask 2 (RST_MASK3)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="RST_MASK3_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">RST_MASK3</entry>
                <entry colname="Offset">04Dh</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>Mask selected reset sources.  See RST_FORCE1 for details.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="RST_MASK3_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="5" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry namest="4" nameend="0" valign="middle" morerows="1" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">ARST</entry>
                <entry namest="7" nameend="5" valign="middle">000</entry>
                <entry namest="4" nameend="0" valign="middle">00000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="RST_MASK3_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-5</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4-0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="BoarConfRegi">
    <title>Board Configuration Registers</title>
    <body>
      <section>
      <p>The reset control register group handles reset behavior configuration and general monitoring of resets.</p>
      </section>
    </body>
  </topic>
  <topic id="BRDCFG0_ID" outputclass="crr.register">
    <title>Board Configuration 0 (BRDCFG0)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="BRDCFG0_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">BRDCFG0</entry>
                <entry colname="Offset">050h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The BRDCFG0 register is commonly used to select IFC and QSPI boot devices.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="BRDCFG0_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="5" valign="middle" morerows="1">QMAP</entry>
                <entry namest="4" nameend="0" valign="middle" morerows="1" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry namest="7" nameend="5" valign="middle">SW_QMAP</entry>
                <entry namest="4" nameend="0" valign="middle">00000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="BRDCFG0_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-5</p>
                <p>QMAP</p>
              </entry>
                <entry colname="Description">
                <p>QMAP controls hows QSPI_A chip-selects are connected to various peripherals.</p>
                <p><codeblock>      QSPI_CSA_0   QSPI_CSA_1</codeblock></p>
                <p><codeblock>      ==========   ==========</codeblock></p>
                <p><codeblock>000=  DEV #0       DEV #1</codeblock></p>
                <p><codeblock>001=  DEV #1       DEV #0</codeblock></p>
                <p><codeblock>010=  EMU          DEV #0</codeblock></p>
                <p><codeblock>011=  EMU          DEV #1</codeblock></p>
                <p><codeblock>100=  DEV #0       EMU</codeblock></p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4-0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="BRDCFG1_ID" outputclass="crr.register">
    <title>Board Configuration 1 (BRDCFG1)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="BRDCFG1_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">BRDCFG1</entry>
                <entry colname="Offset">051h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The BRDCFG1 register shows/controls SYSCLK and DDRCLK speeds.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="BRDCFG1_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle" outputclass="shaded"></entry>
                <entry namest="5" nameend="4" valign="middle">DDRCLK</entry>
                <entry namest="3" nameend="0" valign="middle">SYSCLK</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="6" outputclass="shaded"></entry>
                <entry namest="5" nameend="4" outputclass="shaded"></entry>
                <entry namest="3" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry namest="7" nameend="6" valign="middle">00</entry>
                <entry namest="5" nameend="4" valign="middle">01</entry>
                <entry namest="3" nameend="0" valign="middle">0010</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="BRDCFG1_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5-4</p>
                <p>DDRCLK</p>
              </entry>
                <entry colname="Description">
                <p>DDRCLK Frequency Selection:</p>
                <p><codeblock>01= 100.00 MHz (fixed)</codeblock></p>
                <p><codeblock>Other values are reserved.</codeblock></p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-0</p>
                <p>SYSCLK</p>
              </entry>
                <entry colname="Description">
                <p>SYSCLK Frequency Selection:</p>
                <p><codeblock>0010= 100.000000 MHz (fixed)</codeblock></p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="BRDCFG2_ID" outputclass="crr.register">
    <title>Board Configuration 2 (BRDCFG2)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="BRDCFG2_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">BRDCFG2</entry>
                <entry colname="Offset">052h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The BRDCFG2 register controls SerDes clock speeds for all SerDes blocks.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="BRDCFG2_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle">SD1CK1</entry>
                <entry namest="5" nameend="4" valign="middle">SD1CK2</entry>
                <entry namest="3" nameend="2" valign="middle">SD2CK1</entry>
                <entry namest="1" nameend="0" valign="middle">SD2CK2</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
                <entry namest="7" nameend="6" outputclass="shaded"></entry>
                <entry namest="5" nameend="4" outputclass="shaded"></entry>
                <entry namest="3" nameend="2" outputclass="shaded"></entry>
                <entry namest="1" nameend="0" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry namest="7" nameend="6" valign="middle">00</entry>
                <entry namest="5" nameend="4" valign="middle">10</entry>
                <entry namest="3" nameend="2" valign="middle">SW_SPREAD</entry>
                <entry namest="1" nameend="0" valign="middle">SW_SPREAD</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="BRDCFG2_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>SD1CK1</p>
              </entry>
                <entry colname="Description">
                <p>SerDes1 Clock #1 Rate:</p>
                <p><codeblock>00= 100.000 MHz</codeblock></p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5-4</p>
                <p>SD1CK2</p>
              </entry>
                <entry colname="Description">
                <p>SerDes1 Clock #2 Rate:</p>
                <p><codeblock>10= 156.250 MHz  (fixed)</codeblock></p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-2</p>
                <p>SD2CK1</p>
              </entry>
                <entry colname="Description">
                <p>SerDes2 Clock #1 Rate:</p>
                <p><codeblock>00= 100.000 MHz  (fixed, SW_SPREAD=0)</codeblock></p>
                <p><codeblock>11= 100.000 MHz  (spread-spectrum enabled, SW_SPREAD=1)</codeblock></p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1-0</p>
                <p>SD2CK2</p>
              </entry>
                <entry colname="Description">
                <p>SerDes2 Clock #2 Rate:</p>
                <p><codeblock>00= 100.000 MHz  (fixed, SW_SPREAD=0)</codeblock></p>
                <p><codeblock>11= 100.000 MHz  (spread-spectrum enabled, SW_SPREAD=1)</codeblock></p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="BRDCFG4_ID" outputclass="crr.register">
    <title>Board Configuration 4 (BRDCFG4)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="BRDCFG4_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">BRDCFG4</entry>
                <entry colname="Offset">054h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>BRDCFG4 controls EMI routing as well as other target-dependent resources.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="BRDCFG4_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="5" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="4" valign="middle" morerows="1">TABBVSEL</entry>
                <entry colname="3" valign="middle" morerows="1">SVDDVSEL</entry>
                <entry colname="2" valign="middle" morerows="1">PEXSS</entry>
                <entry namest="1" nameend="0" valign="middle" morerows="1" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry namest="7" nameend="5" valign="middle">000</entry>
                <entry colname="4" valign="middle">1</entry>
                <entry colname="3" valign="middle">1</entry>
                <entry colname="2" valign="middle">SW_SPREAD_EN</entry>
                <entry namest="1" nameend="0" valign="middle">00</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="BRDCFG4_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-5</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>TABBVSEL</p>
              </entry>
                <entry colname="Description">
                <p>TA_BB Voltage Selection:</p>
                <p>0= 0.9V</p>
                <p>1= 1.0V (default)</p>
                <p>NOTE: If VDD is changed via PMBus, TABBVSEL must be changed as well to track VDD as close as possible.</p>
                <p>Valid for Rev B boards or later only.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3</p>
                <p>SVDDVSEL</p>
              </entry>
                <entry colname="Description">
                <p>SVDD Voltage Selection:</p>
                <p>0= 1.0V</p>
                <p>1= 0.9V</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>PEXSS</p>
              </entry>
                <entry colname="Description">
                <p>PCI Express Spread-Spectrum Enable:</p>
                <p>Controls the net labelled CFG_PEXSS or CFG_SPREAD_EN.</p>
                <p>0= Disabled.</p>
                <p>1= Enabled for SERDES3 and SERDES4.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1-0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="BRDCFG5_ID" outputclass="crr.register">
    <title>Board Configuration 5 (BRDCFG5)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="BRDCFG5_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">BRDCFG5</entry>
                <entry colname="Offset">055h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>BRDCFG5 controls target-dependent resources.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="BRDCFG5_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle" morerows="1">I2C2</entry>
                <entry colname="6" valign="middle" morerows="1">I2C3</entry>
                <entry colname="5" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="4" valign="middle" morerows="1">IEEECLK</entry>
                <entry namest="3" nameend="2" valign="middle" morerows="1">SPISDHC</entry>
                <entry colname="1" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="0" valign="middle" morerows="1">EVDDF</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry colname="7" valign="middle">0</entry>
                <entry colname="6" valign="middle">0</entry>
                <entry colname="5" valign="middle">0</entry>
                <entry colname="4" valign="middle">0</entry>
                <entry namest="3" nameend="2" valign="middle">SW_SDMODE</entry>
                <entry colname="1" valign="middle">0</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="BRDCFG5_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>I2C2</p>
              </entry>
                <entry colname="Description">
                <p>Controls I2C2 routing:</p>
                <p>0= I2C2 connect to CPLD for SDHC_CD_B/SDHC_WP signals.</p>
                <p>1= reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6</p>
                <p>I2C3</p>
              </entry>
                <entry colname="Description">
                <p>Controls I2C3 routing:</p>
                <p>0= I2C3 connect to USB2 for USB2_DRVBUS/USB2_PWRFAULT signals.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>IEEECLK</p>
              </entry>
                <entry colname="Description">
                <p>Controls where the processor receives EC clocks:</p>
                <p>0= On-board 125 MHz reference.</p>
                <p>1= Via IEEE-1588 header.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-2</p>
                <p>SPISDHC</p>
              </entry>
                <entry colname="Description">
                <p>Controls the SPI and SDHC signal routing:</p>
                <p><codeblock>0X= Auto Mode</codeblock></p>
                <p><codeblock>    If SDHC_CS_B=0 (SDHC card installed):</codeblock></p>
                <p><codeblock>      Use SDHC mode described below.</codeblock></p>
                <p><codeblock>    Else SDHC_CS_B=1 (no SDHC card installed):</codeblock></p>
                <p><codeblock>      Use eMMC mode described below.</codeblock></p>
                <p><codeblock>10= Force SDHC Mode</codeblock></p>
                <p><codeblock>      SPI_PCS[0] is routed to CPLD for SDHC_VS use.</codeblock></p>
                <p><codeblock>      SPI_PCS[1] is unused.</codeblock></p>
                <p><codeblock>11= Force eMMC Mode</codeblock></p>
                <p><codeblock>      SPI_PCS[0:3] are routed to the eMMC card as eMMC_DAT4-7.</codeblock></p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>EVDDF</p>
              </entry>
                <entry colname="Description">
                <p>EVDD Force.</p>
                <p>0= EVDD operates normally: tracking SDCard vs. EMMC use.</p>
                <p>1= EVDD is forced to 1.8V always.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="BRDCFG6_ID" outputclass="crr.register">
    <title>Board Configuration 6 (BRDCFG6)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="BRDCFG6_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">BRDCFG6</entry>
                <entry colname="Offset">056h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>BRDCFG6 controls PCIe M.2 resources for the LS1088ARDB-PB.  It is</p>
        <p>ignored on the LS1088ARDB.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="BRDCFG6_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="6" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="5" valign="middle" morerows="1">P2WGE</entry>
                <entry colname="4" valign="middle" morerows="1">P2DIS</entry>
                <entry namest="3" nameend="2" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="1" valign="middle" morerows="1">P1WGE</entry>
                <entry colname="0" valign="middle" morerows="1">P2DIS</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry namest="7" nameend="6" valign="middle">00</entry>
                <entry colname="5" valign="middle">1</entry>
                <entry colname="4" valign="middle">1</entry>
                <entry namest="3" nameend="2" valign="middle">00</entry>
                <entry colname="1" valign="middle">1</entry>
                <entry colname="0" valign="middle">1</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="BRDCFG6_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-6</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>P2WGE</p>
              </entry>
                <entry colname="Description">
                <p>M.2 #2 WIFI Gbit Enable (net PCIE2_WGIG_EN):</p>
                <p>0= Gbit WIFI mode disabled.</p>
                <p>1= Gbit WIFI mode enabled.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>P2DIS</p>
              </entry>
                <entry colname="Description">
                <p>M.2 #2 WIFI Enable (net PCIE2_WDISABLE_B):</p>
                <p>0= WIFI disabled.</p>
                <p>1= WIFI enabled.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-2</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>P1WGE</p>
              </entry>
                <entry colname="Description">
                <p>M.2 #1 WIFI Gbit Enable (net PCIE1_WGIG_EN):</p>
                <p>0= Gbit WIFI mode disabled.</p>
                <p>1= Gbit WIFI mode enabled.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>P2DIS</p>
              </entry>
                <entry colname="Description">
                <p>M.2 #1 WIFI Enable (net PCIE1_WDISABLE_B):</p>
                <p>0= WIFI disabled.</p>
                <p>1= WIFI enabled.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="BRDCFG9_ID" outputclass="crr.register">
    <title>Board Configuration 9 (BRDCFG9)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="BRDCFG9_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">BRDCFG9</entry>
                <entry colname="Offset">059h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>BRDCFG9 controls target-dependent resources.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="BRDCFG9_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="5" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="4" valign="middle" morerows="1">SFP_TX</entry>
                <entry namest="3" nameend="0" valign="middle" morerows="1" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry namest="7" nameend="5" valign="middle">000</entry>
                <entry colname="4" valign="middle">X</entry>
                <entry namest="3" nameend="0" valign="middle">0000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="BRDCFG9_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-5</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>SFP_TX</p>
              </entry>
                <entry colname="Description">
                <p>Enables transmit of an SFP module by controlling the TX_DISABLE pin (net nSFP_TX_EN).</p>
                <p>0= SFP transmit enabled.</p>
                <p>1= SFP transmit disabled.</p>
                <p>The default value is based on the serdes protocol selected.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="DUTConfRegi">
    <title>DUT Configuration Registers</title>
    <body>
      <section>
      <p>This block of registers control the configuration of the board. BRDCFG registers are always static, driven at all times power is available. There are up to 16 registers providing up to 128 control options; however, not every platform implements all the registers.</p>
      </section>
    </body>
  </topic>
  <topic id="DUTCFG0_ID" outputclass="crr.register">
    <title>DUT Configuration 0 (DUTCFG0)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="DUTCFG0_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">DUTCFG0</entry>
                <entry colname="Offset">060h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The DUTCFG0 register is used to control fixed DUT configurations, in particular the RCW location setting (cfg_rcw_src).</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="DUTCFG0_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="0" valign="middle" morerows="1">RCWSRC</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry namest="7" nameend="0" valign="middle">SW_RCRSRC</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="DUTCFG0_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-0</p>
                <p>RCWSRC</p>
              </entry>
                <entry colname="Description">
                <p>RCW Source Location:</p>
                <p>The 8 most-significant bits of the RCW location configuration (cfg_rcw_src[8:1]).</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="DUTCFG1_ID" outputclass="crr.register">
    <title>DUT Configuration 1 (DUTCFG1)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="DUTCFG1_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">DUTCFG1</entry>
                <entry colname="Offset">061h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>DUTCFG1 manages additional cfg_rcw_src bits and DRAM type (if supported).</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="DUTCFG1_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle" morerows="1">DRAM</entry>
                <entry namest="6" nameend="5" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="4" valign="middle" morerows="1">TE</entry>
                <entry namest="3" nameend="1" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="0" valign="middle" morerows="1">RSRC8</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry colname="7" valign="middle">SW_DRAM</entry>
                <entry namest="6" nameend="5" valign="middle">11</entry>
                <entry colname="4" valign="middle">1</entry>
                <entry namest="3" nameend="1" valign="middle">111</entry>
                <entry colname="0" valign="middle">1</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="DUTCFG1_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>DRAM</p>
              </entry>
                <entry colname="Description">
                <p>DRAM Type:</p>
                <p>0 = DDR4 (LS1043A only).</p>
                <p>1 = DDR4 (LS1088A only).</p>
                <p>NOTE: Only DDR4 is supported, but the configuration value varies depending on the device.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6-5</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4</p>
                <p>TE</p>
              </entry>
                <entry colname="Description">
                <p>IFC Transceiver Enable:</p>
                <p>Controls cfg_te.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>3-1</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>RSRC8</p>
              </entry>
                <entry colname="Description">
                <p>RCW Source Location (additional):</p>
                <p>Controls cfg_rcw_src[0] (the LSB of the 9-bit value).</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="DUTCFG2_ID" outputclass="crr.register">
    <title>DUT Configuration 2 (DUTCFG2)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="DUTCFG2_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">DUTCFG2</entry>
                <entry colname="Offset">062h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>DUTCFG2 manages device selection (SVR) and internal-only device test features.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="DUTCFG2_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="3" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry namest="2" nameend="1" valign="middle" morerows="1">SVR01</entry>
                <entry colname="0" valign="middle" morerows="1">TEST</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry namest="7" nameend="3" valign="middle">11111</entry>
                <entry namest="2" nameend="1" valign="middle">SW_SVR</entry>
                <entry colname="0" valign="middle">1</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="DUTCFG2_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-3</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2-1</p>
                <p>SVR01</p>
              </entry>
                <entry colname="Description">
                <p>Controls cfg_svr[0:1] (note the bit order).</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>TEST</p>
              </entry>
                <entry colname="Description">
                <p>Controls processor pin 'TESTSEL_B'.</p>
                <p>NOTE: Unlike all other DUTCFG bits, this one is static (always driven).</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="DUTCFG6_ID" outputclass="crr.register">
    <title>DUT Configuration 6 (DUTCFG6)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="DUTCFG6_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">DUTCFG6</entry>
                <entry colname="Offset">066h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The DUTCFG6 register is used to sample device-specific configuration modes.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="DUTCFG6_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle" morerows="1">RSPDS</entry>
                <entry namest="6" nameend="1" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="0" valign="middle" morerows="1">SOC</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry colname="7" valign="middle">1</entry>
                <entry namest="6" nameend="1" valign="middle">111111</entry>
                <entry colname="0" valign="middle">1</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="DUTCFG6_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>RSPDS</p>
              </entry>
                <entry colname="Description">
                <p>Reset Sequencer Pause Disable:</p>
                <p>Configures cfg_rsp_dis:</p>
                <p>0 : Reset Sequencer Pause</p>
                <p>1 : Reset Sequencer Normal</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6-1</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>SOC</p>
              </entry>
                <entry colname="Description">
                <p>Controls cfg_soc_use:</p>
                <p>0 : (system-dependent)</p>
                <p>1 : (system-dependent)</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="DUTCFG11_ID" outputclass="crr.register">
    <title>DUT Configuration 11 (DUTCFG11)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="DUTCFG11_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">DUTCFG11</entry>
                <entry colname="Offset">06Bh</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The DUTCFG11 register is used to control the CFG_ENGUSE[7:0] signals.  The function of these bits are defined by Freescale engineers for special use.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="DUTCFG11_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle" morerows="1">ENGUSE0</entry>
                <entry colname="6" valign="middle" morerows="1">ENGUSE1</entry>
                <entry colname="5" valign="middle" morerows="1">ENGUSE2</entry>
                <entry namest="4" nameend="0" valign="middle" morerows="1" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry colname="7" valign="middle">SW_ENG0</entry>
                <entry colname="6" valign="middle">SW_ENG1</entry>
                <entry colname="5" valign="middle">SW_ENG2</entry>
                <entry namest="4" nameend="0" valign="middle">11111</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="DUTCFG11_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>ENGUSE0</p>
              </entry>
                <entry colname="Description">
                <p>Differential Clock Mode (cfg_enguse0):</p>
                <p>0= Processor uses differential SYSCLK_P/SYSCLK_N input.</p>
                <p>1= Processor uses single-ended SYSCLK input.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6</p>
                <p>ENGUSE1</p>
              </entry>
                <entry colname="Description">
                <p>Reserved (cfg_enguse1):</p>
                <p>1= Default value for unassigned pins.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>5</p>
                <p>ENGUSE2</p>
              </entry>
                <entry colname="Description">
                <p>Reserved (cfg_enguse2):</p>
                <p>1= Default value for unassigned pins.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>4-0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="DUTCFG12_ID" outputclass="crr.register">
    <title>DUT Configuration 12 (DUTCFG12)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="DUTCFG12_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">DUTCFG12</entry>
                <entry colname="Offset">06Ch</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The DUTCFG12 register is used to control the general-purpose GPCFG signals.</p>
        <p>These configurations are used exclusively by end customers for their own purposes.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="DUTCFG12_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="0" valign="middle" morerows="1">GCA</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">RRST</entry>
                <entry namest="7" nameend="0" valign="middle">11111111</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="DUTCFG12_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-0</p>
                <p>GCA</p>
              </entry>
                <entry colname="Description">
                <p>General Purpose Configuration Controls:</p>
                <p>GCA drives cfg_gpin[7:0].</p>
                <p>No hardware definition, software determined meanings.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="CoreManaSpacRegi">
    <title>Core Management Space Registers</title>
    <body>
      <section>
      <p>This block of registers control the configuration of the DUT (Device Under Test). DUTCFG registers, unlike BRDCFG registers, are not always driven - they are driven only during the reset configuration sampling interval (PORESET_B assertion), and remain tri-stated thereafter.  Refer to the device hardware specification for hardware pin-sampled timing parameters.</p>
      </section>
    </body>
  </topic>
  <topic id="CMSA_ID" outputclass="crr.register">
    <title>Core Management Address (CMSA)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="CMSA_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">CMSA</entry>
                <entry colname="Offset">0D8h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The CMSA register selects one of the internal core management registers within Qixis for subsequent read- or write-access via the CMSD register.</p>
        <p>For RDB systems, only the switch-access registers are defined.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="CMSA_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="0" valign="middle" morerows="1">ADDR</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">ARST</entry>
                <entry namest="7" nameend="0" valign="middle">00000000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="CMSA_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-0</p>
                <p>ADDR</p>
              </entry>
                <entry colname="Description">
                <p>Select internal CMS register for read/write via CMS_D, one of:</p>
                <p><codeblock>00h-0Fh : SW#      : Number of switches the system has.</codeblock></p>
                <p><codeblock>01h-0Fh : SW[1:n]  : Image of SW1..SWn</codeblock></p>
                <p>Ranges not listed are reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <p>A standard use of the CMSA/CMSD port is to read the state of configuration switches, as follows:</p>
      <p><codeblock>Qixis_Set_Reg( CMS_A, 00h );</codeblock></p>
      <p><codeblock>nr = Qixis_Get_Reg( CMS_D );</codeblock></p>
      <p><codeblock>for (i = 1; i &lt;= nr; i++) {</codeblock></p>
      <p><codeblock>   Qixis_Set_Reg( CMS_A, i );</codeblock></p>
      <p><codeblock>   printf("SW%1d = %02X\\ n", i, Qixis_Get_Reg( CMS_D ));</codeblock></p>
      <p><codeblock>}</codeblock></p>
    </body>
  </topic>
  <topic id="CMSD_ID" outputclass="crr.register">
    <title>Core Management Data (CMSD)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="CMSD_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">CMSD</entry>
                <entry colname="Offset">0D9h</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>CMSD contains the value of a CMS register selected by CMSA.  See CMSA for details.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="CMSD_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry namest="7" nameend="0" valign="middle" morerows="1">DATA</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">ARST</entry>
                <entry namest="7" nameend="0" valign="middle">00000000</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="CMSD_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7-0</p>
                <p>DATA</p>
              </entry>
                <entry colname="Description">
                <p>Read/write internal CMS registers selected with CMS_A.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="SwitManaRegi">
    <title>Switch Manager Registers</title>
    <body>
      <section>
      <p>The core management address/data registers allow access to internal Qixis control registers, primarily the direct switch access registers which allow easy reporting of board configuration.</p>
      <p>Numerous other registers exists; do no read or write undocumented registers.</p>
      <title></title>
      <table frame="all" id="TTcms0" outputclass="crr.memoryMap">
        <tgroup cols="3">
          <colspec colname="Address" colwidth="0.9in" />
          <colspec colname="Name" colwidth="0.8in" />
          <colspec colname="Definition" colwidth="4.8in" />
          <thead>
            <row>
              <entry colname="Address">Address</entry>
              <entry colname="Name">Name</entry>
              <entry colname="Definition">Definition</entry>
            </row>
          </thead>
          <tbody>
            <row>
              <entry colname="Address">00</entry>
              <entry colname="Name">SW#</entry>
              <entry colname="Definition">Number of configuration switches.</entry>
            </row>
            <row>
              <entry colname="Address">01..0F</entry>
              <entry colname="Name">SWn</entry>
              <entry colname="Definition">Image of configuration switch #n.</entry>
            </row>
            <row>
              <entry colname="Address">24..27</entry>
              <entry colname="Name">I2CRMT</entry>
              <entry colname="Definition">I2C BCSR interface controller.</entry>
            </row>
            <row>
              <entry colname="Address">30..37</entry>
              <entry colname="Name">I2CCLK</entry>
              <entry colname="Definition">I2C clock programmer.</entry>
            </row>
            <row>
              <entry colname="Address">50..67</entry>
              <entry colname="Name">PMPROG</entry>
              <entry colname="Definition">PMBus power supply programmer.</entry>
            </row>
            <row>
              <entry colname="Address">70..77</entry>
              <entry colname="Name">RESET</entry>
              <entry colname="Definition">System reset controller.</entry>
            </row>
            <row>
              <entry colname="Address">80..8F</entry>
              <entry colname="Name">POWER</entry>
              <entry colname="Definition">System power controller.</entry>
            </row>
          </tbody>
        </tgroup>
      </table>
      <p>Ranges not listed are reserved.</p>
      <p>A standard use of the CMSA/CMSD port is to read the state of configuration switches, for example:</p>
      <p><codeblock>Qixis_Set_Reg( CMS_A, 00h );</codeblock></p>
      <p><codeblock>nr = Qixis_Get_Reg( CMS_D );</codeblock></p>
      <p><codeblock>for (i = 1; i &lt;= nr; i++) {</codeblock></p>
      <p><codeblock>   Qixis_Set_Reg( CMS_A, i );</codeblock></p>
      <p><codeblock>   printf("SW%1d = %02X\\ n", i, Qixis_Get_Reg( CMS_D ));</codeblock></p>
      <p><codeblock>}</codeblock></p>
      </section>
    </body>
  </topic>
  <topic id="SWS_CTL_ID" outputclass="crr.register">
    <title>Switch Control (SWS_CTL)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="SWS_CTL_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">SWS_CTL</entry>
                <entry colname="Offset">0DCh</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>The SWS_CTL register manages the switch sampler.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="SWS_CTL_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry namest="6" nameend="3" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="2" valign="middle" morerows="1">POLL</entry>
                <entry colname="1" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="0" valign="middle" morerows="1" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">ARST</entry>
                <entry colname="7" valign="middle">0</entry>
                <entry namest="6" nameend="3" valign="middle">0000</entry>
                <entry colname="2" valign="middle">1</entry>
                <entry colname="1" valign="middle">0</entry>
                <entry colname="0" valign="middle">1</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="SWS_CTL_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6-3</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>2</p>
                <p>POLL</p>
              </entry>
                <entry colname="Description">
                <p>Poll Switches:</p>
                <p>0= Polling is disabled.</p>
                <p>1= Polling is enabled; the switches are sampled continually.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>1</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
  <topic id="SWS_STAT_ID" outputclass="crr.register">
    <title>Switch Sample Status (SWS_STAT)</title>
    <body>
      <section outputclass="regAddress">
        <title>Address</title>
        <table frame="all" id="SWS_STAT_ID_addressTable" outputclass="crr.addressTable">
          <tgroup cols="2">
            <colspec colname="Register" colwidth="1.5in"/>
            <colspec colname="Offset" colwidth="5.4in"/>
            <thead>
              <row>
                <entry colname="Register">Register</entry>
                <entry colname="Offset">Offset</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Register">SWS_STAT</entry>
                <entry colname="Offset">0DDh</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFunction">
        <title>Function</title>
        <p>SWS_STAT reports on update activity from the serial switch sampler.</p>
      </section>
      <section outputclass="regDiagram">
        <title>Diagram</title>
        <table frame="all" id="SWS_STAT_ID_regFigure" outputclass="crr.regFigure regtable">
          <tgroup cols="9">
            <colspec align="center" colname="8" colwidth="0.43125in"/>
            <colspec align="center" colname="7" colwidth="0.811764in"/>
            <colspec align="center" colname="6" colwidth="0.811764in"/>
            <colspec align="center" colname="5" colwidth="0.811764in"/>
            <colspec align="center" colname="4" colwidth="0.811764in"/>
            <colspec align="center" colname="3" colwidth="0.811764in"/>
            <colspec align="center" colname="2" colwidth="0.811764in"/>
            <colspec align="center" colname="1" colwidth="0.811764in"/>
            <colspec align="center" colname="0" colwidth="0.811764in"/>
            <tbody>
              <row>
                <entry colname="8">Bits</entry>
                <entry colname="7">7</entry>
                <entry colname="6">6</entry>
                <entry colname="5">5</entry>
                <entry colname="4">4</entry>
                <entry colname="3">3</entry>
                <entry colname="2">2</entry>
                <entry colname="1">1</entry>
                <entry colname="0">0</entry>
              </row>
              <row>
                <entry colname="8" valign="middle">R</entry>
                <entry colname="7" valign="middle" morerows="1">UPD</entry>
                <entry namest="6" nameend="1" valign="middle" morerows="1" outputclass="shaded"></entry>
                <entry colname="0" valign="middle" morerows="1" outputclass="shaded"></entry>
              </row>
              <row>
                <entry colname="8" valign="middle">W</entry>
              </row>
              <row>
                <entry colname="8">NONE</entry>
                <entry colname="7" valign="middle">1</entry>
                <entry namest="6" nameend="1" valign="middle">000000</entry>
                <entry colname="0" valign="middle">0</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </section>
      <section outputclass="regFields">
        <title>Fields</title>
        <table frame="all" id="SWS_STAT_ID_bitFieldTable" outputclass="crr.regBitFieldTable bitFieldTable">
          <tgroup cols="2">
            <colspec align="center" colname="Field" colwidth="1in"/>
            <colspec colname="Description" colwidth="5.9in"/>
            <thead>
              <row>
                <entry colname="Field">Field</entry>
                <entry colname="Function">Function</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry colname="Field">
                <p>7</p>
                <p>UPD</p>
              </entry>
                <entry colname="Description">
                <p>Updated:</p>
                <p>0= (reserved)</p>
                <p>1= The switches were updated.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>6-1</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
              <row>
                <entry colname="Field">
                <p>0</p>
                <p>-</p>
              </entry>
                <entry colname="Description">
                <p>Reserved.</p>
              </entry>
            </row>
            </tbody>
          </tgroup>
        </table>
      </section>
    </body>
  </topic>
</topic>
