LPCOpen Platform for LPC112X microcontrollers  112X
LPCOpen Platform for the NXP LPC112X family of Microcontrollers
Data Structures | Macros | Enumerations | Functions
adc_112x.h File Reference

Go to the source code of this file.

Data Structures

struct  LPC_ADC_T
 ADC register block structure. More...
 

Macros

#define ADC_MAX_SAMPLE_RATE   2000000
 
#define ADC_CR_CLKDIV_MASK   (0xFF << 0)
 ADC register support bitfields and mask. More...
 
#define ADC_CR_CLKDIV_BITPOS   (0)
 
#define ADC_CR_ASYNC_MODE   (1 << 8)
 
#define ADC_CR_MODE10BIT   (1 << 9)
 
#define ADC_CR_LPWRMODEBIT   (1 << 10)
 
#define ADC_CR_CALMODEBIT   (1 << 30)
 
#define ADC_CR_BITACC(n)   ((((n) & 0x1) << 9))
 
#define ADC_CR_CLKDIV(n)   ((((n) & 0xFF) << 0))
 
#define ADC_SAMPLE_RATE_CONFIG_MASK   (ADC_CR_CLKDIV(0xFF) | ADC_CR_BITACC(0x01))
 
#define ADC_SEQ_CTRL_CHANSEL(n)   (1 << (n))
 
#define ADC_SEQ_CTRL_CHANSEL_MASK   (0xFFF)
 
#define ADC_SEQ_CTRL_HWTRIG_ARM_TXEV   (0 << 12)
 
#define ADC_SEQ_CTRL_HWTRIG_CT16B1_MAT3   (1 << 12)
 
#define ADC_SEQ_CTRL_HWTRIG_CT16B1_MAT2   (2 << 12)
 
#define ADC_SEQ_CTRL_HWTRIG_PIO0_2   (3 << 12)
 
#define ADC_SEQ_CTRL_HWTRIG_PIO0_7   (4 << 12)
 
#define ADC_SEQ_CTRL_HWTRIG_PIO0_8   (5 << 12)
 
#define ADC_SEQ_CTRL_HWTRIG_PIO0_9   (6 << 12)
 
#define ADC_SEQ_CTRL_HWTRIG_PIO2_0   (7 << 12)
 
#define ADC_SEQ_CTRL_HWTRIG_MASK   (0x3F << 12)
 
#define ADC_SEQ_CTRL_HWTRIG_POLPOS   (1 << 18)
 
#define ADC_SEQ_CTRL_HWTRIG_SYNCBYPASS   (1 << 19)
 
#define ADC_SEQ_CTRL_START   (1 << 26)
 
#define ADC_SEQ_CTRL_BURST   (1 << 27)
 
#define ADC_SEQ_CTRL_SINGLESTEP   (1 << 28)
 
#define ADC_SEQ_CTRL_LOWPRIO   (1 << 29)
 
#define ADC_SEQ_CTRL_MODE_EOS   (1 << 30)
 
#define ADC_SEQ_CTRL_SEQ_ENA   (1UL << 31)
 
#define ADC_SEQ_GDAT_RESULT_MASK   (0xFFF << 4)
 
#define ADC_SEQ_GDAT_RESULT_BITPOS   (4)
 
#define ADC_SEQ_GDAT_THCMPRANGE_MASK   (0x3 << 16)
 
#define ADC_SEQ_GDAT_THCMPRANGE_BITPOS   (16)
 
#define ADC_SEQ_GDAT_THCMPCROSS_MASK   (0x3 << 18)
 
#define ADC_SEQ_GDAT_THCMPCROSS_BITPOS   (18)
 
#define ADC_SEQ_GDAT_CHAN_MASK   (0xF << 26)
 
#define ADC_SEQ_GDAT_CHAN_BITPOS   (26)
 
#define ADC_SEQ_GDAT_OVERRUN   (1 << 30)
 
#define ADC_SEQ_GDAT_DATAVALID   (1UL << 31)
 
#define ADC_DR_RESULT(n)   ((((n) >> 4) & 0xFFF))
 
#define ADC_DR_THCMPRANGE_MASK   (0x3 << 16)
 
#define ADC_DR_THCMPRANGE_BITPOS   (16)
 
#define ADC_DR_THCMPRANGE(n)   (((n) >> ADC_DR_THCMPRANGE_BITPOS) & 0x3)
 
#define ADC_DR_THCMPCROSS_MASK   (0x3 << 18)
 
#define ADC_DR_THCMPCROSS_BITPOS   (18)
 
#define ADC_DR_THCMPCROSS(n)   (((n) >> ADC_DR_THCMPCROSS_BITPOS) & 0x3)
 
#define ADC_DR_CHAN_MASK   (0xF << 26)
 
#define ADC_DR_CHAN_BITPOS   (26)
 
#define ADC_DR_CHANNEL(n)   (((n) >> ADC_DR_CHAN_BITPOS) & 0xF)
 
#define ADC_DR_OVERRUN   (1 << 30)
 
#define ADC_DR_DATAVALID   (1UL << 31)
 
#define ADC_DR_DONE(n)   (((n) >> 31))
 
#define ADC_THR_VAL_MASK   (0xFFF << 4)
 
#define ADC_THR_VAL_POS   (4)
 
#define ADC_THRSEL_CHAN_SEL_THR1(n)   (1 << (n))
 
#define ADC_INTEN_SEQA_ENABLE   (1 << 0)
 
#define ADC_INTEN_SEQB_ENABLE   (1 << 1)
 
#define ADC_INTEN_SEQN_ENABLE(seq)   (1 << (seq))
 
#define ADC_INTEN_OVRRUN_ENABLE   (1 << 2)
 
#define ADC_INTEN_CMP_DISBALE   (0)
 
#define ADC_INTEN_CMP_OUTSIDETH   (1)
 
#define ADC_INTEN_CMP_CROSSTH   (2)
 
#define ADC_INTEN_CMP_MASK   (3)
 
#define ADC_INTEN_CMP_ENABLE(isel, ch)   (((isel) & ADC_INTEN_CMP_MASK) << ((2 * (ch)) + 3))
 
#define ADC_FLAGS_THCMP_MASK(ch)   (1 << (ch))
 
#define ADC_FLAGS_OVRRUN_MASK(ch)   (1 << (12 + (ch)))
 
#define ADC_FLAGS_SEQA_OVRRUN_MASK   (1 << 24)
 
#define ADC_FLAGS_SEQB_OVRRUN_MASK   (1 << 25)
 
#define ADC_FLAGS_SEQN_OVRRUN_MASK(seq)   (1 << (24 + (seq)))
 
#define ADC_FLAGS_SEQA_INT_MASK   (1 << 28)
 
#define ADC_FLAGS_SEQB_INT_MASK   (1 << 29)
 
#define ADC_FLAGS_SEQN_INT_MASK(seq)   (1 << (28 + (seq)))
 
#define ADC_FLAGS_THCMP_INT_MASK   (1 << 30)
 
#define ADC_FLAGS_OVRRUN_INT_MASK   (1UL << 31)
 
#define ADC_TRIM_VRANGE_HIGHV   (0 << 5)
 
#define ADC_TRIM_VRANGE_LOWV   (1 << 5)
 

Enumerations

enum  ADC_SEQ_IDX_T { ADC_SEQA_IDX, ADC_SEQB_IDX }
 
enum  ADC_DR_THCMPRANGE_T { ADC_DR_THCMPRANGE_INRANGE, ADC_DR_THCMPRANGE_RESERVED, ADC_DR_THCMPRANGE_BELOW, ADC_DR_THCMPRANGE_ABOVE }
 
enum  ADC_DR_THCMPCROSS_T { ADC_DR_THCMPCROSS_NOCROSS, ADC_DR_THCMPCROSS_RESERVED, ADC_DR_THCMPCROSS_DOWNWARD, ADC_DR_THCMPCROSS_UPWARD }
 
enum  ADC_INTEN_THCMP_T { ADC_INTEN_THCMP_DISABLE, ADC_INTEN_THCMP_OUTSIDE, ADC_INTEN_THCMP_CROSSING }
 

Functions

void Chip_ADC_Init (LPC_ADC_T *pADC, uint32_t flags)
 Initialize the ADC peripheral. More...
 
void Chip_ADC_DeInit (LPC_ADC_T *pADC)
 Shutdown ADC. More...
 
STATIC INLINE void Chip_ADC_SetDivider (LPC_ADC_T *pADC, uint8_t div)
 Set ADC divider. More...
 
void Chip_ADC_SetClockRate (LPC_ADC_T *pADC, uint32_t rate)
 Set ADC clock rate. More...
 
STATIC INLINE uint8_t Chip_ADC_GetDivider (LPC_ADC_T *pADC)
 Get ADC divider. More...
 
void Chip_ADC_StartCalibration (LPC_ADC_T *pADC)
 Start ADC calibration. More...
 
STATIC INLINE bool Chip_ADC_IsCalibrationDone (LPC_ADC_T *pADC)
 Start ADC calibration. More...
 
void Chip_ADC_SetSequencerBits (LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex, uint32_t bits)
 Helper function for safely setting ADC sequencer register bits. More...
 
void Chip_ADC_ClearSequencerBits (LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex, uint32_t bits)
 Helper function for safely clearing ADC sequencer register bits. More...
 
STATIC INLINE void Chip_ADC_SetupSequencer (LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex, uint32_t options)
 Sets up ADC conversion sequencer A or B. More...
 
STATIC INLINE void Chip_ADC_EnableSequencer (LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex)
 Enables a sequencer. More...
 
STATIC INLINE void Chip_ADC_DisableSequencer (LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex)
 Disables a sequencer. More...
 
STATIC INLINE void Chip_ADC_StartSequencer (LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex)
 Forces a sequencer trigger event (software trigger of ADC) More...
 
STATIC INLINE void Chip_ADC_StartBurstSequencer (LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex)
 Starts sequencer burst mode. More...
 
STATIC INLINE void Chip_ADC_StopBurstSequencer (LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex)
 Stops sequencer burst mode. More...
 
STATIC INLINE uint32_t Chip_ADC_GetSequencerDataReg (LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex)
 Read a ADC sequence global data register. More...
 
STATIC INLINE uint32_t Chip_ADC_GetDataReg (LPC_ADC_T *pADC, uint8_t index)
 Read a ADC data register. More...
 
STATIC INLINE void Chip_ADC_SetThrLowValue (LPC_ADC_T *pADC, uint8_t thrnum, uint16_t value)
 Set Threshold low value in ADC. More...
 
STATIC INLINE void Chip_ADC_SetThrHighValue (LPC_ADC_T *pADC, uint8_t thrnum, uint16_t value)
 Set Threshold high value in ADC. More...
 
void Chip_ADC_SelectTH0Channels (LPC_ADC_T *pADC, uint32_t channels)
 Select threshold 0 values for comparison for selected channels. More...
 
void Chip_ADC_SelectTH1Channels (LPC_ADC_T *pADC, uint32_t channels)
 Select threshold 1 value for comparison for selected channels. More...
 
void Chip_ADC_EnableInt (LPC_ADC_T *pADC, uint32_t intMask)
 Enable interrupts in ADC (sequencers A/B and overrun) More...
 
void Chip_ADC_DisableInt (LPC_ADC_T *pADC, uint32_t intMask)
 Disable interrupts in ADC (sequencers A/B and overrun) More...
 
void Chip_ADC_SetThresholdInt (LPC_ADC_T *pADC, uint8_t ch, ADC_INTEN_THCMP_T thInt)
 Enable a threshold event interrupt in ADC. More...
 
STATIC INLINE uint32_t Chip_ADC_GetFlags (LPC_ADC_T *pADC)
 Get flags register in ADC. More...
 
STATIC INLINE void Chip_ADC_ClearFlags (LPC_ADC_T *pADC, uint32_t flags)
 Clear flags register in ADC. More...
 
STATIC INLINE void Chip_ADC_SetTrim (LPC_ADC_T *pADC, uint32_t trim)
 Set Trim register in ADC. More...