LPCOpen Platform for LPC112X microcontrollers  112X
LPCOpen Platform for the NXP LPC112X family of Microcontrollers
gpio_112x.h
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1 /*
2  * @brief LPC11xx GPIO driver for CHIP_LPC11CXX, CHIP_LPC110X, CHIP_LPC11XXLV,
3  * and CHIP_LPC1125 families only.
4  *
5  * @note
6  * Copyright(C) NXP Semiconductors, 2013
7  * All rights reserved.
8  *
9  * @par
10  * Software that is described herein is for illustrative purposes only
11  * which provides customers with programming information regarding the
12  * LPC products. This software is supplied "AS IS" without any warranties of
13  * any kind, and NXP Semiconductors and its licensor disclaim any and
14  * all warranties, express or implied, including all implied warranties of
15  * merchantability, fitness for a particular purpose and non-infringement of
16  * intellectual property rights. NXP Semiconductors assumes no responsibility
17  * or liability for the use of the software, conveys no license or rights under any
18  * patent, copyright, mask work right, or any other intellectual property rights in
19  * or to any products. NXP Semiconductors reserves the right to make changes
20  * in the software without notification. NXP Semiconductors also makes no
21  * representation or warranty that such application will be suitable for the
22  * specified use without further testing or modification.
23  *
24  * @par
25  * Permission to use, copy, modify, and distribute this software and its
26  * documentation is hereby granted, under NXP Semiconductors' and its
27  * licensor's relevant copyrights in the software, without fee, provided that it
28  * is used in conjunction with NXP Semiconductors microcontrollers. This
29  * copyright, permission, and disclaimer notice must appear in all copies of
30  * this code.
31  */
32 
33 #ifndef __GPIO_1125_H_
34 #define __GPIO_1125_H_
35 
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39 
50 typedef struct {
51  __IO uint32_t DATA[4096];
52  __I uint32_t RESERVED1[4096];
53  __IO uint32_t DIR;
54  __IO uint32_t IS;
55  __IO uint32_t IBE;
56  __IO uint32_t IEV;
57  __IO uint32_t IE;
58  __I uint32_t RIS;
59  __I uint32_t MIS;
60  __O uint32_t IC;
61  __I uint32_t RESERVED2[8184]; /* Padding added for aligning contiguous GPIO blocks */
62 } LPC_GPIO_T;
63 
69 void Chip_GPIO_Init(LPC_GPIO_T *pGPIO);
70 
76 void Chip_GPIO_DeInit(LPC_GPIO_T *pGPIO);
77 
86 STATIC INLINE void Chip_GPIO_WritePortBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit, bool setting)
87 {
88  pGPIO[port].DATA[1 << bit] = setting << bit;
89 }
90 
100 STATIC INLINE void Chip_GPIO_SetPinState(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool setting)
101 {
102  pGPIO[port].DATA[1 << pin] = setting << pin;
103 }
104 
113 STATIC INLINE bool Chip_GPIO_ReadPortBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit)
114 {
115  return (bool) ((pGPIO[port].DATA[1 << bit] >> bit) & 1);
116 }
117 
126 STATIC INLINE bool Chip_GPIO_GetPinState(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
127 {
128  return (pGPIO[port].DATA[1 << pin]) != 0;
129 }
130 
142 void Chip_GPIO_WriteDirBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit, bool setting);
143 
151 STATIC INLINE void Chip_GPIO_SetPinDIROutput(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
152 {
153  pGPIO[port].DIR |= (1UL << pin);
154 }
155 
163 STATIC INLINE void Chip_GPIO_SetPinDIRInput(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
164 {
165  pGPIO[port].DIR &= ~(1UL << pin);
166 }
167 
176 void Chip_GPIO_SetPinDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool output);
177 
186 STATIC INLINE bool Chip_GPIO_ReadDirBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit)
187 {
188  return (bool) (((pGPIO[port].DIR) >> bit) & 1);
189 }
190 
198 STATIC INLINE bool Chip_GPIO_GetPinDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
199 {
200  return (bool) (pGPIO[port].DIR >> pin) & 1;
201 }
202 
213 void Chip_GPIO_SetDir(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t bit, uint8_t out);
214 
224 STATIC INLINE void Chip_GPIO_SetPortDIROutput(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
225 {
226  pGPIO[port].DIR |= pinMask;
227 }
228 
238 STATIC INLINE void Chip_GPIO_SetPortDIRInput(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask)
239 {
240  pGPIO[port].DIR &= ~pinMask;
241 }
242 
253 void Chip_GPIO_SetPortDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask, bool outSet);
254 
263 STATIC INLINE uint32_t Chip_GPIO_GetPortDIR(LPC_GPIO_T *pGPIO, uint8_t port)
264 {
265  return pGPIO[port].DIR;
266 }
267 
275 STATIC INLINE void Chip_GPIO_SetPortValue(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t value)
276 {
277  pGPIO[port].DATA[0xFFF] = value;
278 }
279 
286 STATIC INLINE uint32_t Chip_GPIO_GetPortValue(LPC_GPIO_T *pGPIO, uint8_t port)
287 {
288  return pGPIO[port].DATA[0xFFF];
289 }
290 
301 STATIC INLINE void Chip_GPIO_SetValue(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t bit)
302 {
303  pGPIO[port].DATA[bit] = bit;
304 }
305 
315 STATIC INLINE void Chip_GPIO_SetPortOutHigh(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
316 {
317  pGPIO[port].DATA[pins] = 0xFFF;
318 }
319 
329 STATIC INLINE void Chip_GPIO_SetPinOutHigh(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
330 {
331  pGPIO[port].DATA[1 << pin] = (1 << pin);
332 }
333 
343 STATIC INLINE void Chip_GPIO_ClearValue(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t bit)
344 {
345  pGPIO[port].DATA[bit] = ~bit;
346 }
347 
357 STATIC INLINE void Chip_GPIO_SetPortOutLow(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
358 {
359  pGPIO[port].DATA[pins] = 0;
360 }
361 
371 STATIC INLINE void Chip_GPIO_SetPinOutLow(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
372 {
373  pGPIO[port].DATA[1 << pin] = 0;
374 }
375 
385 STATIC INLINE void Chip_GPIO_SetPortToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pins)
386 {
387  pGPIO[port].DATA[pins] ^= 0xFFF;
388 }
389 
399 STATIC INLINE void Chip_GPIO_SetPinToggle(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin)
400 {
401  pGPIO[port].DATA[1 << pin] ^= (1 << pin);
402 }
403 
412 STATIC INLINE uint32_t Chip_GPIO_ReadValue(LPC_GPIO_T *pGPIO, uint8_t port)
413 {
414  return pGPIO[port].DATA[4095];
415 }
416 
424 STATIC INLINE void Chip_GPIO_SetPinModeEdge(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
425 {
426  pGPIO[port].IS &= ~pinmask;
427 }
428 
436 STATIC INLINE void Chip_GPIO_SetPinModeLevel(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
437 {
438  pGPIO[port].IS |= pinmask;
439 }
440 
451 STATIC INLINE uint32_t Chip_GPIO_IsLevelEnabled(LPC_GPIO_T *pGPIO, uint8_t port)
452 {
453  return pGPIO[port].IS;
454 }
455 
463 STATIC INLINE void Chip_GPIO_SetEdgeModeBoth(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
464 {
465  pGPIO[port].IBE |= pinmask;
466 }
467 
475 STATIC INLINE void Chip_GPIO_SetEdgeModeSingle(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
476 {
477  pGPIO[port].IBE &= ~pinmask;
478 }
479 
492 STATIC INLINE uint32_t Chip_GPIO_GetEdgeModeDir(LPC_GPIO_T *pGPIO, uint8_t port)
493 {
494  return pGPIO[port].IBE;
495 }
496 
506 STATIC INLINE void Chip_GPIO_SetModeHigh(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
507 {
508  pGPIO[port].IEV |= pinmask;
509 }
510 
520 STATIC INLINE void Chip_GPIO_SetModeLow(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
521 {
522  pGPIO[port].IEV &= ~pinmask;
523 }
524 
535 STATIC INLINE uint32_t Chip_GPIO_GetModeHighLow(LPC_GPIO_T *pGPIO, uint8_t port)
536 {
537  return pGPIO[port].IEV;
538 }
539 
547 STATIC INLINE void Chip_GPIO_EnableInt(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
548 {
549  pGPIO[port].IE |= pinmask;
550 }
551 
559 STATIC INLINE void Chip_GPIO_DisableInt(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
560 {
561  pGPIO[port].IE &= ~pinmask;
562 }
563 
570 STATIC INLINE uint32_t Chip_GPIO_GetEnabledInts(LPC_GPIO_T *pGPIO, uint8_t port)
571 {
572  return pGPIO[port].IE;
573 }
574 
581 STATIC INLINE uint32_t Chip_GPIO_GetRawInts(LPC_GPIO_T *pGPIO, uint8_t port)
582 {
583  return pGPIO[port].RIS;
584 }
585 
592 STATIC INLINE uint32_t Chip_GPIO_GetMaskedInts(LPC_GPIO_T *pGPIO, uint8_t port)
593 {
594  return pGPIO[port].MIS;
595 }
596 
604 STATIC INLINE void Chip_GPIO_ClearInts(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinmask)
605 {
606  pGPIO[port].IC = pinmask;
607 }
608 
612 typedef enum {
619 
628 void Chip_GPIO_SetupPinInt(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, GPIO_INT_MODE_T mode);
629 
634 #ifdef __cplusplus
635 }
636 #endif
637 
638 #endif /* __GPIO_1125_H_ */