32 #ifndef __UART_1125_H_
33 #define __UART_1125_H_
77 __I uint32_t RESERVED2[6];
86 #define UART_RBR_MASKBIT (0xFF)
91 #define UART_LOAD_DLL(div) ((div) & 0xFF)
92 #define UART_DLL_MASKBIT (0xFF)
97 #define UART_LOAD_DLM(div) (((div) >> 8) & 0xFF)
98 #define UART_DLM_MASKBIT (0xFF)
103 #define UART_IER_RBRINT (1 << 0)
104 #define UART_IER_THREINT (1 << 1)
105 #define UART_IER_RLSINT (1 << 2)
106 #define UART_IER_MSINT (1 << 3)
107 #define UART_IER_CTSINT (1 << 7)
108 #define UART_IER_ABEOINT (1 << 8)
109 #define UART_IER_ABTOINT (1 << 9)
110 #define UART_IER_BITMASK (0x307)
111 #define UART1_IER_BITMASK (0x30F)
112 #define UART2_IER_BITMASK (0x38F)
117 #define UART_IIR_INTSTAT_PEND (1 << 0)
118 #define UART_IIR_FIFO_EN (3 << 6)
119 #define UART_IIR_ABEO_INT (1 << 8)
120 #define UART_IIR_ABTO_INT (1 << 9)
121 #define UART_IIR_BITMASK (0x3CF)
124 #define UART_IIR_INTID_MASK (7 << 1)
125 #define UART_IIR_INTID_RLS (3 << 1)
126 #define UART_IIR_INTID_RDA (2 << 1)
127 #define UART_IIR_INTID_CTI (6 << 1)
128 #define UART_IIR_INTID_THRE (1 << 1)
129 #define UART_IIR_INTID_MODEM (0 << 1)
134 #define UART_FCR_FIFO_EN (1 << 0)
135 #define UART_FCR_RX_RS (1 << 1)
136 #define UART_FCR_TX_RS (1 << 2)
137 #define UART_FCR_DMAMODE_SEL (1 << 3)
138 #define UART_FCR_BITMASK (0xCF)
140 #define UART_TX_FIFO_SIZE (16)
143 #define UART_FCR_TRG_LEV0 (0)
144 #define UART_FCR_TRG_LEV1 (1 << 6)
145 #define UART_FCR_TRG_LEV2 (2 << 6)
146 #define UART_FCR_TRG_LEV3 (3 << 6)
152 #define UART_LCR_WLEN_MASK (3 << 0)
153 #define UART_LCR_WLEN5 (0 << 0)
154 #define UART_LCR_WLEN6 (1 << 0)
155 #define UART_LCR_WLEN7 (2 << 0)
156 #define UART_LCR_WLEN8 (3 << 0)
159 #define UART_LCR_SBS_MASK (1 << 2)
160 #define UART_LCR_SBS_1BIT (0 << 2)
161 #define UART_LCR_SBS_2BIT (1 << 2)
164 #define UART_LCR_PARITY_EN (1 << 3)
165 #define UART_LCR_PARITY_DIS (0 << 3)
166 #define UART_LCR_PARITY_ODD (0 << 4)
167 #define UART_LCR_PARITY_EVEN (1 << 4)
168 #define UART_LCR_PARITY_F_1 (2 << 4)
169 #define UART_LCR_PARITY_F_0 (3 << 4)
170 #define UART_LCR_BREAK_EN (1 << 6)
171 #define UART_LCR_DLAB_EN (1 << 7)
172 #define UART_LCR_BITMASK (0xFF)
177 #define UART_MCR_DTR_CTRL (1 << 0)
178 #define UART_MCR_RTS_CTRL (1 << 1)
179 #define UART_MCR_LOOPB_EN (1 << 4)
180 #define UART_MCR_AUTO_RTS_EN (1 << 6)
181 #define UART_MCR_AUTO_CTS_EN (1 << 7)
182 #define UART_MCR_BITMASK (0xD3)
187 #define UART_LSR_RDR (1 << 0)
188 #define UART_LSR_OE (1 << 1)
189 #define UART_LSR_PE (1 << 2)
190 #define UART_LSR_FE (1 << 3)
191 #define UART_LSR_BI (1 << 4)
192 #define UART_LSR_THRE (1 << 5)
193 #define UART_LSR_TEMT (1 << 6)
194 #define UART_LSR_RXFE (1 << 7)
195 #define UART_LSR_TXFE (1 << 8)
196 #define UART_LSR_BITMASK (0xFF)
197 #define UART1_LSR_BITMASK (0x1FF)
202 #define UART_MSR_DELTA_CTS (1 << 0)
203 #define UART_MSR_DELTA_DSR (1 << 1)
204 #define UART_MSR_LO2HI_RI (1 << 2)
205 #define UART_MSR_DELTA_DCD (1 << 3)
206 #define UART_MSR_CTS (1 << 4)
207 #define UART_MSR_DSR (1 << 5)
208 #define UART_MSR_RI (1 << 6)
209 #define UART_MSR_DCD (1 << 7)
210 #define UART_MSR_BITMASK (0xFF)
215 #define UART_ACR_START (1 << 0)
216 #define UART_ACR_MODE (1 << 1)
217 #define UART_ACR_AUTO_RESTART (1 << 2)
218 #define UART_ACR_ABEOINT_CLR (1 << 8)
219 #define UART_ACR_ABTOINT_CLR (1 << 9)
220 #define UART_ACR_BITMASK (0x307)
225 #define UART_RS485CTRL_NMM_EN (1 << 0)
226 #define UART_RS485CTRL_RX_DIS (1 << 1)
227 #define UART_RS485CTRL_AADEN (1 << 2)
228 #define UART_RS485CTRL_SEL_DTR (1 << 3)
230 #define UART_RS485CTRL_DCTRL_EN (1 << 4)
231 #define UART_RS485CTRL_OINV_1 (1 << 5)
234 #define UART_RS485CTRL_BITMASK (0x3F)
239 #define UART_ICR_IRDAEN (1 << 0)
240 #define UART_ICR_IRDAINV (1 << 1)
241 #define UART_ICR_FIXPULSE_EN (1 << 2)
242 #define UART_ICR_PULSEDIV(n) ((n & 0x07) << 3)
243 #define UART_ICR_BITMASK (0x3F)
248 #define UART_HDEN_HDEN ((1 << 0))
253 #define UART_SCICTRL_SCIEN (1 << 0)
254 #define UART_SCICTRL_NACKDIS (1 << 1)
255 #define UART_SCICTRL_PROTSEL_T1 (1 << 2)
256 #define UART_SCICTRL_TXRETRY(n) ((n & 0x07) << 5)
257 #define UART_SCICTRL_GUARDTIME(n) ((n & 0xFF) << 8)
262 #define UART_FDR_DIVADDVAL(n) (n & 0x0F)
263 #define UART_FDR_MULVAL(n) ((n << 4) & 0xF0)
264 #define UART_FDR_BITMASK (0xFF)
269 #define UART_TER1_TXEN (1 << 7)
270 #define UART_TER2_TXEN (1 << 0)
275 #define UART_SYNCCTRL_SYNC (1 << 0)
276 #define UART_SYNCCTRL_CSRC_MASTER (1 << 1)
277 #define UART_SYNCCTRL_FES (1 << 2)
278 #define UART_SYNCCTRL_TSBYPASS (1 << 3)
279 #define UART_SYNCCTRL_CSCEN (1 << 4)
280 #define UART_SYNCCTRL_STARTSTOPDISABLE (1 << 5)
281 #define UART_SYNCCTRL_CCCLR (1 << 6)
288 STATIC INLINE void Chip_UART_TXEnable(LPC_UART_T *pUART)
313 pUART->
THR = (uint32_t) data;
341 pUART->
IER |= intMask;
356 pUART->
IER &= ~intMask;
444 pUART->
DLL = (uint32_t) dll;
445 pUART->
DLM = (uint32_t) dlm;
518 pUART->
SCR = (uint32_t) data;
528 return (uint8_t) (pUART->
SCR & 0xFF);
626 return (uint8_t) (pUART->
RS485DLY & 0xFF);