LPCOpen Platform for LPC112X microcontrollers  112X
LPCOpen Platform for the NXP LPC112X family of Microcontrollers
Data Structures | Macros | Enumerations | Functions
CHIP: LPC11xx Power Management Unit block driver

Detailed Description

This driver only applies to devices in the CHIP_LPC11AXX, CHIP_LPC11CXX, CHIP_LPC11EXX, CHIP_LPC11UXX, and CHIP_LPC1125 families. Note different families may have slightly different PMU support.

Data Structures

struct  LPC_PMU_T
 LPC11xx Power Management Unit register block structure. More...
 

Macros

#define PMU_PCON_PM_SLEEP   (0x0)
 
#define PMU_PCON_PM_DEEPSLEEP   (0x0)
 
#define PMU_PCON_PM_DEEPPOWERDOWN   (0x2)
 
#define PMU_PCON_DPDEN   (0x02)
 
#define PMU_PCON_SLEEPFLAG   (1 << 8)
 
#define PMU_PCON_DPDFLAG   (1 << 11)
 
#define PMU_GPREG4_DATA   ((uint32_t) 0x1fffff << 11)
 
#define PMU_GPREG4_WAKEHYSENABLE   (1 << 10)
 

Enumerations

enum  CHIP_PMU_MCUPOWER_T { PMU_MCU_SLEEP = 0, PMU_MCU_DEEP_SLEEP, PMU_MCU_DEEP_PWRDOWN }
 LPC11xx low power mode type definitions. More...
 

Functions

STATIC INLINE void Chip_PMU_WriteGPREG (LPC_PMU_T *pPMU, uint8_t regIndex, uint32_t value)
 Write a value to a GPREG register. More...
 
STATIC INLINE void Chip_PMU_WriteGPREG4 (LPC_PMU_T *pPMU, uint32_t value)
 
STATIC INLINE uint32_t Chip_PMU_ReadGPREG (LPC_PMU_T *pPMU, uint8_t regIndex)
 Read a value to a GPREG register. More...
 
void Chip_PMU_SleepState (LPC_PMU_T *pPMU)
 Enter MCU Sleep mode. More...
 
void Chip_PMU_DeepSleepState (LPC_PMU_T *pPMU)
 Enter MCU Deep Sleep mode. More...
 
void Chip_PMU_DeepPowerDownState (LPC_PMU_T *pPMU)
 Enter MCU Deep Power down mode. More...
 
void Chip_PMU_Sleep (LPC_PMU_T *pPMU, CHIP_PMU_MCUPOWER_T SleepMode)
 Place the MCU in a low power state. More...
 
STATIC INLINE uint32_t Chip_PMU_GetSleepFlags (LPC_PMU_T *pPMU)
 Returns sleep/power-down flags. More...
 
STATIC INLINE void Chip_PMU_ClearSleepFlags (LPC_PMU_T *pPMU, uint32_t flags)
 Clears sleep/power-down flags. More...
 
STATIC INLINE uint32_t Chip_PMU_GetWakeHysEnable (LPC_PMU_T *pPMU)
 Returns Wakeup Hysterisis enable flag. More...
 
STATIC INLINE void Chip_PMU_SetWakeHysEnable (LPC_PMU_T *pPMU)
 Sets Wakeup Hysterisis enable flag. More...
 

Macro Definition Documentation

#define PMU_GPREG4_DATA   ((uint32_t) 0x1fffff << 11)

GP register 4 data field

Definition at line 74 of file pmu_112x.h.

#define PMU_GPREG4_WAKEHYSENABLE   (1 << 10)

Wakeup Hysterisis enable bit

Definition at line 75 of file pmu_112x.h.

#define PMU_PCON_DPDEN   (0x02)

Deep power down enable

Definition at line 71 of file pmu_112x.h.

#define PMU_PCON_DPDFLAG   (1 << 11)

Deep power-down flag

Definition at line 73 of file pmu_112x.h.

#define PMU_PCON_PM_DEEPPOWERDOWN   (0x2)

ARM WFI enter Deep Power-down mode

Definition at line 69 of file pmu_112x.h.

#define PMU_PCON_PM_DEEPSLEEP   (0x0)

ARM WFI enter Deep-sleep mode

Definition at line 68 of file pmu_112x.h.

#define PMU_PCON_PM_SLEEP   (0x0)

PMU PCON register bit fields & masksARM WFI enter sleep mode

Definition at line 67 of file pmu_112x.h.

#define PMU_PCON_SLEEPFLAG   (1 << 8)

Sleep mode flag

Definition at line 72 of file pmu_112x.h.

Enumeration Type Documentation

LPC11xx low power mode type definitions.

Enumerator
PMU_MCU_SLEEP 

Sleep mode

PMU_MCU_DEEP_SLEEP 

Deep Sleep mode

PMU_MCU_DEEP_PWRDOWN 

Deep power down mode

Definition at line 58 of file pmu_112x.h.

Function Documentation

STATIC INLINE void Chip_PMU_ClearSleepFlags ( LPC_PMU_T pPMU,
uint32_t  flags 
)

Clears sleep/power-down flags.

Parameters
pPMU: Pointer to PMU register block
flags: Or'ed value of PMU_PCON_SLEEPFLAG and PMU_PCON_DPDFLAG
Returns
Nothing
Note
Use this function to clear a low power state prior to calling WFI().

Definition at line 170 of file pmu_112x.h.

void Chip_PMU_DeepPowerDownState ( LPC_PMU_T pPMU)

Enter MCU Deep Power down mode.

Parameters
pPMU: Pointer to PMU register block
Returns
None
Note
For maximal power savings, the entire system is shut down except for the general purpose registers in the PMU and the self wake-up timer. Only the general purpose registers in the PMU maintain their internal states. The part can wake up on a pulse on the WAKEUP pin or when the self wake-up timer times out. On wake-up, the part reboots.

Definition at line 73 of file pmu_112x.c.

void Chip_PMU_DeepSleepState ( LPC_PMU_T pPMU)

Enter MCU Deep Sleep mode.

Parameters
pPMU: Pointer to PMU register block
Returns
None
Note
In Deep-sleep mode, the peripherals receive no internal clocks. The flash is in stand-by mode. The SRAM memory and all peripheral registers as well as the processor maintain their internal states. The WWDT, WKT, and BOD can remain active to wake up the system on an interrupt.

Definition at line 62 of file pmu_112x.c.

STATIC INLINE uint32_t Chip_PMU_GetSleepFlags ( LPC_PMU_T pPMU)

Returns sleep/power-down flags.

Parameters
pPMU: Pointer to PMU register block
Returns
Or'ed values of PMU_PCON_SLEEPFLAG and PMU_PCON_DPDFLAG
Note
These indicate that the PMU is setup for entry into a low power state on the next WFI() instruction.

Definition at line 157 of file pmu_112x.h.

STATIC INLINE uint32_t Chip_PMU_GetWakeHysEnable ( LPC_PMU_T pPMU)

Returns Wakeup Hysterisis enable flag.

Parameters
pPMU: Pointer to PMU register block
Returns
value of PMU_GPREG4_WAKEHYSENABLE
Note
This indicate that whether wakeup hysterisis is enabled or not.

Definition at line 182 of file pmu_112x.h.

STATIC INLINE uint32_t Chip_PMU_ReadGPREG ( LPC_PMU_T pPMU,
uint8_t  regIndex 
)

Read a value to a GPREG register.

Parameters
pPMU: Pointer to PMU register block
regIndex: Register index to read from, must be 0..3
Returns
Value read from the GPREG register

Definition at line 103 of file pmu_112x.h.

STATIC INLINE void Chip_PMU_SetWakeHysEnable ( LPC_PMU_T pPMU)

Sets Wakeup Hysterisis enable flag.

Parameters
pPMU: Pointer to PMU register block
Returns
Nothing
Note
Use this function to prevent enable wakeup hysterisis note that if Vcc goes below 2.2V then it might prevent wakeup if hysterisis is enabled WFI().

Definition at line 196 of file pmu_112x.h.

void Chip_PMU_Sleep ( LPC_PMU_T pPMU,
CHIP_PMU_MCUPOWER_T  SleepMode 
)

Place the MCU in a low power state.

Parameters
pPMU: Pointer to PMU register block
SleepMode: Sleep mode
Returns
None

Definition at line 84 of file pmu_112x.c.

void Chip_PMU_SleepState ( LPC_PMU_T pPMU)

Enter MCU Sleep mode.

Parameters
pPMU: Pointer to PMU register block
Returns
None
Note
The sleep mode affects the ARM Cortex-M0+ core only. Peripherals and memories are active.

Definition at line 51 of file pmu_112x.c.

STATIC INLINE void Chip_PMU_WriteGPREG ( LPC_PMU_T pPMU,
uint8_t  regIndex,
uint32_t  value 
)

Write a value to a GPREG register.

Parameters
pPMU: Pointer to PMU register block
regIndex: Register index to write to, must be 0..3
value: Value to write
Returns
None

Definition at line 84 of file pmu_112x.h.

STATIC INLINE void Chip_PMU_WriteGPREG4 ( LPC_PMU_T pPMU,
uint32_t  value 
)

Definition at line 89 of file pmu_112x.h.