ࡱ>   Root Entry DCache  Cells ??Parts ?? OrCAD Windows Library QKQ"Arialfffffff1Courier NewU\orCapture_res.dll1ST PART FIELD2ND PART FIELD3RD PART FIELD4TH PART FIELD5TH PART FIELD6TH PART FIELD7TH PART FIELD PCB Footprintddd00Views ??Library6Symbols?QB$Types$CLASSICValuePart ReferenceKQPK20DX128VFT5_QFN_48PTiKQPK20DX128VFT5_QFN_48P.NormalTiKQKQKQGraphics ?QB$Types$Packages?QBExportBlocks ??Cells Directory  4Parts Directory   ;Views Directory  NetBundleMapData"  Symbols Directory$Graphics Directory&Packages Directory&4ExportBlocks Directory.KQPK20DX128VFT5_QFN_48PTiKQPK20DX128VFT5_QFN_48P, Y/ \9PK20DX128VFT5_QFN_48PPK20DX128VFT5_QFN_48P.Normalya>\9PK20DX128VFT5_QFN_48P.Normal0(( 0019 \9VDD1nn!ceami9 \9VSS1n0nN!L9 \9VDDA!: \9VREFH!: \9VREFL!LL9 \9VSSA0N!LLO \9VREF_OUT/CMP1_IN5/CMP0_IN5FF!LL9 \9VBAT! \9VJTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/PTA0/U\A\R\T\0\_\C\T\S\/U\A\R\T\0\_\C\O\L\/FTM0_CH5dd!LLd \9/JTAG_TDI/EZP_DI/TSI0_CH2/PTA1/UART0_RX/FTM0_CH6nn!LLn \99JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/PTA2/UART0_TX/FTM0_CH7xx!o \9:JTAG_TMS/SWD_DIO/TSI0_CH4/PTA3/U\A\R\T\0\_\R\T\S\/FTM0_CH0!LLg \92N\M\I\/E\Z\P\_\C\S\/TSI0_CH5/PTA4/LLWU_P3/FTM0_CH1!xV \9!EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0!LLa \9,XTAL0/PTA19/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1!LL9 \9VDD2!LL< \9EXP_PAD0N!q \9<ADC0_SE8/TSI0_CH0/PTB0/LLWU_P5/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA!LLi \94ADC0_SE9/TSI0_CH6/PTB1/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB!LLr \9=ADC0_SE12/TSI0_CH7/PTB2/I2C0_SCL/U\A\R\T\0\_\R\T\S\/FTM0_FLT3!tcami \9PADC0_SE13/TSI0_CH8/PTB3/I2C0_SDA/U\A\R\T\0\_\C\T\S\/U\A\R\T\0\_\C\O\L\/FTM0_FLT0!iS \9TSI0_CH9/PTB16/UART0_RX/EWM_IN!LL\ \9'TSI0_CH10/PTB17/UART0_TX/E\W\M\_\O\U\T\!LLb \9-ADC0_SE14/TSI0_CH13/PTC0/SPI0_PCS4/PDB0_EXTRG66!LL \9PADC0_SE15/TSI0_CH14/PTC1/LLWU_P6/SPI0_PCS3/U\A\R\T\1\_\R\T\S\/FTM0_CH0/I2S0_TXD0@@!LL \9RADC0_SE4B/CMP1_IN0/TSI0_CH15/PTC2/SPI0_PCS2/U\A\R\T\1\_\C\T\S\/FTM0_CH1/I2S0_TX_FSJJ!LLs \9>CMP1_IN1/PTC3/LLWU_P7/SPI0_PCS1/UART1_RX/FTM0_CH2/I2S0_TX_BCLKTT!LL9 \9VSS20N!LLf \91PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT^^!LLi \94PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/CMP0_OUThh!LLw \9BCMP0_IN0/PTC6/LLWU_P10/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/I2S0_MCLKrr!LLb \9-CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS||!LL_ \9*PTD0/LLWU_P12/SPI0_PCS0/U\A\R\T\2\_\R\T\S\!LL_ \9*ADC0_SE5B/PTD1/SPI0_SCK/U\A\R\T\2\_\C\T\S\!LLU \9 PTD2/LLWU_P13/SPI0_SOUT/UART2_RX!LLK \9PTD3/SPI0_SIN/UART2_TX!LLo \9:PTD4/LLWU_P14/SPI0_PCS1/U\A\R\T\0\_\R\T\S\/FTM0_CH4/EWM_IN!LL \9VADC0_SE6B/PTD5/SPI0_PCS2/U\A\R\T\0\_\C\T\S\/U\A\R\T\0\_\C\O\L\/FTM0_CH5/E\W\M\_\O\U\T\!faontr \9=ADC0_SE7B/PTD6/LLWU_P15/SPI0_PCS3/UART0_RX/FTM0_CH6/FTM0_FLT0!i] \9(PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1!= \9ADC0_DP0FF!pp= \9ADC0_DM0PP!; \9VREGIN!; \9VOUT33!pp< \9USB0_DP!pOp< \9USB0_DM!pOp< \9EXTAL32rr!pNp; \9XTAL32||!rint? \9 R\E\S\E\T\,,!pp'"' '\9:0,'"' '\9 0'U/ \9PK20DX128VFT5_QFN_48PU N \9PK20DX128VFT5_QFN_48P112910111213161718192021242522492728293031323334353623373839404142434445464748786534151426