お客様の素早い設計とより早い製品化を実現する、技術情報と専門知識をご紹介します。
The MCM67B618B is a 1,179,648–bit synchronous fast static random access memory designed to provide a burstable, high–performance, secondary cache for the i486E and PentiumTM microprocessors. The MCM67B618B (organized as 65,536 words by 18 bits) is fabricated using Motorola’s high–performance silicon–gate BiCMOS technology. The device integrates input registers, a 2–bit counter, high speed SRAM, and high drive capability outputs onto a single monolithic circuit for reduced parts count implementation of cache data RAM applications. Synchronous design allows precise cycle control with the use of an external clock (K). BiCMOS circuitry reduces the overall power consumption of the integrated functions for greater reliability.
クイック・リファレンス ドキュメンテーションの種類.
2 ドキュメント
セキュアファイルの読み込み中、しばらくお待ちください。