High-Integrated and Low-Power Smart Card Interface

TDA8035HN

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Block Diagram

TDA8035HN Block Diagram

TDA8035HN Block diagram

Features

Protection of the contact smart card

  • Thermal and short-circuit protection on all card contacts
  • VCC regulation:
    • 5 V, 3 V, 1.8 V ± 5 % on 2 × 220 nF multilayer ceramic capacitors with low ESR
    • current spikes of 40 nA/s (VCC = 5 V and 3 V) or 15 nA/s (VCC = 1.8 V) up to 20 MHz, with controlled rise and fall times, filtered overload detection is approximately 120 mA
  • Automatic activation and deactivation sequences initiated by software or by hardware in the event of a short-circuit, card take-off, overheating, falling VREG VDD(INTF),VDDP
  • Enhanced card-side ElectroStatic Discharge (ESD) protection of (> 8 kV)
  • Supply supervisor for killing spikes during power on and off:
    • threshold internally fixed
    • externally by a resistor bridge

Easy integration into your contact reader

  • SW compatible to TDA8024 and TDA8034
  • 5 V, 3 V, 1.8 V smart card supply
  • DC-to-DC converter for VCC generation separately powered from 2.7 V to 5.5 V supply (VDDP and GNDP)
  • Very low power consumption in Deep Shutdown mode
  • Three protected half-duplex bidirectional buffered I/O lines (C4, C7 and C8)
  • External clock input up to 26 MHz
  • Card clock generation up to 20 MHz using pins CLKDIV1 and CLKDIV2 with synchronous frequency changes of fXTAL, fXTAL/2, fXTAL/4, fXTAL/8
  • Non-inverted control of pin RST using pin RSTIN
  • Built-in debouncing on card presence contact
  • Multiplexed status signal using pin OFFN
  • Chip Select digital input for parallel operation of several TDA8035 ICs.

Other

  • HVQFN32 package
  • Compliant with ISO 7816, NDS and EMV 4.3 (*) payment systems
    • (*) for C2 version

Target Applications

  • Pay TV
  • Electronic payment
  • Identification
  • IC card readers for banking

Part numbers include: TDA8035HN.

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Hardware

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