OnCE connector information

The CodeWarrior Ethernet TAP OnCE probe has a 14-pin connector which automatically supports target system signal levels from 1.8V to 3.3V.

The following figure shows the pin assignments of the probe OnCE connector.

Figure 1. Ethernet TAP probe Once connector pin assignments

The following table lists OnCE signal names, direction, pin numbers, descriptions, and drive capabilities for the probe OnCE connector.

Table 1. Ethernet TAP probe OnCE signal directions
OnCE pin	Signal mnemonic	Signal direction	Description
1	TDI	From Ethernet TAP probe connector	50mA driver
2	GND	- n/a -
3	TDO	From target system	17pF load
4	GND	- n/a -
5	TCK	From Ethernet TAP probe connector	50mA driver
6	GND	- n/a -
7	Reserved	From Ethernet TAP probe connector	50mA driver
8	No-Connect/Key	- n/a -
9	RESET	Bi-directional	Open-drain. 100Ohm to ground when asserted by Ethernet TAP probe, 22pF load when not asserted
10	TMS	From Ethernet TAP probe connector	50mA driver
11	VDD	From target system	2MOhm pull-down, plus 0.01uF load
12	Reserved	Bi-directional	Open-drain, 100Ohm to ground when asserted by Ethernet TAP probe, 22pF load when not asserted¹
13	Reserved	Bi-directional	Open-drain, 100Ohm to ground when asserted by Ethernet TAP probe, 22pF load when not asserted¹
14	TRST	From Ethernet TAP probe connector	50mA driver

The table below provides a general description of each OnCE signal and the operational requirements.

Note: All OnCE signals must meet accepted standards for OnCE signal design. To ensure proper and stable operation between the Ethernet TAP probe and the target system, the OnCE signals must meet the requirements listed in the following table.

Table 2. Ethernet TAP probe OnCE signal recommendations and requirements
OnCE pin	Signal mnemonic	Requirement
1	TDI	Must be wired to the target system processor. The Ethernet TAP probe drives the TDI output with up to 50 mA. The TDI trace should be kept short and maintain a "two-signal-width" spacing from any other parallel dynamic signal trace. TDI should have an RC termination option at the processor.
2	GND	Must be wired to the target system. GND is connected directly to the ground inside the Ethernet TAP probe.
3	TDO	Must be wired to the target system processor. TDO is an output from the target system processor and input to the Ethernet TAP probe. The TDO trace run should be kept short and maintain a "two-signal-width" spacing from any other parallel dynamic signal trace. TDO should have a series termination resistor located near the target system processor.
4	GND	Must be wired to the target system. GND is connected directly to the ground inside the Ethernet TAP probe.
5	TCK	Must be wired to the target system processor. The Ethernet TAP probe drives the TCK output with up to 50 mA. The TCK trace run should be kept as short as possible and maintain a "two-signal-width" spacing from any other parallel dynamic signal trace.
6	GND	Must be wired to the target system. GND is connected directly to the ground inside the Ethernet TAP probe.
7	Reserved	Not required for emulation.
8	No-Connect/Key	Not required for emulation. Pin 8 should be clipped on the target system OnCE header.
9	RESET	Must be wired to the target system processor. The Ethernet TAP probe drives the RESET output with 50mA. During reset, the Ethernet TAP probe drives RESET to ground through a 100Ohm resistor.
10	TMS	Must be wired to the target system processor. The Ethernet TAP probe drives the TCK output with up to 50mA. The TCK trace run should be kept as short as possible and maintain a "two-signal-width" spacing from any other parallel dynamic signal trace.
11	VDD	Must be wired to the target system. The Ethernet TAP probe uses this signal to determine if power is applied to the target system. This signal is also used as a voltage reference for the signals driven by the Ethernet TAP probe (TDI, TCK, TMS, RESET, and TRST).
12	Reserved	Not required for emulation.
13	Reserved	Not required for emulation.
14	TRST	Must be wired to the target system processor. The Ethernet TAP probe drives the TRST output with up to 50 mA. The TRST trace run should be kept short and maintain a "two-signal-width" spacing from any other parallel dynamic signal trace.