The following table presents an overview of the instructions available for the RS08.
| Instruction | Addressing Modes | Description |
|---|---|---|
| ADC | #<expression> <expression> ,X D[X] X | Add with Carry |
| ADCX | Alias for ADC X | |
| ADD | #<expression> <expression> ,X D[X] X | Add without Carry |
| ADDX | Alias for ADD X | |
| AND | #<expression> <expression> ,X D[X] X | Logical AND |
| ANDX | Alias for AND X | |
| ASLA | Arithmetic Shift Left Accumulator (alias for LSLA) | |
| BCC | <label> | Branch if Carry Bit Clear |
| BCLR | BitNumber, <expression> BitNumber,D[X] BitNumber,X | Clear one Bit in Memory |
| BCS | <label> | Branch if Carry Bit Set |
| BEQ | <label> | Branch if Equal |
| BGND | Background | |
| BHS | <label> | Branch if Higher or Same |
| BLO | <label> | Branch if Lower |
| BNE | <label> | Branch if Not Equal |
| BRN | <label> | Branch Never (Alias for BRA *+$2) |
| BRCLR | BitNumber, <expression>, <label> BitNumber,D[X],<label> BitNumber,X,<label> | Branch if Bit is Clear |
| BRSET | BitNumber, <expression>, <label> BitNumber,D[X],<label> BitNumber,X,<label> | Branch if Bit Set |
| BSET | BitNumber,<expression> BitNumber,D[X] BitNumber,X | Set Bit in Memory |
| BSR | <label> | Branch to Subroutine |
| CBEQ | <expression>,<label> #<expression>,<label> ,X,<label> D[X],<label> X,<label> | Compare and Branch if Equal |
| CBEQA | <label> | |
| CBEQX | <label> | |
| CLC | Clear Carry Bit | |
| CLR | <expression> ,X D[X] X | Clear Memory |
| CLRX | Clear Index Register X | |
| CMP | #<expression> <expression> ,X D[X] X | Compare Accumulator with Memory |
| COMA | Complement (One's Complement) | |
| DBNZ | <expression>,<label> ,X,<label> D[X],<label> X,<label> | Decrement Counter and Branch if Not Zero |
| DBNZA | <label> | |
| DBNZX | <label> | |
| DEC | <expression> ,X D[X] X | Decrement Memory Location |
| DEC | <$13 | Force tiny addressing (will use $03) |
| DECA | Decrement Accumulator | |
| DECX | Decrement Index Register | |
| EOR | #<expression> <expression> D[X] ,X X | Exclusive OR Memory with Accumulator |
| EORX | Exclusive OR (index register and accumulator) | |
| INC | <expression> ,X D[X] X | Increment Memory Location |
| INC | >$01 | Force direct addressing |
| INCA | Increment Accumulator | |
| INCX | Increment Register X | |
| JMP | <label> | Jump to Label |
| JSR | <label> | Jump to Subroutine |
| LDA | #<expression> <expression> ,X D[X] X | Load Accumulator indexed |
| LDA | <$0FF | Force short addressing (will use $1F) |
| LDX | #<expression> <expression> ,X D[X] X | Load Index Register X from Memory |
| LDX | $OFF | Load Direct |
| LSLA | Logical Shift Left Accumulator | |
| LSRA | Logical Shift Right Accumulator | |
| MOV | <expression>,<expression> #<expression>,<expression> D[X],<expression> <expression>,D[X] #<expression>,D[X] | Memory to Memory Byte Move |
| NOP | No Operation | |
| ORA | #<expression> <expression> ,X D[X] X | Inclusive OR between Accumulator and Memory |
| ORAX | Inclusive OR between Accumulator and Index Register | |
| ROLA | Rotate Accumulator Left | |
| RORA | Rotate Accumulator Right | |
| RTS | Return from Subroutine | |
| SBC | #<expression> <expression> ,X D[X] X | Subtract with Carry |
| SBCX | Subtract with Carry (Index Register content from Accumulator) | |
| SEC | Set Carry Bit | |
| SHA | Swap Shadow PC High with A | |
| SLA | Swap Shadow PC Low with A | |
| STA | <expression> ,X D[X] X | Store Accumulator in Memory |
| STOP | Stop Processing | |
| STX | <expression> | Store Index Register X in Memory |
| SUB | #<expression> <expression> ,X D[X] | Subtract |
| SUBX | ||
| TAX | Transfer Accumulator to Index Register X | |
| TST | #<expression> <expression> ,X D[X] | Test for zero (alias for MOV <expression>,<expression>) |
| TSTA | Test Accumulator (alias for ORA #0) | |
| TSTX | Test Index Register X (alias for MOV X,X) | |
| TXA | Transfer Index Register X to Accumulator | |
| WAIT | Enable Interrupts; Stop Processor |