The debug port on the target is a synchronous interface clocked by the
TCK or DSCK signal. The base frequency is set by the debugger and can be adjusted when you set up a project in the debugger preferences or configuration options.
Note: For directions on how to set the debug port clock frequency, please see the CodeWarrior documentation.
Some slow targets might not be able to operate at the initial default rate. Therefore, you may have to adjust the debug port clock rate.
Note: Because of variations in the design of target systems, it is not possible to guarantee that all systems can be operated at the maximum debug port clock rates. These variations include circuit impedances, trace lengths, and signal terminations. You may need to select a lower clock rate to get reliable operation.