Arithmetic shift of 16-bit value by a specified shift amount. If the shift count is positive, a right shift is performed. Otherwise, a left shift is performed. If a right shift is performed, then rounding performed on result. Saturation may occur during a left shift. When an accumulator is the destination, zeroes out the LSP portion.
OMR's SA bit was set to 1 at least three cycles before this code, that is, saturation on data ALU results enabled.
Word16 shr_r(Word16 s_val2shft, Word16 s_shftamount)
short result; short s1 = 0x2468; short s2= 1; result = shr(s1,s2); // Expected value of result: 0x1234