msu_r

Multiply two 16-bit fractional values and subtract this product from a 32-bit fractional value. Round into a 16-bit result, saturating if necessary. When an accumulator is the destination, zeroes out the LSP portion.

Assumptions

OMR's SA bit was set to 1 at least three cycles before this code, that is, saturation on data ALU results enabled.

OMR's R bit was set to 1 at least three cycles before this code, that is, twos complement rounding, not convergent rounding.

Prototype


  Word16 msu_r(Word32 laccum, Word16 sinp1, Word16 sinp2)

Example

short s1 = 0xC000;/* - 0.5 */

short s2 = 0x4000;/*   0.5 */

short result;

long Acc = 0x20000000;



result = msu_r(Acc,s1,s2);

// Expected value of result: 0x4000