Power Architecture Code Generation

This chapter describes the conventions that the C/C++ compiler and linker follow to generate object code for Power Architecture processors, the data types that the compiler recognizes, and how to specify to the compiler the byte-alignment of data in object code.

• ABI Conformance
  The CodeWarrior compiler for Power Architecture processors follows the application binary interface ( ABI) specified by PowerPC Embedded Binary Interface, 32-Bit Implementation.
• Data Representation
  The compiler recognizes ISO standard data types and some Power Architecture-specific types.
• Data Addressing
  In absolute addressing, the compiler generates two instructions to fetch the address of a variable.
• Aligning Data
  A;igning data.
• Small Data Area PIC/PID Support
  The basic requirement for position independent code and data in the small data area is, at runtime, maintaining the link time address relationships between the startup code ( .init ) and the .sdata and .sdata2 segments.
• Variable Length Encoding
  The Variable Length Encoding (VLE) instruction set architecture is an extension to the instruction set specified in Freescale Semiconductor's Book E Implementation Standard (EIS) for Power Architecture processors.
• Building a ROM Image
  The CodeWarrior compiler and linker can generate a program image that may be stored in and started from ROM (read-only memory).
• Embedded C++
  Embedded C++ (EC++) is a subset of the ISO/IEC 14882:2003 C++ language that is intended to compile into smaller, faster executable code suitable for embedded systems.