Processor Expert offers the following event priority options:
- interrupts enabled - Interrupts are enabled and the interrupts with the higher priority than the current interrupt priority can interrupt the event code (The state of the register CCRH is not changed).
- interrupts disabled - All maskable interrupts are disabled (The state of the register CCRH is not changed).
- 0 - Same as interrupts disabled
- 1..7
- Priorities from lowest (1) to highest (7). The code generated by Processor Expert before the event invocation sets the event code priority to the specified value (by writing to the CCRH register) and enables interrupts.
- same as interrupt - Default behavior of the architecture; no interrupts can interrupt the event. It is same as Interrupts Disabled.
- Other values are mapped to the priorities 1..7.