Version specific information for Freescale HCS08 and ColdFire V1 derivatives

The ROM, Z_RAM, and RAM ranges depend on the target microcontroller. It is recommended to increase the stack size if some standard libraries are used.

For the detailed information on debugging HC08 application using MON8 interface see Debugging on HC08 using MON8 topic.

Components' implementation details:

All the components:
Interrupts priorities - For details on priority settings for interrupts and event, see Processor Expert priority system topic.
Processor:
- Speed Mode selection (processor methods SetHighSpeed, SetLowSpeed, SetSlowSpeed ): If processor clock-dependent components are used, the signals generated from such internal peripherals may be corrupted at the moment of the speed mode selection (if function of clocked devices is enabled). Handling of such a situation may be done using events BeforeNewSpeed and AfterNewSpeed.
- Interrupt vector table in ROM is placed at the default address in the ROM or in the Flash:
  If the interrupt vector table in RAM is selected, the vectors table is generated into RAM and special redirection code is generated to ROM. This code transfers program control to the selected address according to the table in RAM. You can use processor methods SetIntVect to set the address of interrupt service routine.
  
  Note: You cannot change the interrupt vector that is allocated by any component in your project. It is recommended to select the event OnSWI together with this option to minimize size of the generated code.
PPG: The PPG component always allocates the whole timer. Although it is technically possible to share the selected timer between 2 PPG components, it would be impossible to set the PPG period for two components separately.
PWM: In contrast to the PPG components, it is possible for the PWM components to share the selected timer, since they do not have the SetPeriod method.
EventCntr16: Since the timer overflow flag is set when the timer reaches a value of 65535, the maximum number of events that can be counted by this component is limited to 65534 (value of 65535 is marked as invalid as the method GetNumEvents returns the ERR_OVERFLOW value as its result).
TimeDate: It is recommended to make a setting close to 10 ms (resolution provided by GetTime/SetTime methods). Smaller values unnecessarily overload the system.
WatchDog: When the Watchdog component is added to the project, it is automatically enabled. The enabling code is placed in the processor initialization code.
Note: Watchdog is enabled by a write to the configuration register. This register can be written only once after processor reset. Since the register also contains other bits that are written during the processor initialization, the watchdog must be enabled when processor is initialized. The property CPU clock/speed selection has no effect because the COP timer clock source is CGMXCLK.
AsynchroSerial:
- Timing setting 'values from list' enables to select various values denoted by changes of the prescaler most tightly coupled with UART.
- If a software handshake is used for extremely high baud-rates it may happen that no overruns appear and transmitted characters get lost
AsynchroMaster: Same as AsynchroSerial
AsynchroSlave: Same as AsynchroMaster.
SynchroMaster: Because of the disability of an SPI device (configured as Master) caused by a mode fault, the mode fault automatically disables the component (inside an interrupt service) if interrupt service is enabled. If the interrupt service is disabled and a mode fault occurs, the component will be disabled at the beginning of RecvChar method.
SynchroSlave:
- On HC08 family microcontrollers: A mode fault doesn't disable an SPI device (configured as Slave), therefore it doesn't disable the component.
  If a mode fault error occurs, software can abort the SPI transmission by disabling and enabling of the device (Enable and Disable methods).
- When Clock edge property = "falling edge", Shift clock idle polarity property = "Low" or Clock edge property = "rising edge" and Shift clock idle polarity property = "High", the SS pin of the slave SPI module must be set to logic 1 between bytes. The falling edge of SS indicates the beginning of the transmission. This causes the SPI to leave its idle state and begin driving the MISO pin with the MSB of its data. Once the transmission begins, no new data is allowed into the shift register from the data register. Therefore, the slave data register must be loaded with the desired transmit data before the falling edge of SS.
BitIO, BitsIO, ByteIO, Byte2IO, Byte3IO, Byte4IO:
The GetVal and GetDir methods are always implemented as macros. Optimization for property (BitIO, BitsIO) does not influence the generated code.
WordIO, LongIO:
These components could not be implemented on Freescale HC08; this processor has no instructions for 16-bit and 32-bit access into the I/O space.
ADC: Clock input of A/D clock generator cannot be changed in runtime. A conversion time in the Conversion time dialog is calculated for the worse case, which is usually 17 cycles per conversion.
ExtInt:
If a pin other than IRQ (IRQ1) is set in this component, setting of the 'Pull resistor' property affects only disable state of the device (component). If the device (component) is enabled, the pull-up resistor is always connected to the pin.
KBI:
- Limitation for HC08: Setting of the 'Pull resistor' property affects only the disabled state of the device (component). If device (component) is enabled, the pull-up resistors are always connected to the used pins.
- Only one KBI component can be used to handle one peripheral in PE project.
IntEEPROM:
A component expects that all security options of EEPROM are disabled. If some security option is enabled, methods performing write operation (such as SetByte) can return an error.

For details on sharing and usage of the high-level timer components, see HCS08/ColdFire V1 timers usage and sharing topic for details.