Internal Clock Source Module

In Full Chip Simulation (FCS) mode, this module simulates all functionality of the Internal Clock Source (ICS) Module, including:

FCS mode uses a simulated External Oscillator Frequency change command (XTAL) lets you input the desired XTAL value. To check the current value of the External Oscillator, Bus Frequency and ICSCLK Frequency, open the RS08FCS menu and select Clocks Module > Show MCU Clocks.

Figure 1. Clocks Module Extended Menu
Clocks Module Extended Menu

Once you select the MCU Clocks menu, the Cycles window displays all of the aforementioned Clock Frequencies, or you can select the Show Cycle Counter option within the FCS menu to get the same window.

Figure 2. Frequency Display
Frequency Display

Within the FCS menu, you can select the Run till Cycle option, which lets you begin code execution and stop execution when the specified cycle count is reached. Note that the parameter given is not the number of cycles that executed, but rather the total cycle-count of the simulator (displayed in the Register Window).

Figure 3. Run till Cycle command
Run till Cycle command

This command is extremely useful for verifying specific timings of a given event, running until a given event is complete, or just before it completes to enable stepping through the event or any application where cycle-timed execution is desired.

Figure 4. Run till Cycle Dialog Box
Run till Cycle Dialog Box

You can also select the Clear Cycle Counter option within the FCS menu, which clears the cycle counter. If you select the Show Cycle Counter option within the FCS menu, you can check to make sure that the cycle counter is zero.

Figure 5. Cycle Counter Dialog Box with Cleared Counter
Cycle Counter Dialog Box with Cleared Counter

Once the ICG is properly configured, you can monitor the status of the PLL by polling the corresponding flag. If PLL interrupt is enabled, FCS jumps to an appropriate subroutine, as long as the interrupt vector is properly defined. To observe the flag going up as a result of the corresponding CPU event, situate your Memory window on the memory location of the ICG Status and Control register.

Figure 6. Memory Window
Memory Window

For more information on how to properly configure Clock Generation, refer to the Freescale reference manual for your microprocessor.