Slave LIN Interface Controller (SLIC) Module

In Full Chip Simulation (FCS) mode, this option will simulate all functionality of the Slave LIN Interface Controller (SLIC) Module, including:

Full Chip Simulation (FCS) mode uses a buffered structure to simulate SLIC inputs and outputs. You can queue up to 256 data bytes into the input buffer. The output buffer of the SLIC module can also hold 256 output bytes. To queue the SLIC Input bytes use the SLCIN instruction in the command prompt. For a more detailed description of the command, refer to the SLIC Commands section. The SLIC instruction brings up a window, which displays a list of queued input data. Different SLIC packets can be entered while the window is open. An arrow points to the byte that will be used next as input to the SLIC. Once the SLIC module is turned on and properly configured for receiving data from an external SLIC device, the data from the SLIC input buffer is written to the SLIC module identifier or data registers. After the simulation of the data transmission is complete, the arrow moves to the next value in the SLIC IN Buffer.