Debugging an application involves single-stepping through code. However, if you do not modify the behavior of interrupts that are part of normal code execution, an interrupt may occur and the debugger jumps to the interrupt handler code, rather than single-stepping to the next instruction. Therefore, you must mask, or inhibit, certain interrupt levels to prevent the interrupts from happening. The interrupt levels that you inhibit varies, depending upon the microcontroller.
Use this tab to inhibit or allow interrupts. When inhibiting interrupts, you can mask interrupts below a level that you specify. The following figure shows the Interrupts tab.
The following table explains each option.
| Option | Description |
|---|---|
| Mask Interrupts | Determines whether the debugger inhibits or allows interrupts. Check this option to inhibit interrupts, using the level specified in the Interrupt Level option. Uncheck this option to permit all interrupts. |
| Interrupt Level | Use this option to specify the interrupt level that the debugger inhibits. Level 0 corresponds to the lowest priority interrupt, while level 7 is the highest. If you specify a level of 4, then the debugger inhibits interrupts of level 0 through 4, while interrupts at levels 5 through 7 execute. |
| For HCS08/RS08/Kinetis | |
| Disable interrupts during stepping | Check this checkbox if you want to disable interrupts during stepping. |
| Interrupt level | Use this option to specify the interrupt level. |
Note: The exact definitions of interrupt levels are different for each target microcontroller, and masking all interrupts can cause erratic behavior. This means that finding the best interrupt level to mask can involve trial and error. Be alert for any code statements that change the interrupt mask; stepping over such a statement can modify the settings in the tab.
Note: The ARMv7-M profile supports two system level interrupts - PendSV for software generation of asynchronous system calls, and SysTick for a Timer integral to the ARMv7-M profile - along with up to 496 external interrupts. All interrupts have a configurable priority. The debugger can optionally set the C_MASKINTS bit in the DHCSR to inhibit (mask) PendSV, Systick, and external configurable interrupts from occurring during stepping. Where C_MASKINTS is set, permitted exception handlers which activate will execute along with the stepped instruction.